| 1 | /* $NetBSD: if_tlvar.h,v 1.17 2015/04/13 16:33:25 riastradh Exp $ */ |
| 2 | |
| 3 | /* |
| 4 | * Copyright (c) 1997 Manuel Bouyer. All rights reserved. |
| 5 | * |
| 6 | * Redistribution and use in source and binary forms, with or without |
| 7 | * modification, are permitted provided that the following conditions |
| 8 | * are met: |
| 9 | * 1. Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * 2. Redistributions in binary form must reproduce the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer in the |
| 13 | * documentation and/or other materials provided with the distribution. |
| 14 | * |
| 15 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| 16 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| 17 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 18 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 19 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 20 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 21 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 22 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 23 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 24 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 25 | */ |
| 26 | |
| 27 | /* |
| 28 | * Texas Instruments ThunderLAN ethernet controller |
| 29 | * ThunderLAN Programmer's Guide (TI Literature Number SPWU013A) |
| 30 | * available from www.ti.com |
| 31 | */ |
| 32 | |
| 33 | #include <sys/rndsource.h> |
| 34 | |
| 35 | #include <dev/i2c/i2cvar.h> |
| 36 | |
| 37 | struct tl_product_desc { |
| 38 | u_int32_t tp_product; |
| 39 | int tp_tlphymedia; |
| 40 | const char *tp_desc; |
| 41 | }; |
| 42 | |
| 43 | struct tl_softc { |
| 44 | device_t sc_dev; /* base device */ |
| 45 | bus_space_tag_t tl_bustag; |
| 46 | bus_space_handle_t tl_bushandle; /* CSR region handle */ |
| 47 | bus_dma_tag_t tl_dmatag; |
| 48 | const struct tl_product_desc *tl_product; |
| 49 | void* tl_ih; |
| 50 | struct ethercom tl_ec; |
| 51 | struct callout tl_tick_ch; /* tick callout */ |
| 52 | struct callout tl_restart_ch; /* restart callout */ |
| 53 | u_int8_t tl_enaddr[ETHER_ADDR_LEN]; /* hardware address */ |
| 54 | struct i2c_controller sc_i2c; /* i2c controller info, for eeprom */ |
| 55 | mii_data_t tl_mii; /* mii bus */ |
| 56 | bus_dma_segment_t ctrl_segs; /* bus-dma memory for control blocks */ |
| 57 | int ctrl_nsegs; |
| 58 | char *ctrl; /* vaddr for ctrl_segs */ |
| 59 | struct Rx_list *Rx_list; /* Receive and transmit lists */ |
| 60 | struct tl_Rx_list *hw_Rx_list; /* and assocoated hw descriptor */ |
| 61 | bus_dmamap_t Rx_dmamap; /* and associated DMA maps */ |
| 62 | struct Tx_list *Tx_list; |
| 63 | struct tl_Tx_list *hw_Tx_list; |
| 64 | bus_dmamap_t Tx_dmamap; |
| 65 | struct Rx_list *active_Rx, *last_Rx; |
| 66 | struct Tx_list *active_Tx, *last_Tx; |
| 67 | struct Tx_list *Free_Tx; |
| 68 | bus_dmamap_t null_dmamap; /* for small packets padding */ |
| 69 | #ifdef TL_PRIV_STATS |
| 70 | int ierr_overr; |
| 71 | int ierr_code; |
| 72 | int ierr_crc; |
| 73 | int ierr_nomem; |
| 74 | int oerr_underr; |
| 75 | int oerr_deferred; |
| 76 | int oerr_coll; |
| 77 | int oerr_multicoll; |
| 78 | int oerr_latecoll; |
| 79 | int oerr_exesscoll; |
| 80 | int oerr_carrloss; |
| 81 | int oerr_mcopy; |
| 82 | #endif |
| 83 | krndsource_t rnd_source; |
| 84 | }; |
| 85 | #define tl_if tl_ec.ec_if |
| 86 | #define tl_bpf tl_if.if_bpf |
| 87 | |
| 88 | typedef struct tl_softc tl_softc_t; |
| 89 | typedef u_long ioctl_cmd_t; |
| 90 | |
| 91 | #define TL_HR_READ(sc, reg) \ |
| 92 | bus_space_read_4(sc->tl_bustag, sc->tl_bushandle, (reg)) |
| 93 | #define TL_HR_READ_BYTE(sc, reg) \ |
| 94 | bus_space_read_1(sc->tl_bustag, sc->tl_bushandle, (reg)) |
| 95 | #define TL_HR_WRITE(sc, reg, data) \ |
| 96 | bus_space_write_4(sc->tl_bustag, sc->tl_bushandle, (reg), (data)) |
| 97 | #define TL_HR_WRITE_BYTE(sc, reg, data) \ |
| 98 | bus_space_write_1(sc->tl_bustag, sc->tl_bushandle, (reg), (data)) |
| 99 | #define ETHER_MIN_TX (ETHERMIN + sizeof(struct ether_header)) |
| 100 | |