| 1 | /* $NetBSD: nouveau_nv50_fence.c,v 1.1.1.1 2014/08/06 12:36:23 riastradh Exp $ */ |
| 2 | |
| 3 | /* |
| 4 | * Copyright 2012 Red Hat Inc. |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 7 | * copy of this software and associated documentation files (the "Software"), |
| 8 | * to deal in the Software without restriction, including without limitation |
| 9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 10 | * and/or sell copies of the Software, and to permit persons to whom the |
| 11 | * Software is furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in |
| 14 | * all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 22 | * OTHER DEALINGS IN THE SOFTWARE. |
| 23 | * |
| 24 | * Authors: Ben Skeggs <bskeggs@redhat.com> |
| 25 | */ |
| 26 | |
| 27 | #include <sys/cdefs.h> |
| 28 | __KERNEL_RCSID(0, "$NetBSD: nouveau_nv50_fence.c,v 1.1.1.1 2014/08/06 12:36:23 riastradh Exp $" ); |
| 29 | |
| 30 | #include <core/object.h> |
| 31 | #include <core/class.h> |
| 32 | |
| 33 | #include "nouveau_drm.h" |
| 34 | #include "nouveau_dma.h" |
| 35 | #include "nv10_fence.h" |
| 36 | |
| 37 | #include "nv50_display.h" |
| 38 | |
| 39 | static int |
| 40 | nv50_fence_context_new(struct nouveau_channel *chan) |
| 41 | { |
| 42 | struct drm_device *dev = chan->drm->dev; |
| 43 | struct nv10_fence_priv *priv = chan->drm->fence; |
| 44 | struct nv10_fence_chan *fctx; |
| 45 | struct ttm_mem_reg *mem = &priv->bo->bo.mem; |
| 46 | struct nouveau_object *object; |
| 47 | u32 start = mem->start * PAGE_SIZE; |
| 48 | u32 limit = start + mem->size - 1; |
| 49 | int ret, i; |
| 50 | |
| 51 | fctx = chan->fence = kzalloc(sizeof(*fctx), GFP_KERNEL); |
| 52 | if (!fctx) |
| 53 | return -ENOMEM; |
| 54 | |
| 55 | nouveau_fence_context_new(&fctx->base); |
| 56 | fctx->base.emit = nv10_fence_emit; |
| 57 | fctx->base.read = nv10_fence_read; |
| 58 | fctx->base.sync = nv17_fence_sync; |
| 59 | |
| 60 | ret = nouveau_object_new(nv_object(chan->cli), chan->handle, |
| 61 | NvSema, 0x003d, |
| 62 | &(struct nv_dma_class) { |
| 63 | .flags = NV_DMA_TARGET_VRAM | |
| 64 | NV_DMA_ACCESS_RDWR, |
| 65 | .start = start, |
| 66 | .limit = limit, |
| 67 | }, sizeof(struct nv_dma_class), |
| 68 | &object); |
| 69 | |
| 70 | /* dma objects for display sync channel semaphore blocks */ |
| 71 | for (i = 0; !ret && i < dev->mode_config.num_crtc; i++) { |
| 72 | struct nouveau_bo *bo = nv50_display_crtc_sema(dev, i); |
| 73 | u32 start = bo->bo.mem.start * PAGE_SIZE; |
| 74 | u32 limit = start + bo->bo.mem.size - 1; |
| 75 | |
| 76 | ret = nouveau_object_new(nv_object(chan->cli), chan->handle, |
| 77 | NvEvoSema0 + i, 0x003d, |
| 78 | &(struct nv_dma_class) { |
| 79 | .flags = NV_DMA_TARGET_VRAM | |
| 80 | NV_DMA_ACCESS_RDWR, |
| 81 | .start = start, |
| 82 | .limit = limit, |
| 83 | }, sizeof(struct nv_dma_class), |
| 84 | &object); |
| 85 | } |
| 86 | |
| 87 | if (ret) |
| 88 | nv10_fence_context_del(chan); |
| 89 | return ret; |
| 90 | } |
| 91 | |
| 92 | int |
| 93 | nv50_fence_create(struct nouveau_drm *drm) |
| 94 | { |
| 95 | struct nv10_fence_priv *priv; |
| 96 | int ret = 0; |
| 97 | |
| 98 | priv = drm->fence = kzalloc(sizeof(*priv), GFP_KERNEL); |
| 99 | if (!priv) |
| 100 | return -ENOMEM; |
| 101 | |
| 102 | priv->base.dtor = nv10_fence_destroy; |
| 103 | priv->base.resume = nv17_fence_resume; |
| 104 | priv->base.context_new = nv50_fence_context_new; |
| 105 | priv->base.context_del = nv10_fence_context_del; |
| 106 | spin_lock_init(&priv->lock); |
| 107 | |
| 108 | ret = nouveau_bo_new(drm->dev, 4096, 0x1000, TTM_PL_FLAG_VRAM, |
| 109 | 0, 0x0000, NULL, &priv->bo); |
| 110 | if (!ret) { |
| 111 | ret = nouveau_bo_pin(priv->bo, TTM_PL_FLAG_VRAM); |
| 112 | if (!ret) { |
| 113 | ret = nouveau_bo_map(priv->bo); |
| 114 | if (ret) |
| 115 | nouveau_bo_unpin(priv->bo); |
| 116 | } |
| 117 | if (ret) |
| 118 | nouveau_bo_ref(NULL, &priv->bo); |
| 119 | } |
| 120 | |
| 121 | if (ret) { |
| 122 | nv10_fence_destroy(drm); |
| 123 | return ret; |
| 124 | } |
| 125 | |
| 126 | nouveau_bo_wr32(priv->bo, 0x000, 0x00000000); |
| 127 | return ret; |
| 128 | } |
| 129 | |