| 1 | /* |
| 2 | * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice shall be included in |
| 12 | * all copies or substantial portions of the Software. |
| 13 | * |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 17 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 20 | * DEALINGS IN THE SOFTWARE. |
| 21 | */ |
| 22 | |
| 23 | #include <subdev/ibus.h> |
| 24 | #include <subdev/timer.h> |
| 25 | |
| 26 | struct gk20a_ibus_priv { |
| 27 | struct nouveau_ibus base; |
| 28 | }; |
| 29 | |
| 30 | static void |
| 31 | gk20a_ibus_init_priv_ring(struct gk20a_ibus_priv *priv) |
| 32 | { |
| 33 | nv_mask(priv, 0x137250, 0x3f, 0); |
| 34 | |
| 35 | nv_mask(priv, 0x000200, 0x20, 0); |
| 36 | usleep_range(20, 30); |
| 37 | nv_mask(priv, 0x000200, 0x20, 0x20); |
| 38 | |
| 39 | nv_wr32(priv, 0x12004c, 0x4); |
| 40 | nv_wr32(priv, 0x122204, 0x2); |
| 41 | nv_rd32(priv, 0x122204); |
| 42 | } |
| 43 | |
| 44 | static void |
| 45 | gk20a_ibus_intr(struct nouveau_subdev *subdev) |
| 46 | { |
| 47 | struct gk20a_ibus_priv *priv = (void *)subdev; |
| 48 | u32 status0 = nv_rd32(priv, 0x120058); |
| 49 | |
| 50 | if (status0 & 0x7) { |
| 51 | nv_debug(priv, "resetting priv ring\n" ); |
| 52 | gk20a_ibus_init_priv_ring(priv); |
| 53 | } |
| 54 | |
| 55 | /* Acknowledge interrupt */ |
| 56 | nv_mask(priv, 0x12004c, 0x2, 0x2); |
| 57 | |
| 58 | if (!nv_wait(subdev, 0x12004c, 0x3f, 0x00)) |
| 59 | nv_warn(priv, "timeout waiting for ringmaster ack\n" ); |
| 60 | } |
| 61 | |
| 62 | static int |
| 63 | gk20a_ibus_init(struct nouveau_object *object) |
| 64 | { |
| 65 | struct gk20a_ibus_priv *priv = (void *)object; |
| 66 | int ret; |
| 67 | |
| 68 | ret = _nouveau_ibus_init(object); |
| 69 | if (ret) |
| 70 | return ret; |
| 71 | |
| 72 | gk20a_ibus_init_priv_ring(priv); |
| 73 | |
| 74 | return 0; |
| 75 | } |
| 76 | |
| 77 | static int |
| 78 | gk20a_ibus_ctor(struct nouveau_object *parent, struct nouveau_object *engine, |
| 79 | struct nouveau_oclass *oclass, void *data, u32 size, |
| 80 | struct nouveau_object **pobject) |
| 81 | { |
| 82 | struct gk20a_ibus_priv *priv; |
| 83 | int ret; |
| 84 | |
| 85 | ret = nouveau_ibus_create(parent, engine, oclass, &priv); |
| 86 | *pobject = nv_object(priv); |
| 87 | if (ret) |
| 88 | return ret; |
| 89 | |
| 90 | nv_subdev(priv)->intr = gk20a_ibus_intr; |
| 91 | return 0; |
| 92 | } |
| 93 | |
| 94 | struct nouveau_oclass |
| 95 | gk20a_ibus_oclass = { |
| 96 | .handle = NV_SUBDEV(IBUS, 0xea), |
| 97 | .ofuncs = &(struct nouveau_ofuncs) { |
| 98 | .ctor = gk20a_ibus_ctor, |
| 99 | .dtor = _nouveau_ibus_dtor, |
| 100 | .init = gk20a_ibus_init, |
| 101 | .fini = _nouveau_ibus_fini, |
| 102 | }, |
| 103 | }; |
| 104 | |