| 1 | /* $NetBSD: nouveau_engine_perfmon_nvc0.c,v 1.1.1.1 2014/08/06 12:36:27 riastradh Exp $ */ |
| 2 | |
| 3 | /* |
| 4 | * Copyright 2013 Red Hat Inc. |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 7 | * copy of this software and associated documentation files (the "Software"), |
| 8 | * to deal in the Software without restriction, including without limitation |
| 9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 10 | * and/or sell copies of the Software, and to permit persons to whom the |
| 11 | * Software is furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in |
| 14 | * all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 22 | * OTHER DEALINGS IN THE SOFTWARE. |
| 23 | * |
| 24 | * Authors: Ben Skeggs |
| 25 | */ |
| 26 | |
| 27 | #include <sys/cdefs.h> |
| 28 | __KERNEL_RCSID(0, "$NetBSD: nouveau_engine_perfmon_nvc0.c,v 1.1.1.1 2014/08/06 12:36:27 riastradh Exp $" ); |
| 29 | |
| 30 | #include "nvc0.h" |
| 31 | |
| 32 | /******************************************************************************* |
| 33 | * Perfmon object classes |
| 34 | ******************************************************************************/ |
| 35 | |
| 36 | /******************************************************************************* |
| 37 | * PPM context |
| 38 | ******************************************************************************/ |
| 39 | |
| 40 | /******************************************************************************* |
| 41 | * PPM engine/subdev functions |
| 42 | ******************************************************************************/ |
| 43 | |
| 44 | static const struct nouveau_specdom |
| 45 | nvc0_perfmon_hub[] = { |
| 46 | {} |
| 47 | }; |
| 48 | |
| 49 | static const struct nouveau_specdom |
| 50 | nvc0_perfmon_gpc[] = { |
| 51 | {} |
| 52 | }; |
| 53 | |
| 54 | static const struct nouveau_specdom |
| 55 | nvc0_perfmon_part[] = { |
| 56 | {} |
| 57 | }; |
| 58 | |
| 59 | static void |
| 60 | nvc0_perfctr_init(struct nouveau_perfmon *ppm, struct nouveau_perfdom *dom, |
| 61 | struct nouveau_perfctr *ctr) |
| 62 | { |
| 63 | struct nvc0_perfmon_priv *priv = (void *)ppm; |
| 64 | struct nvc0_perfmon_cntr *cntr = (void *)ctr; |
| 65 | u32 log = ctr->logic_op; |
| 66 | u32 src = 0x00000000; |
| 67 | int i; |
| 68 | |
| 69 | for (i = 0; i < 4 && ctr->signal[i]; i++) |
| 70 | src |= (ctr->signal[i] - dom->signal) << (i * 8); |
| 71 | |
| 72 | nv_wr32(priv, dom->addr + 0x09c, 0x00040002); |
| 73 | nv_wr32(priv, dom->addr + 0x100, 0x00000000); |
| 74 | nv_wr32(priv, dom->addr + 0x040 + (cntr->base.slot * 0x08), src); |
| 75 | nv_wr32(priv, dom->addr + 0x044 + (cntr->base.slot * 0x08), log); |
| 76 | } |
| 77 | |
| 78 | static void |
| 79 | nvc0_perfctr_read(struct nouveau_perfmon *ppm, struct nouveau_perfdom *dom, |
| 80 | struct nouveau_perfctr *ctr) |
| 81 | { |
| 82 | struct nvc0_perfmon_priv *priv = (void *)ppm; |
| 83 | struct nvc0_perfmon_cntr *cntr = (void *)ctr; |
| 84 | |
| 85 | switch (cntr->base.slot) { |
| 86 | case 0: cntr->base.ctr = nv_rd32(priv, dom->addr + 0x08c); break; |
| 87 | case 1: cntr->base.ctr = nv_rd32(priv, dom->addr + 0x088); break; |
| 88 | case 2: cntr->base.ctr = nv_rd32(priv, dom->addr + 0x080); break; |
| 89 | case 3: cntr->base.ctr = nv_rd32(priv, dom->addr + 0x090); break; |
| 90 | } |
| 91 | cntr->base.clk = nv_rd32(priv, dom->addr + 0x070); |
| 92 | } |
| 93 | |
| 94 | static void |
| 95 | nvc0_perfctr_next(struct nouveau_perfmon *ppm, struct nouveau_perfdom *dom) |
| 96 | { |
| 97 | struct nvc0_perfmon_priv *priv = (void *)ppm; |
| 98 | nv_wr32(priv, dom->addr + 0x06c, dom->signal_nr - 0x40 + 0x27); |
| 99 | nv_wr32(priv, dom->addr + 0x0ec, 0x00000011); |
| 100 | } |
| 101 | |
| 102 | const struct nouveau_funcdom |
| 103 | nvc0_perfctr_func = { |
| 104 | .init = nvc0_perfctr_init, |
| 105 | .read = nvc0_perfctr_read, |
| 106 | .next = nvc0_perfctr_next, |
| 107 | }; |
| 108 | |
| 109 | int |
| 110 | nvc0_perfmon_fini(struct nouveau_object *object, bool suspend) |
| 111 | { |
| 112 | struct nvc0_perfmon_priv *priv = (void *)object; |
| 113 | nv_mask(priv, 0x000200, 0x10000000, 0x00000000); |
| 114 | nv_mask(priv, 0x000200, 0x10000000, 0x10000000); |
| 115 | return nouveau_perfmon_fini(&priv->base, suspend); |
| 116 | } |
| 117 | |
| 118 | static int |
| 119 | nvc0_perfmon_ctor(struct nouveau_object *parent, struct nouveau_object *engine, |
| 120 | struct nouveau_oclass *oclass, void *data, u32 size, |
| 121 | struct nouveau_object **pobject) |
| 122 | { |
| 123 | struct nvc0_perfmon_priv *priv; |
| 124 | u32 mask; |
| 125 | int ret; |
| 126 | |
| 127 | ret = nouveau_perfmon_create(parent, engine, oclass, &priv); |
| 128 | *pobject = nv_object(priv); |
| 129 | if (ret) |
| 130 | return ret; |
| 131 | |
| 132 | ret = nouveau_perfdom_new(&priv->base, "pwr" , 0, 0, 0, 0, |
| 133 | nvc0_perfmon_pwr); |
| 134 | if (ret) |
| 135 | return ret; |
| 136 | |
| 137 | /* HUB */ |
| 138 | ret = nouveau_perfdom_new(&priv->base, "hub" , 0, 0x1b0000, 0, 0x200, |
| 139 | nvc0_perfmon_hub); |
| 140 | if (ret) |
| 141 | return ret; |
| 142 | |
| 143 | /* GPC */ |
| 144 | mask = (1 << nv_rd32(priv, 0x022430)) - 1; |
| 145 | mask &= ~nv_rd32(priv, 0x022504); |
| 146 | mask &= ~nv_rd32(priv, 0x022584); |
| 147 | |
| 148 | ret = nouveau_perfdom_new(&priv->base, "gpc" , mask, 0x180000, |
| 149 | 0x1000, 0x200, nvc0_perfmon_gpc); |
| 150 | if (ret) |
| 151 | return ret; |
| 152 | |
| 153 | /* PART */ |
| 154 | mask = (1 << nv_rd32(priv, 0x022438)) - 1; |
| 155 | mask &= ~nv_rd32(priv, 0x022548); |
| 156 | mask &= ~nv_rd32(priv, 0x0225c8); |
| 157 | |
| 158 | ret = nouveau_perfdom_new(&priv->base, "part" , mask, 0x1a0000, |
| 159 | 0x1000, 0x200, nvc0_perfmon_part); |
| 160 | if (ret) |
| 161 | return ret; |
| 162 | |
| 163 | nv_engine(priv)->cclass = &nouveau_perfmon_cclass; |
| 164 | nv_engine(priv)->sclass = nouveau_perfmon_sclass; |
| 165 | priv->base.last = 7; |
| 166 | return 0; |
| 167 | } |
| 168 | |
| 169 | struct nouveau_oclass |
| 170 | nvc0_perfmon_oclass = { |
| 171 | .handle = NV_ENGINE(PERFMON, 0xc0), |
| 172 | .ofuncs = &(struct nouveau_ofuncs) { |
| 173 | .ctor = nvc0_perfmon_ctor, |
| 174 | .dtor = _nouveau_perfmon_dtor, |
| 175 | .init = _nouveau_perfmon_init, |
| 176 | .fini = nvc0_perfmon_fini, |
| 177 | }, |
| 178 | }; |
| 179 | |