| 1 | /* $NetBSD: amdpmreg.h,v 1.4 2008/04/28 20:23:54 martin Exp $ */ |
| 2 | |
| 3 | /*- |
| 4 | * Copyright (c) 2002 The NetBSD Foundation, Inc. |
| 5 | * All rights reserved. |
| 6 | * |
| 7 | * This code is derived from software contributed to The NetBSD Foundation |
| 8 | * by Enami Tsugutomo. |
| 9 | * |
| 10 | * Redistribution and use in source and binary forms, with or without |
| 11 | * modification, are permitted provided that the following conditions |
| 12 | * are met: |
| 13 | * 1. Redistributions of source code must retain the above copyright |
| 14 | * notice, this list of conditions and the following disclaimer. |
| 15 | * 2. Redistributions in binary form must reproduce the above copyright |
| 16 | * notice, this list of conditions and the following disclaimer in the |
| 17 | * documentation and/or other materials provided with the distribution. |
| 18 | * |
| 19 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS |
| 20 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
| 21 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 22 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS |
| 23 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 24 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 25 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 26 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 27 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 28 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 29 | * POSSIBILITY OF SUCH DAMAGE. |
| 30 | */ |
| 31 | |
| 32 | #define AMDPM_CONFREG 0x40 |
| 33 | |
| 34 | /* 0x40: General Configuration 1 Register */ |
| 35 | #define AMDPM_RNGEN 0x00000080 /* random number generator enable */ |
| 36 | #define AMDPM_STOPTMR 0x00000040 /* stop free-running timer */ |
| 37 | |
| 38 | /* 0x41: General Configuration 2 Register */ |
| 39 | #define AMDPM_PMIOEN 0x00008000 /* system management IO space enable */ |
| 40 | #define AMDPM_TMRRST 0x00004000 /* reset free-running timer */ |
| 41 | #define AMDPM_TMR32 0x00000800 /* extended (32 bit) timer enable */ |
| 42 | |
| 43 | /* 0x42: SCI Interrupt Configuration Register */ |
| 44 | /* 0x43: Previous Power State Register */ |
| 45 | |
| 46 | #define AMDPM_PMPTR 0x58 /* PMxx System Management IO space |
| 47 | Pointer */ |
| 48 | #define NFORCE_PMPTR 0x14 /* nForce System Management IO space */ |
| 49 | #define AMDPM_PMBASE(x) ((x) & 0xff00) /* PMxx base address */ |
| 50 | #define NFORCE_PMBASE(x) ((x) & 0xfffc) /* nForce base address */ |
| 51 | #define AMDPM_PMSIZE 256 /* PMxx space size */ |
| 52 | |
| 53 | /* Registers in PMxx space */ |
| 54 | #define AMDPM_TMR 0x08 /* 24/32 bit timer register */ |
| 55 | |
| 56 | #define AMDPM_RNGDATA 0xf0 /* 32 bit random data register */ |
| 57 | #define AMDPM_RNGSTAT 0xf4 /* RNG status register */ |
| 58 | #define AMDPM_RNGDONE 0x00000001 /* Random number generation complete */ |
| 59 | |