| 1 | /* $NetBSD: aic6360.c,v 1.99 2009/11/23 02:13:46 rmind Exp $ */ |
| 2 | |
| 3 | /* |
| 4 | * Copyright (c) 1994, 1995, 1996 Charles M. Hannum. All rights reserved. |
| 5 | * |
| 6 | * Redistribution and use in source and binary forms, with or without |
| 7 | * modification, are permitted provided that the following conditions |
| 8 | * are met: |
| 9 | * 1. Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * 2. Redistributions in binary form must reproduce the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer in the |
| 13 | * documentation and/or other materials provided with the distribution. |
| 14 | * 3. All advertising materials mentioning features or use of this software |
| 15 | * must display the following acknowledgement: |
| 16 | * This product includes software developed by Charles M. Hannum. |
| 17 | * 4. The name of the author may not be used to endorse or promote products |
| 18 | * derived from this software without specific prior written permission. |
| 19 | * |
| 20 | * Copyright (c) 1994 Jarle Greipsland |
| 21 | * All rights reserved. |
| 22 | * |
| 23 | * Redistribution and use in source and binary forms, with or without |
| 24 | * modification, are permitted provided that the following conditions |
| 25 | * are met: |
| 26 | * 1. Redistributions of source code must retain the above copyright |
| 27 | * notice, this list of conditions and the following disclaimer. |
| 28 | * 2. Redistributions in binary form must reproduce the above copyright |
| 29 | * notice, this list of conditions and the following disclaimer in the |
| 30 | * documentation and/or other materials provided with the distribution. |
| 31 | * 3. The name of the author may not be used to endorse or promote products |
| 32 | * derived from this software without specific prior written permission. |
| 33 | * |
| 34 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| 35 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 36 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 37 | * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, |
| 38 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 39 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| 40 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 41 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
| 42 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
| 43 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 44 | * POSSIBILITY OF SUCH DAMAGE. |
| 45 | */ |
| 46 | |
| 47 | /* |
| 48 | * Acknowledgements: Many of the algorithms used in this driver are |
| 49 | * inspired by the work of Julian Elischer (julian@tfs.com) and |
| 50 | * Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million! |
| 51 | */ |
| 52 | |
| 53 | /* TODO list: |
| 54 | * 1) Get the DMA stuff working. |
| 55 | * 2) Get the iov/uio stuff working. Is this a good thing ??? |
| 56 | * 3) Get the synch stuff working. |
| 57 | * 4) Rewrite it to use malloc for the acb structs instead of static alloc.? |
| 58 | */ |
| 59 | |
| 60 | #include <sys/cdefs.h> |
| 61 | __KERNEL_RCSID(0, "$NetBSD: aic6360.c,v 1.99 2009/11/23 02:13:46 rmind Exp $" ); |
| 62 | |
| 63 | #include "opt_ddb.h" |
| 64 | |
| 65 | /* |
| 66 | * A few customizable items: |
| 67 | */ |
| 68 | |
| 69 | /* Use doubleword transfers to/from SCSI chip. Note: This requires |
| 70 | * motherboard support. Basicly, some motherboard chipsets are able to |
| 71 | * split a 32 bit I/O operation into two 16 bit I/O operations, |
| 72 | * transparently to the processor. This speeds up some things, notably long |
| 73 | * data transfers. |
| 74 | */ |
| 75 | #define AIC_USE_DWORDS 0 |
| 76 | |
| 77 | /* Synchronous data transfers? */ |
| 78 | #define AIC_USE_SYNCHRONOUS 0 |
| 79 | #define AIC_SYNC_REQ_ACK_OFS 8 |
| 80 | |
| 81 | /* Wide data transfers? */ |
| 82 | #define AIC_USE_WIDE 0 |
| 83 | #define AIC_MAX_WIDTH 0 |
| 84 | |
| 85 | /* Max attempts made to transmit a message */ |
| 86 | #define AIC_MSG_MAX_ATTEMPT 3 /* Not used now XXX */ |
| 87 | |
| 88 | /* Use DMA (else we do programmed I/O using string instructions) (not yet!)*/ |
| 89 | #define AIC_USE_EISA_DMA 0 |
| 90 | #define AIC_USE_ISA_DMA 0 |
| 91 | |
| 92 | /* How to behave on the (E)ISA bus when/if DMAing (on<<4) + off in us */ |
| 93 | #define EISA_BRST_TIM ((15<<4) + 1) /* 15us on, 1us off */ |
| 94 | |
| 95 | /* Some spin loop parameters (essentially how long to wait some places) |
| 96 | * The problem(?) is that sometimes we expect either to be able to transmit a |
| 97 | * byte or to get a new one from the SCSI bus pretty soon. In order to avoid |
| 98 | * returning from the interrupt just to get yanked back for the next byte we |
| 99 | * may spin in the interrupt routine waiting for this byte to come. How long? |
| 100 | * This is really (SCSI) device and processor dependent. Tuneable, I guess. |
| 101 | */ |
| 102 | #define AIC_MSGIN_SPIN 1 /* Will spinwait upto ?ms for a new msg byte */ |
| 103 | #define AIC_MSGOUT_SPIN 1 |
| 104 | |
| 105 | /* Include debug functions? At the end of this file there are a bunch of |
| 106 | * functions that will print out various information regarding queued SCSI |
| 107 | * commands, driver state and chip contents. You can call them from the |
| 108 | * kernel debugger. If you set AIC_DEBUG to 0 they are not included (the |
| 109 | * kernel uses less memory) but you lose the debugging facilities. |
| 110 | */ |
| 111 | #define AIC_DEBUG 1 |
| 112 | |
| 113 | #define AIC_ABORT_TIMEOUT 2000 /* time to wait for abort */ |
| 114 | |
| 115 | /* End of customizable parameters */ |
| 116 | |
| 117 | #if AIC_USE_EISA_DMA || AIC_USE_ISA_DMA |
| 118 | #error "I said not yet! Start paying attention... grumble" |
| 119 | #endif |
| 120 | |
| 121 | #include <sys/param.h> |
| 122 | #include <sys/systm.h> |
| 123 | #include <sys/callout.h> |
| 124 | #include <sys/kernel.h> |
| 125 | #include <sys/errno.h> |
| 126 | #include <sys/ioctl.h> |
| 127 | #include <sys/device.h> |
| 128 | #include <sys/buf.h> |
| 129 | #include <sys/proc.h> |
| 130 | #include <sys/queue.h> |
| 131 | |
| 132 | #include <sys/bus.h> |
| 133 | #include <sys/intr.h> |
| 134 | |
| 135 | #include <dev/scsipi/scsi_spc.h> |
| 136 | #include <dev/scsipi/scsi_all.h> |
| 137 | #include <dev/scsipi/scsipi_all.h> |
| 138 | #include <dev/scsipi/scsi_message.h> |
| 139 | #include <dev/scsipi/scsiconf.h> |
| 140 | |
| 141 | #include <dev/ic/aic6360reg.h> |
| 142 | #include <dev/ic/aic6360var.h> |
| 143 | |
| 144 | #ifndef DDB |
| 145 | #define Debugger() panic("should call debugger here (aic6360.c)") |
| 146 | #endif /* ! DDB */ |
| 147 | |
| 148 | #if AIC_DEBUG |
| 149 | int aic_debug = 0x00; /* AIC_SHOWSTART|AIC_SHOWMISC|AIC_SHOWTRACE; */ |
| 150 | #endif |
| 151 | |
| 152 | static void aic_minphys(struct buf *); |
| 153 | static void aic_done(struct aic_softc *, struct aic_acb *); |
| 154 | static void aic_dequeue(struct aic_softc *, struct aic_acb *); |
| 155 | static void aic_scsipi_request(struct scsipi_channel *, |
| 156 | scsipi_adapter_req_t, void *); |
| 157 | static int aic_poll(struct aic_softc *, struct scsipi_xfer *, int); |
| 158 | static void aic_select(struct aic_softc *, struct aic_acb *); |
| 159 | static void aic_timeout(void *); |
| 160 | static void aic_sched(struct aic_softc *); |
| 161 | static void aic_scsi_reset(struct aic_softc *); |
| 162 | static void aic_reset(struct aic_softc *); |
| 163 | static void aic_free_acb(struct aic_softc *, struct aic_acb *); |
| 164 | static struct aic_acb* aic_get_acb(struct aic_softc *); |
| 165 | static int aic_reselect(struct aic_softc *, int); |
| 166 | static void aic_sense(struct aic_softc *, struct aic_acb *); |
| 167 | static void aic_msgin(struct aic_softc *); |
| 168 | static void aic_abort(struct aic_softc *, struct aic_acb *); |
| 169 | static void aic_msgout(struct aic_softc *); |
| 170 | static int aic_dataout_pio(struct aic_softc *, u_char *, int); |
| 171 | static int aic_datain_pio(struct aic_softc *, u_char *, int); |
| 172 | static void aic_update_xfer_mode(struct aic_softc *, int); |
| 173 | #if AIC_DEBUG |
| 174 | static void aic_print_acb(struct aic_acb *); |
| 175 | void aic_dump_driver(struct aic_softc *); |
| 176 | void aic_dump6360(struct aic_softc *); |
| 177 | static void aic_show_scsi_cmd(struct aic_acb *); |
| 178 | void aic_print_active_acb(void); |
| 179 | #endif |
| 180 | |
| 181 | /* |
| 182 | * INITIALIZATION ROUTINES (probe, attach ++) |
| 183 | */ |
| 184 | |
| 185 | /* Do the real search-for-device. |
| 186 | * Prerequisite: sc->sc_iobase should be set to the proper value |
| 187 | */ |
| 188 | int |
| 189 | aic_find(bus_space_tag_t iot, bus_space_handle_t ioh) |
| 190 | { |
| 191 | char chip_id[sizeof(IDSTRING)]; /* For chips that support it */ |
| 192 | int i; |
| 193 | |
| 194 | /* Remove aic6360 from possible powerdown mode */ |
| 195 | bus_space_write_1(iot, ioh, DMACNTRL0, 0); |
| 196 | |
| 197 | /* Thanks to mark@aggregate.com for the new method for detecting |
| 198 | * whether the chip is present or not. Bonus: may also work for |
| 199 | * the AIC-6260! |
| 200 | */ |
| 201 | AIC_TRACE(("aic: probing for aic-chip\n" )); |
| 202 | /* |
| 203 | * Linux also init's the stack to 1-16 and then clears it, |
| 204 | * 6260's don't appear to have an ID reg - mpg |
| 205 | */ |
| 206 | /* Push the sequence 0,1,..,15 on the stack */ |
| 207 | #define STSIZE 16 |
| 208 | bus_space_write_1(iot, ioh, DMACNTRL1, 0); /* Reset stack pointer */ |
| 209 | for (i = 0; i < STSIZE; i++) |
| 210 | bus_space_write_1(iot, ioh, STACK, i); |
| 211 | |
| 212 | /* See if we can pull out the same sequence */ |
| 213 | bus_space_write_1(iot, ioh, DMACNTRL1, 0); |
| 214 | for (i = 0; i < STSIZE && bus_space_read_1(iot, ioh, STACK) == i; i++) |
| 215 | ; |
| 216 | if (i != STSIZE) { |
| 217 | AIC_START(("STACK futzed at %d.\n" , i)); |
| 218 | return 0; |
| 219 | } |
| 220 | |
| 221 | /* See if we can pull the id string out of the ID register, |
| 222 | * now only used for informational purposes. |
| 223 | */ |
| 224 | memset(chip_id, 0, sizeof(chip_id)); |
| 225 | bus_space_read_multi_1(iot, ioh, ID, chip_id, sizeof(IDSTRING) - 1); |
| 226 | AIC_START(("AIC found ID: %s " ,chip_id)); |
| 227 | AIC_START(("chip revision %d\n" , |
| 228 | (int)bus_space_read_1(iot, ioh, REV))); |
| 229 | |
| 230 | return 1; |
| 231 | } |
| 232 | |
| 233 | /* |
| 234 | * Attach the AIC6360, fill out some high and low level data structures |
| 235 | */ |
| 236 | void |
| 237 | aicattach(struct aic_softc *sc) |
| 238 | { |
| 239 | struct scsipi_adapter *adapt = &sc->sc_adapter; |
| 240 | struct scsipi_channel *chan = &sc->sc_channel; |
| 241 | |
| 242 | AIC_TRACE(("aicattach " )); |
| 243 | sc->sc_state = AIC_INIT; |
| 244 | |
| 245 | sc->sc_initiator = 7; |
| 246 | sc->sc_freq = 20; /* XXXX Assume 20 MHz. */ |
| 247 | |
| 248 | /* |
| 249 | * These are the bounds of the sync period, based on the frequency of |
| 250 | * the chip's clock input and the size and offset of the sync period |
| 251 | * register. |
| 252 | * |
| 253 | * For a 20MHz clock, this gives us 25, or 100nS, or 10MB/s, as a |
| 254 | * maximum transfer rate, and 112.5, or 450nS, or 2.22MB/s, as a |
| 255 | * minimum transfer rate. |
| 256 | */ |
| 257 | sc->sc_minsync = (2 * 250) / sc->sc_freq; |
| 258 | sc->sc_maxsync = (9 * 250) / sc->sc_freq; |
| 259 | |
| 260 | /* |
| 261 | * Fill in the scsipi_adapter. |
| 262 | */ |
| 263 | adapt->adapt_dev = sc->sc_dev; |
| 264 | adapt->adapt_nchannels = 1; |
| 265 | adapt->adapt_openings = 8; |
| 266 | adapt->adapt_max_periph = 1; |
| 267 | adapt->adapt_request = aic_scsipi_request; |
| 268 | adapt->adapt_minphys = aic_minphys; |
| 269 | |
| 270 | /* |
| 271 | * Fill in the scsipi_channel. |
| 272 | */ |
| 273 | chan->chan_adapter = adapt; |
| 274 | chan->chan_bustype = &scsi_bustype; |
| 275 | chan->chan_channel = 0; |
| 276 | chan->chan_ntargets = 8; |
| 277 | chan->chan_nluns = 8; |
| 278 | chan->chan_id = sc->sc_initiator; |
| 279 | |
| 280 | /* |
| 281 | * Add reference to adapter so that we drop the reference after |
| 282 | * config_found() to make sure the adatper is disabled. |
| 283 | */ |
| 284 | if (scsipi_adapter_addref(adapt) != 0) { |
| 285 | aprint_error_dev(sc->sc_dev, "unable to enable controller\n" ); |
| 286 | return; |
| 287 | } |
| 288 | |
| 289 | aic_init(sc, 1); /* Init chip and driver */ |
| 290 | |
| 291 | /* |
| 292 | * Ask the adapter what subunits are present |
| 293 | */ |
| 294 | sc->sc_child = config_found(sc->sc_dev, &sc->sc_channel, scsiprint); |
| 295 | scsipi_adapter_delref(adapt); |
| 296 | } |
| 297 | |
| 298 | int |
| 299 | aic_detach(device_t self, int flags) |
| 300 | { |
| 301 | struct aic_softc *sc = device_private(self); |
| 302 | int rv = 0; |
| 303 | |
| 304 | if (sc->sc_child != NULL) |
| 305 | rv = config_detach(sc->sc_child, flags); |
| 306 | |
| 307 | return (rv); |
| 308 | } |
| 309 | |
| 310 | /* Initialize AIC6360 chip itself |
| 311 | * The following conditions should hold: |
| 312 | * aic_isa_probe should have succeeded, i.e. the iobase address in aic_softc |
| 313 | * must be valid. |
| 314 | */ |
| 315 | static void |
| 316 | aic_reset(struct aic_softc *sc) |
| 317 | { |
| 318 | bus_space_tag_t iot = sc->sc_iot; |
| 319 | bus_space_handle_t ioh = sc->sc_ioh; |
| 320 | |
| 321 | /* |
| 322 | * Doc. recommends to clear these two registers before |
| 323 | * operations commence |
| 324 | */ |
| 325 | bus_space_write_1(iot, ioh, SCSITEST, 0); |
| 326 | bus_space_write_1(iot, ioh, TEST, 0); |
| 327 | |
| 328 | /* Reset SCSI-FIFO and abort any transfers */ |
| 329 | bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | CLRCH | CLRSTCNT); |
| 330 | |
| 331 | /* Reset DMA-FIFO */ |
| 332 | bus_space_write_1(iot, ioh, DMACNTRL0, RSTFIFO); |
| 333 | bus_space_write_1(iot, ioh, DMACNTRL1, 0); |
| 334 | |
| 335 | /* Disable all selection features */ |
| 336 | bus_space_write_1(iot, ioh, SCSISEQ, 0); |
| 337 | bus_space_write_1(iot, ioh, SXFRCTL1, 0); |
| 338 | |
| 339 | /* Disable some interrupts */ |
| 340 | bus_space_write_1(iot, ioh, SIMODE0, 0x00); |
| 341 | /* Clear a slew of interrupts */ |
| 342 | bus_space_write_1(iot, ioh, CLRSINT0, 0x7f); |
| 343 | |
| 344 | /* Disable some more interrupts */ |
| 345 | bus_space_write_1(iot, ioh, SIMODE1, 0x00); |
| 346 | /* Clear another slew of interrupts */ |
| 347 | bus_space_write_1(iot, ioh, CLRSINT1, 0xef); |
| 348 | |
| 349 | /* Disable synchronous transfers */ |
| 350 | bus_space_write_1(iot, ioh, SCSIRATE, 0); |
| 351 | |
| 352 | /* Haven't seen ant errors (yet) */ |
| 353 | bus_space_write_1(iot, ioh, CLRSERR, 0x07); |
| 354 | |
| 355 | /* Set our SCSI-ID */ |
| 356 | bus_space_write_1(iot, ioh, SCSIID, sc->sc_initiator << OID_S); |
| 357 | bus_space_write_1(iot, ioh, BRSTCNTRL, EISA_BRST_TIM); |
| 358 | } |
| 359 | |
| 360 | /* Pull the SCSI RST line for 500 us */ |
| 361 | static void |
| 362 | aic_scsi_reset(struct aic_softc *sc) |
| 363 | { |
| 364 | bus_space_tag_t iot = sc->sc_iot; |
| 365 | bus_space_handle_t ioh = sc->sc_ioh; |
| 366 | |
| 367 | bus_space_write_1(iot, ioh, SCSISEQ, SCSIRSTO); |
| 368 | delay(500); |
| 369 | bus_space_write_1(iot, ioh, SCSISEQ, 0); |
| 370 | delay(50); |
| 371 | } |
| 372 | |
| 373 | /* |
| 374 | * Initialize aic SCSI driver. |
| 375 | */ |
| 376 | void |
| 377 | aic_init(struct aic_softc *sc, int bus_reset) |
| 378 | { |
| 379 | struct aic_acb *acb; |
| 380 | int r; |
| 381 | |
| 382 | if (bus_reset) { |
| 383 | aic_reset(sc); |
| 384 | aic_scsi_reset(sc); |
| 385 | } |
| 386 | aic_reset(sc); |
| 387 | |
| 388 | if (sc->sc_state == AIC_INIT) { |
| 389 | /* First time through; initialize. */ |
| 390 | TAILQ_INIT(&sc->ready_list); |
| 391 | TAILQ_INIT(&sc->nexus_list); |
| 392 | TAILQ_INIT(&sc->free_list); |
| 393 | sc->sc_nexus = NULL; |
| 394 | acb = sc->sc_acb; |
| 395 | memset(acb, 0, sizeof(sc->sc_acb)); |
| 396 | for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) { |
| 397 | TAILQ_INSERT_TAIL(&sc->free_list, acb, chain); |
| 398 | acb++; |
| 399 | } |
| 400 | memset(&sc->sc_tinfo, 0, sizeof(sc->sc_tinfo)); |
| 401 | } else { |
| 402 | /* Cancel any active commands. */ |
| 403 | sc->sc_state = AIC_CLEANING; |
| 404 | if ((acb = sc->sc_nexus) != NULL) { |
| 405 | acb->xs->error = XS_DRIVER_STUFFUP; |
| 406 | callout_stop(&acb->xs->xs_callout); |
| 407 | aic_done(sc, acb); |
| 408 | } |
| 409 | while ((acb = sc->nexus_list.tqh_first) != NULL) { |
| 410 | acb->xs->error = XS_DRIVER_STUFFUP; |
| 411 | callout_stop(&acb->xs->xs_callout); |
| 412 | aic_done(sc, acb); |
| 413 | } |
| 414 | } |
| 415 | |
| 416 | sc->sc_prevphase = PH_INVALID; |
| 417 | for (r = 0; r < 8; r++) { |
| 418 | struct aic_tinfo *ti = &sc->sc_tinfo[r]; |
| 419 | |
| 420 | ti->flags = 0; |
| 421 | ti->period = ti->offset = 0; |
| 422 | ti->width = 0; |
| 423 | } |
| 424 | |
| 425 | sc->sc_state = AIC_IDLE; |
| 426 | bus_space_write_1(sc->sc_iot, sc->sc_ioh, DMACNTRL0, INTEN); |
| 427 | } |
| 428 | |
| 429 | static void |
| 430 | aic_free_acb(struct aic_softc *sc, struct aic_acb *acb) |
| 431 | { |
| 432 | int s; |
| 433 | |
| 434 | s = splbio(); |
| 435 | acb->flags = 0; |
| 436 | TAILQ_INSERT_HEAD(&sc->free_list, acb, chain); |
| 437 | splx(s); |
| 438 | } |
| 439 | |
| 440 | static struct aic_acb * |
| 441 | aic_get_acb(struct aic_softc *sc) |
| 442 | { |
| 443 | struct aic_acb *acb; |
| 444 | int s; |
| 445 | |
| 446 | s = splbio(); |
| 447 | acb = TAILQ_FIRST(&sc->free_list); |
| 448 | if (acb != NULL) { |
| 449 | TAILQ_REMOVE(&sc->free_list, acb, chain); |
| 450 | acb->flags |= ACB_ALLOC; |
| 451 | } |
| 452 | splx(s); |
| 453 | return (acb); |
| 454 | } |
| 455 | |
| 456 | /* |
| 457 | * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS |
| 458 | */ |
| 459 | |
| 460 | /* |
| 461 | * Expected sequence: |
| 462 | * 1) Command inserted into ready list |
| 463 | * 2) Command selected for execution |
| 464 | * 3) Command won arbitration and has selected target device |
| 465 | * 4) Send message out (identify message, eventually also sync.negotiations) |
| 466 | * 5) Send command |
| 467 | * 5a) Receive disconnect message, disconnect. |
| 468 | * 5b) Reselected by target |
| 469 | * 5c) Receive identify message from target. |
| 470 | * 6) Send or receive data |
| 471 | * 7) Receive status |
| 472 | * 8) Receive message (command complete etc.) |
| 473 | * 9) If status == SCSI_CHECK construct a synthetic request sense SCSI cmd. |
| 474 | * Repeat 2-8 (no disconnects please...) |
| 475 | */ |
| 476 | |
| 477 | /* |
| 478 | * Perform a request from the SCSIPI midlayer. |
| 479 | */ |
| 480 | static void |
| 481 | aic_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, |
| 482 | void *arg) |
| 483 | { |
| 484 | struct scsipi_xfer *xs; |
| 485 | struct scsipi_periph *periph; |
| 486 | struct aic_softc *sc = device_private(chan->chan_adapter->adapt_dev); |
| 487 | struct aic_acb *acb; |
| 488 | int s, flags; |
| 489 | |
| 490 | AIC_TRACE(("aic_request " )); |
| 491 | |
| 492 | switch (req) { |
| 493 | case ADAPTER_REQ_RUN_XFER: |
| 494 | xs = arg; |
| 495 | periph = xs->xs_periph; |
| 496 | |
| 497 | AIC_CMDS(("[0x%x, %d]->%d " , (int)xs->cmd->opcode, xs->cmdlen, |
| 498 | periph->periph_target)); |
| 499 | |
| 500 | if (!device_is_active(sc->sc_dev)) { |
| 501 | xs->error = XS_DRIVER_STUFFUP; |
| 502 | scsipi_done(xs); |
| 503 | return; |
| 504 | } |
| 505 | |
| 506 | flags = xs->xs_control; |
| 507 | acb = aic_get_acb(sc); |
| 508 | #ifdef DIAGNOSTIC |
| 509 | /* |
| 510 | * This should never happen as we track the resources |
| 511 | * in the mid-layer. |
| 512 | */ |
| 513 | if (acb == NULL) { |
| 514 | scsipi_printaddr(periph); |
| 515 | printf("unable to allocate acb\n" ); |
| 516 | panic("aic_scsipi_request" ); |
| 517 | } |
| 518 | #endif |
| 519 | |
| 520 | /* Initialize acb */ |
| 521 | acb->xs = xs; |
| 522 | acb->timeout = xs->timeout; |
| 523 | |
| 524 | if (xs->xs_control & XS_CTL_RESET) { |
| 525 | acb->flags |= ACB_RESET; |
| 526 | acb->scsipi_cmd_length = 0; |
| 527 | acb->data_length = 0; |
| 528 | } else { |
| 529 | memcpy(&acb->scsipi_cmd, xs->cmd, xs->cmdlen); |
| 530 | acb->scsipi_cmd_length = xs->cmdlen; |
| 531 | acb->data_addr = xs->data; |
| 532 | acb->data_length = xs->datalen; |
| 533 | } |
| 534 | acb->target_stat = 0; |
| 535 | |
| 536 | s = splbio(); |
| 537 | |
| 538 | TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain); |
| 539 | if (sc->sc_state == AIC_IDLE) |
| 540 | aic_sched(sc); |
| 541 | |
| 542 | splx(s); |
| 543 | |
| 544 | if ((flags & XS_CTL_POLL) == 0) |
| 545 | return; |
| 546 | |
| 547 | /* Not allowed to use interrupts, use polling instead */ |
| 548 | if (aic_poll(sc, xs, acb->timeout)) { |
| 549 | aic_timeout(acb); |
| 550 | if (aic_poll(sc, xs, acb->timeout)) |
| 551 | aic_timeout(acb); |
| 552 | } |
| 553 | return; |
| 554 | |
| 555 | case ADAPTER_REQ_GROW_RESOURCES: |
| 556 | /* XXX Not supported. */ |
| 557 | return; |
| 558 | |
| 559 | case ADAPTER_REQ_SET_XFER_MODE: |
| 560 | { |
| 561 | struct aic_tinfo *ti; |
| 562 | struct scsipi_xfer_mode *xm = arg; |
| 563 | |
| 564 | ti = &sc->sc_tinfo[xm->xm_target]; |
| 565 | ti->flags &= ~(DO_SYNC|DO_WIDE); |
| 566 | ti->period = 0; |
| 567 | ti->offset = 0; |
| 568 | |
| 569 | #if AIC_USE_SYNCHRONOUS |
| 570 | if (xm->xm_mode & PERIPH_CAP_SYNC) { |
| 571 | ti->flags |= DO_SYNC; |
| 572 | ti->period = sc->sc_minsync; |
| 573 | ti->offset = AIC_SYNC_REQ_ACK_OFS; |
| 574 | } |
| 575 | #endif |
| 576 | #if AIC_USE_WIDE |
| 577 | if (xm->xm_mode & PERIPH_CAP_WIDE16) { |
| 578 | ti->flags |= DO_WIDE; |
| 579 | ti->width = AIC_MAX_WIDTH; |
| 580 | } |
| 581 | #endif |
| 582 | /* |
| 583 | * If we're not going to negotiate, send the notification |
| 584 | * now, since it won't happen later. |
| 585 | */ |
| 586 | if ((ti->flags & (DO_SYNC|DO_WIDE)) == 0) |
| 587 | aic_update_xfer_mode(sc, xm->xm_target); |
| 588 | return; |
| 589 | } |
| 590 | } |
| 591 | } |
| 592 | |
| 593 | static void |
| 594 | aic_update_xfer_mode(struct aic_softc *sc, int target) |
| 595 | { |
| 596 | struct scsipi_xfer_mode xm; |
| 597 | struct aic_tinfo *ti = &sc->sc_tinfo[target]; |
| 598 | |
| 599 | xm.xm_target = target; |
| 600 | xm.xm_mode = 0; |
| 601 | xm.xm_period = 0; |
| 602 | xm.xm_offset = 0; |
| 603 | |
| 604 | if (ti->offset != 0) { |
| 605 | xm.xm_mode |= PERIPH_CAP_SYNC; |
| 606 | xm.xm_period = ti->period; |
| 607 | xm.xm_offset = ti->offset; |
| 608 | } |
| 609 | switch (ti->width) { |
| 610 | case 2: |
| 611 | xm.xm_mode |= PERIPH_CAP_WIDE32; |
| 612 | break; |
| 613 | case 1: |
| 614 | xm.xm_mode |= PERIPH_CAP_WIDE16; |
| 615 | break; |
| 616 | } |
| 617 | |
| 618 | scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_XFER_MODE, &xm); |
| 619 | } |
| 620 | |
| 621 | /* |
| 622 | * Adjust transfer size in buffer structure |
| 623 | */ |
| 624 | static void |
| 625 | aic_minphys(struct buf *bp) |
| 626 | { |
| 627 | |
| 628 | AIC_TRACE(("aic_minphys " )); |
| 629 | if (bp->b_bcount > (AIC_NSEG << PGSHIFT)) |
| 630 | bp->b_bcount = (AIC_NSEG << PGSHIFT); |
| 631 | minphys(bp); |
| 632 | } |
| 633 | |
| 634 | /* |
| 635 | * Used when interrupt driven I/O isn't allowed, e.g. during boot. |
| 636 | */ |
| 637 | static int |
| 638 | aic_poll(struct aic_softc *sc, struct scsipi_xfer *xs, int count) |
| 639 | { |
| 640 | bus_space_tag_t iot = sc->sc_iot; |
| 641 | bus_space_handle_t ioh = sc->sc_ioh; |
| 642 | |
| 643 | AIC_TRACE(("aic_poll " )); |
| 644 | while (count) { |
| 645 | /* |
| 646 | * If we had interrupts enabled, would we |
| 647 | * have got an interrupt? |
| 648 | */ |
| 649 | if ((bus_space_read_1(iot, ioh, DMASTAT) & INTSTAT) != 0) |
| 650 | aicintr(sc); |
| 651 | if ((xs->xs_status & XS_STS_DONE) != 0) |
| 652 | return 0; |
| 653 | delay(1000); |
| 654 | count--; |
| 655 | } |
| 656 | return 1; |
| 657 | } |
| 658 | |
| 659 | /* |
| 660 | * LOW LEVEL SCSI UTILITIES |
| 661 | */ |
| 662 | |
| 663 | static inline void |
| 664 | aic_sched_msgout(struct aic_softc *sc, u_char m) |
| 665 | { |
| 666 | bus_space_tag_t iot = sc->sc_iot; |
| 667 | bus_space_handle_t ioh = sc->sc_ioh; |
| 668 | |
| 669 | if (sc->sc_msgpriq == 0) |
| 670 | bus_space_write_1(iot, ioh, SCSISIG, sc->sc_phase | ATNO); |
| 671 | sc->sc_msgpriq |= m; |
| 672 | } |
| 673 | |
| 674 | /* |
| 675 | * Set synchronous transfer offset and period. |
| 676 | */ |
| 677 | #if !AIC_USE_SYNCHRONOUS |
| 678 | /* ARGSUSED */ |
| 679 | #endif |
| 680 | static inline void |
| 681 | aic_setsync(struct aic_softc *sc, struct aic_tinfo *ti) |
| 682 | { |
| 683 | #if AIC_USE_SYNCHRONOUS |
| 684 | bus_space_tag_t iot = sc->sc_iot; |
| 685 | bus_space_handle_t ioh = sc->sc_ioh; |
| 686 | |
| 687 | if (ti->offset != 0) |
| 688 | bus_space_write_1(iot, ioh, SCSIRATE, |
| 689 | ((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset); |
| 690 | else |
| 691 | bus_space_write_1(iot, ioh, SCSIRATE, 0); |
| 692 | #endif |
| 693 | } |
| 694 | |
| 695 | /* |
| 696 | * Start a selection. This is used by aic_sched() to select an idle target, |
| 697 | * and by aic_done() to immediately reselect a target to get sense information. |
| 698 | */ |
| 699 | static void |
| 700 | aic_select(struct aic_softc *sc, struct aic_acb *acb) |
| 701 | { |
| 702 | struct scsipi_periph *periph = acb->xs->xs_periph; |
| 703 | int target = periph->periph_target; |
| 704 | struct aic_tinfo *ti = &sc->sc_tinfo[target]; |
| 705 | bus_space_tag_t iot = sc->sc_iot; |
| 706 | bus_space_handle_t ioh = sc->sc_ioh; |
| 707 | |
| 708 | bus_space_write_1(iot, ioh, SCSIID, |
| 709 | sc->sc_initiator << OID_S | target); |
| 710 | aic_setsync(sc, ti); |
| 711 | bus_space_write_1(iot, ioh, SXFRCTL1, STIMO_256ms | ENSTIMER); |
| 712 | |
| 713 | /* Always enable reselections. */ |
| 714 | bus_space_write_1(iot, ioh, SIMODE0, ENSELDI | ENSELDO); |
| 715 | bus_space_write_1(iot, ioh, SIMODE1, ENSCSIRST | ENSELTIMO); |
| 716 | bus_space_write_1(iot, ioh, SCSISEQ, ENRESELI | ENSELO | ENAUTOATNO); |
| 717 | |
| 718 | sc->sc_state = AIC_SELECTING; |
| 719 | } |
| 720 | |
| 721 | static int |
| 722 | aic_reselect(struct aic_softc *sc, int message) |
| 723 | { |
| 724 | u_char selid, target, lun; |
| 725 | struct aic_acb *acb; |
| 726 | struct scsipi_periph *periph; |
| 727 | struct aic_tinfo *ti; |
| 728 | |
| 729 | /* |
| 730 | * The SCSI chip made a snapshot of the data bus while the reselection |
| 731 | * was being negotiated. This enables us to determine which target did |
| 732 | * the reselect. |
| 733 | */ |
| 734 | selid = sc->sc_selid & ~(1 << sc->sc_initiator); |
| 735 | if (selid & (selid - 1)) { |
| 736 | aprint_error_dev(sc->sc_dev, |
| 737 | "reselect with invalid selid %02x; " |
| 738 | "sending DEVICE RESET\n" , selid); |
| 739 | AIC_BREAK(); |
| 740 | goto reset; |
| 741 | } |
| 742 | |
| 743 | /* Search wait queue for disconnected cmd |
| 744 | * The list should be short, so I haven't bothered with |
| 745 | * any more sophisticated structures than a simple |
| 746 | * singly linked list. |
| 747 | */ |
| 748 | target = ffs(selid) - 1; |
| 749 | lun = message & 0x07; |
| 750 | for (acb = sc->nexus_list.tqh_first; acb != NULL; |
| 751 | acb = acb->chain.tqe_next) { |
| 752 | periph = acb->xs->xs_periph; |
| 753 | if (periph->periph_target == target && |
| 754 | periph->periph_lun == lun) |
| 755 | break; |
| 756 | } |
| 757 | if (acb == NULL) { |
| 758 | printf("%s: reselect from target %d lun %d with no nexus; " |
| 759 | "sending ABORT\n" , device_xname(sc->sc_dev), target, lun); |
| 760 | AIC_BREAK(); |
| 761 | goto abort; |
| 762 | } |
| 763 | |
| 764 | /* Make this nexus active again. */ |
| 765 | TAILQ_REMOVE(&sc->nexus_list, acb, chain); |
| 766 | sc->sc_state = AIC_CONNECTED; |
| 767 | sc->sc_nexus = acb; |
| 768 | ti = &sc->sc_tinfo[target]; |
| 769 | ti->lubusy |= (1 << lun); |
| 770 | aic_setsync(sc, ti); |
| 771 | |
| 772 | if (acb->flags & ACB_RESET) |
| 773 | aic_sched_msgout(sc, SEND_DEV_RESET); |
| 774 | else if (acb->flags & ACB_ABORT) |
| 775 | aic_sched_msgout(sc, SEND_ABORT); |
| 776 | |
| 777 | /* Do an implicit RESTORE POINTERS. */ |
| 778 | sc->sc_dp = acb->data_addr; |
| 779 | sc->sc_dleft = acb->data_length; |
| 780 | sc->sc_cp = (u_char *)&acb->scsipi_cmd; |
| 781 | sc->sc_cleft = acb->scsipi_cmd_length; |
| 782 | |
| 783 | return (0); |
| 784 | |
| 785 | reset: |
| 786 | aic_sched_msgout(sc, SEND_DEV_RESET); |
| 787 | return (1); |
| 788 | |
| 789 | abort: |
| 790 | aic_sched_msgout(sc, SEND_ABORT); |
| 791 | return (1); |
| 792 | } |
| 793 | |
| 794 | /* |
| 795 | * Schedule a SCSI operation. This has now been pulled out of the interrupt |
| 796 | * handler so that we may call it from aic_scsipi_request and aic_done. This |
| 797 | * may save us an unnecessary interrupt just to get things going. Should only |
| 798 | * be called when state == AIC_IDLE and at bio pl. |
| 799 | */ |
| 800 | static void |
| 801 | aic_sched(struct aic_softc *sc) |
| 802 | { |
| 803 | struct aic_acb *acb; |
| 804 | struct scsipi_periph *periph; |
| 805 | struct aic_tinfo *ti; |
| 806 | bus_space_tag_t iot = sc->sc_iot; |
| 807 | bus_space_handle_t ioh = sc->sc_ioh; |
| 808 | |
| 809 | if (!device_is_active(sc->sc_dev)) |
| 810 | return; |
| 811 | |
| 812 | /* |
| 813 | * Find first acb in ready queue that is for a target/lunit pair that |
| 814 | * is not busy. |
| 815 | */ |
| 816 | bus_space_write_1(iot, ioh, CLRSINT1, |
| 817 | CLRSELTIMO | CLRBUSFREE | CLRSCSIPERR); |
| 818 | for (acb = sc->ready_list.tqh_first; acb != NULL; |
| 819 | acb = acb->chain.tqe_next) { |
| 820 | periph = acb->xs->xs_periph; |
| 821 | ti = &sc->sc_tinfo[periph->periph_target]; |
| 822 | if ((ti->lubusy & (1 << periph->periph_lun)) == 0) { |
| 823 | AIC_MISC(("selecting %d:%d " , |
| 824 | periph->periph_target, periph->periph_lun)); |
| 825 | TAILQ_REMOVE(&sc->ready_list, acb, chain); |
| 826 | sc->sc_nexus = acb; |
| 827 | aic_select(sc, acb); |
| 828 | return; |
| 829 | } else |
| 830 | AIC_MISC(("%d:%d busy\n" , |
| 831 | periph->periph_target, periph->periph_lun)); |
| 832 | } |
| 833 | AIC_MISC(("idle " )); |
| 834 | /* Nothing to start; just enable reselections and wait. */ |
| 835 | bus_space_write_1(iot, ioh, SIMODE0, ENSELDI); |
| 836 | bus_space_write_1(iot, ioh, SIMODE1, ENSCSIRST); |
| 837 | bus_space_write_1(iot, ioh, SCSISEQ, ENRESELI); |
| 838 | } |
| 839 | |
| 840 | static void |
| 841 | aic_sense(struct aic_softc *sc, struct aic_acb *acb) |
| 842 | { |
| 843 | struct scsipi_xfer *xs = acb->xs; |
| 844 | struct scsipi_periph *periph = xs->xs_periph; |
| 845 | struct aic_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; |
| 846 | struct scsi_request_sense *ss = (void *)&acb->scsipi_cmd; |
| 847 | |
| 848 | AIC_MISC(("requesting sense " )); |
| 849 | /* Next, setup a request sense command block */ |
| 850 | memset(ss, 0, sizeof(*ss)); |
| 851 | ss->opcode = SCSI_REQUEST_SENSE; |
| 852 | ss->byte2 = periph->periph_lun << 5; |
| 853 | ss->length = sizeof(struct scsi_sense_data); |
| 854 | acb->scsipi_cmd_length = sizeof(*ss); |
| 855 | acb->data_addr = (char *)&xs->sense.scsi_sense; |
| 856 | acb->data_length = sizeof(struct scsi_sense_data); |
| 857 | acb->flags |= ACB_SENSE; |
| 858 | ti->senses++; |
| 859 | if (acb->flags & ACB_NEXUS) |
| 860 | ti->lubusy &= ~(1 << periph->periph_lun); |
| 861 | if (acb == sc->sc_nexus) { |
| 862 | aic_select(sc, acb); |
| 863 | } else { |
| 864 | aic_dequeue(sc, acb); |
| 865 | TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); |
| 866 | if (sc->sc_state == AIC_IDLE) |
| 867 | aic_sched(sc); |
| 868 | } |
| 869 | } |
| 870 | |
| 871 | /* |
| 872 | * POST PROCESSING OF SCSI_CMD (usually current) |
| 873 | */ |
| 874 | static void |
| 875 | aic_done(struct aic_softc *sc, struct aic_acb *acb) |
| 876 | { |
| 877 | struct scsipi_xfer *xs = acb->xs; |
| 878 | struct scsipi_periph *periph = xs->xs_periph; |
| 879 | struct aic_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; |
| 880 | |
| 881 | AIC_TRACE(("aic_done " )); |
| 882 | |
| 883 | /* |
| 884 | * Now, if we've come here with no error code, i.e. we've kept the |
| 885 | * initial XS_NOERROR, and the status code signals that we should |
| 886 | * check sense, we'll need to set up a request sense cmd block and |
| 887 | * push the command back into the ready queue *before* any other |
| 888 | * commands for this target/lunit, else we lose the sense info. |
| 889 | * We don't support chk sense conditions for the request sense cmd. |
| 890 | */ |
| 891 | if (xs->error == XS_NOERROR) { |
| 892 | if (acb->flags & ACB_ABORT) { |
| 893 | xs->error = XS_DRIVER_STUFFUP; |
| 894 | } else if (acb->flags & ACB_SENSE) { |
| 895 | xs->error = XS_SENSE; |
| 896 | } else if (acb->target_stat == SCSI_CHECK) { |
| 897 | /* First, save the return values */ |
| 898 | xs->resid = acb->data_length; |
| 899 | xs->status = acb->target_stat; |
| 900 | aic_sense(sc, acb); |
| 901 | return; |
| 902 | } else { |
| 903 | xs->resid = acb->data_length; |
| 904 | } |
| 905 | } |
| 906 | |
| 907 | #if AIC_DEBUG |
| 908 | if ((aic_debug & AIC_SHOWMISC) != 0) { |
| 909 | if (xs->resid != 0) |
| 910 | printf("resid=%d " , xs->resid); |
| 911 | if (xs->error == XS_SENSE) |
| 912 | printf("sense=0x%02x\n" , xs->sense.scsi_sense.response_code); |
| 913 | else |
| 914 | printf("error=%d\n" , xs->error); |
| 915 | } |
| 916 | #endif |
| 917 | |
| 918 | /* |
| 919 | * Remove the ACB from whatever queue it happens to be on. |
| 920 | */ |
| 921 | if (acb->flags & ACB_NEXUS) |
| 922 | ti->lubusy &= ~(1 << periph->periph_lun); |
| 923 | if (acb == sc->sc_nexus) { |
| 924 | sc->sc_nexus = NULL; |
| 925 | sc->sc_state = AIC_IDLE; |
| 926 | aic_sched(sc); |
| 927 | } else |
| 928 | aic_dequeue(sc, acb); |
| 929 | |
| 930 | aic_free_acb(sc, acb); |
| 931 | ti->cmds++; |
| 932 | scsipi_done(xs); |
| 933 | } |
| 934 | |
| 935 | static void |
| 936 | aic_dequeue(struct aic_softc *sc, struct aic_acb *acb) |
| 937 | { |
| 938 | |
| 939 | if (acb->flags & ACB_NEXUS) { |
| 940 | TAILQ_REMOVE(&sc->nexus_list, acb, chain); |
| 941 | } else { |
| 942 | TAILQ_REMOVE(&sc->ready_list, acb, chain); |
| 943 | } |
| 944 | } |
| 945 | |
| 946 | /* |
| 947 | * INTERRUPT/PROTOCOL ENGINE |
| 948 | */ |
| 949 | |
| 950 | /* |
| 951 | * Precondition: |
| 952 | * The SCSI bus is already in the MSGI phase and there is a message byte |
| 953 | * on the bus, along with an asserted REQ signal. |
| 954 | */ |
| 955 | static void |
| 956 | aic_msgin(struct aic_softc *sc) |
| 957 | { |
| 958 | bus_space_tag_t iot = sc->sc_iot; |
| 959 | bus_space_handle_t ioh = sc->sc_ioh; |
| 960 | u_char sstat1; |
| 961 | int n; |
| 962 | |
| 963 | AIC_TRACE(("aic_msgin " )); |
| 964 | |
| 965 | if (sc->sc_prevphase == PH_MSGIN) { |
| 966 | /* This is a continuation of the previous message. */ |
| 967 | n = sc->sc_imp - sc->sc_imess; |
| 968 | goto nextbyte; |
| 969 | } |
| 970 | |
| 971 | /* This is a new MESSAGE IN phase. Clean up our state. */ |
| 972 | sc->sc_flags &= ~AIC_DROP_MSGIN; |
| 973 | |
| 974 | nextmsg: |
| 975 | n = 0; |
| 976 | sc->sc_imp = &sc->sc_imess[n]; |
| 977 | |
| 978 | nextbyte: |
| 979 | /* |
| 980 | * Read a whole message, but don't ack the last byte. If we reject the |
| 981 | * message, we have to assert ATN during the message transfer phase |
| 982 | * itself. |
| 983 | */ |
| 984 | for (;;) { |
| 985 | for (;;) { |
| 986 | sstat1 = bus_space_read_1(iot, ioh, SSTAT1); |
| 987 | if ((sstat1 & (REQINIT | PHASECHG | BUSFREE)) != 0) |
| 988 | break; |
| 989 | /* Wait for REQINIT. XXX Need timeout. */ |
| 990 | } |
| 991 | if ((sstat1 & (PHASECHG | BUSFREE)) != 0) { |
| 992 | /* |
| 993 | * Target left MESSAGE IN, probably because it |
| 994 | * a) noticed our ATN signal, or |
| 995 | * b) ran out of messages. |
| 996 | */ |
| 997 | goto out; |
| 998 | } |
| 999 | |
| 1000 | /* If parity error, just dump everything on the floor. */ |
| 1001 | if ((sstat1 & SCSIPERR) != 0) { |
| 1002 | sc->sc_flags |= AIC_DROP_MSGIN; |
| 1003 | aic_sched_msgout(sc, SEND_PARITY_ERROR); |
| 1004 | } |
| 1005 | |
| 1006 | /* Gather incoming message bytes if needed. */ |
| 1007 | if ((sc->sc_flags & AIC_DROP_MSGIN) == 0) { |
| 1008 | if (n >= AIC_MAX_MSG_LEN) { |
| 1009 | (void) bus_space_read_1(iot, ioh, SCSIDAT); |
| 1010 | sc->sc_flags |= AIC_DROP_MSGIN; |
| 1011 | aic_sched_msgout(sc, SEND_REJECT); |
| 1012 | } else { |
| 1013 | *sc->sc_imp++ = bus_space_read_1(iot, ioh, |
| 1014 | SCSIDAT); |
| 1015 | n++; |
| 1016 | /* |
| 1017 | * This testing is suboptimal, but most |
| 1018 | * messages will be of the one byte variety, so |
| 1019 | * it should not affect performance |
| 1020 | * significantly. |
| 1021 | */ |
| 1022 | if (n == 1 && MSG_IS1BYTE(sc->sc_imess[0])) |
| 1023 | break; |
| 1024 | if (n == 2 && MSG_IS2BYTE(sc->sc_imess[0])) |
| 1025 | break; |
| 1026 | if (n >= 3 && MSG_ISEXTENDED(sc->sc_imess[0]) && |
| 1027 | n == sc->sc_imess[1] + 2) |
| 1028 | break; |
| 1029 | } |
| 1030 | } else |
| 1031 | (void) bus_space_read_1(iot, ioh, SCSIDAT); |
| 1032 | |
| 1033 | /* |
| 1034 | * If we reach this spot we're either: |
| 1035 | * a) in the middle of a multi-byte message, or |
| 1036 | * b) dropping bytes. |
| 1037 | */ |
| 1038 | bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | SPIOEN); |
| 1039 | /* Ack the last byte read. */ |
| 1040 | (void) bus_space_read_1(iot, ioh, SCSIDAT); |
| 1041 | bus_space_write_1(iot, ioh, SXFRCTL0, CHEN); |
| 1042 | while ((bus_space_read_1(iot, ioh, SCSISIG) & ACKI) != 0) |
| 1043 | ; |
| 1044 | } |
| 1045 | |
| 1046 | AIC_MISC(("n=%d imess=0x%02x " , n, sc->sc_imess[0])); |
| 1047 | |
| 1048 | /* We now have a complete message. Parse it. */ |
| 1049 | switch (sc->sc_state) { |
| 1050 | struct aic_acb *acb; |
| 1051 | struct aic_tinfo *ti; |
| 1052 | |
| 1053 | case AIC_CONNECTED: |
| 1054 | AIC_ASSERT(sc->sc_nexus != NULL); |
| 1055 | acb = sc->sc_nexus; |
| 1056 | ti = &sc->sc_tinfo[acb->xs->xs_periph->periph_target]; |
| 1057 | |
| 1058 | switch (sc->sc_imess[0]) { |
| 1059 | case MSG_CMDCOMPLETE: |
| 1060 | #if 0 |
| 1061 | /* impossible dleft is unsigned */ |
| 1062 | if (sc->sc_dleft < 0) { |
| 1063 | periph = acb->xs->xs_periph; |
| 1064 | printf("%s: %ld extra bytes from %d:%d\n" , |
| 1065 | device_xname(sc->sc_dev), |
| 1066 | (long)-sc->sc_dleft, |
| 1067 | periph->periph_target, periph->periph_lun); |
| 1068 | sc->sc_dleft = 0; |
| 1069 | } |
| 1070 | #endif |
| 1071 | acb->xs->resid = acb->data_length = sc->sc_dleft; |
| 1072 | sc->sc_state = AIC_CMDCOMPLETE; |
| 1073 | break; |
| 1074 | |
| 1075 | case MSG_PARITY_ERROR: |
| 1076 | /* Resend the last message. */ |
| 1077 | aic_sched_msgout(sc, sc->sc_lastmsg); |
| 1078 | break; |
| 1079 | |
| 1080 | case MSG_MESSAGE_REJECT: |
| 1081 | AIC_MISC(("message rejected %02x " , sc->sc_lastmsg)); |
| 1082 | switch (sc->sc_lastmsg) { |
| 1083 | #if AIC_USE_SYNCHRONOUS + AIC_USE_WIDE |
| 1084 | case SEND_IDENTIFY: |
| 1085 | ti->flags &= ~(DO_SYNC | DO_WIDE); |
| 1086 | ti->period = ti->offset = 0; |
| 1087 | aic_setsync(sc, ti); |
| 1088 | ti->width = 0; |
| 1089 | break; |
| 1090 | #endif |
| 1091 | #if AIC_USE_SYNCHRONOUS |
| 1092 | case SEND_SDTR: |
| 1093 | ti->flags &= ~DO_SYNC; |
| 1094 | ti->period = ti->offset = 0; |
| 1095 | aic_setsync(sc, ti); |
| 1096 | aic_update_xfer_mode(sc, |
| 1097 | acb->xs->xs_periph->periph_target); |
| 1098 | break; |
| 1099 | #endif |
| 1100 | #if AIC_USE_WIDE |
| 1101 | case SEND_WDTR: |
| 1102 | ti->flags &= ~DO_WIDE; |
| 1103 | ti->width = 0; |
| 1104 | aic_update_xfer_mode(sc, |
| 1105 | acb->xs->xs_periph->periph_target); |
| 1106 | break; |
| 1107 | #endif |
| 1108 | case SEND_INIT_DET_ERR: |
| 1109 | aic_sched_msgout(sc, SEND_ABORT); |
| 1110 | break; |
| 1111 | } |
| 1112 | break; |
| 1113 | |
| 1114 | case MSG_NOOP: |
| 1115 | break; |
| 1116 | |
| 1117 | case MSG_DISCONNECT: |
| 1118 | ti->dconns++; |
| 1119 | sc->sc_state = AIC_DISCONNECT; |
| 1120 | break; |
| 1121 | |
| 1122 | case MSG_SAVEDATAPOINTER: |
| 1123 | acb->data_addr = sc->sc_dp; |
| 1124 | acb->data_length = sc->sc_dleft; |
| 1125 | break; |
| 1126 | |
| 1127 | case MSG_RESTOREPOINTERS: |
| 1128 | sc->sc_dp = acb->data_addr; |
| 1129 | sc->sc_dleft = acb->data_length; |
| 1130 | sc->sc_cp = (u_char *)&acb->scsipi_cmd; |
| 1131 | sc->sc_cleft = acb->scsipi_cmd_length; |
| 1132 | break; |
| 1133 | |
| 1134 | case MSG_EXTENDED: |
| 1135 | switch (sc->sc_imess[2]) { |
| 1136 | #if AIC_USE_SYNCHRONOUS |
| 1137 | case MSG_EXT_SDTR: |
| 1138 | if (sc->sc_imess[1] != 3) |
| 1139 | goto reject; |
| 1140 | ti->period = sc->sc_imess[3]; |
| 1141 | ti->offset = sc->sc_imess[4]; |
| 1142 | ti->flags &= ~DO_SYNC; |
| 1143 | if (ti->offset == 0) { |
| 1144 | } else if (ti->period < sc->sc_minsync || |
| 1145 | ti->period > sc->sc_maxsync || |
| 1146 | ti->offset > 8) { |
| 1147 | ti->period = ti->offset = 0; |
| 1148 | aic_sched_msgout(sc, SEND_SDTR); |
| 1149 | } else { |
| 1150 | aic_update_xfer_mode(sc, |
| 1151 | acb->xs->xs_periph->periph_target); |
| 1152 | } |
| 1153 | aic_setsync(sc, ti); |
| 1154 | break; |
| 1155 | #endif |
| 1156 | |
| 1157 | #if AIC_USE_WIDE |
| 1158 | case MSG_EXT_WDTR: |
| 1159 | if (sc->sc_imess[1] != 2) |
| 1160 | goto reject; |
| 1161 | ti->width = sc->sc_imess[3]; |
| 1162 | ti->flags &= ~DO_WIDE; |
| 1163 | if (ti->width == 0) { |
| 1164 | } else if (ti->width > AIC_MAX_WIDTH) { |
| 1165 | ti->width = 0; |
| 1166 | aic_sched_msgout(sc, SEND_WDTR); |
| 1167 | } else { |
| 1168 | aic_update_xfer_mode(sc, |
| 1169 | acb->xs->xs_periph->periph_target); |
| 1170 | } |
| 1171 | break; |
| 1172 | #endif |
| 1173 | |
| 1174 | default: |
| 1175 | printf("%s: unrecognized MESSAGE EXTENDED; " |
| 1176 | "sending REJECT\n" , |
| 1177 | device_xname(sc->sc_dev)); |
| 1178 | AIC_BREAK(); |
| 1179 | goto reject; |
| 1180 | } |
| 1181 | break; |
| 1182 | |
| 1183 | default: |
| 1184 | printf("%s: unrecognized MESSAGE; sending REJECT\n" , |
| 1185 | device_xname(sc->sc_dev)); |
| 1186 | AIC_BREAK(); |
| 1187 | reject: |
| 1188 | aic_sched_msgout(sc, SEND_REJECT); |
| 1189 | break; |
| 1190 | } |
| 1191 | break; |
| 1192 | |
| 1193 | case AIC_RESELECTED: |
| 1194 | if (!MSG_ISIDENTIFY(sc->sc_imess[0])) { |
| 1195 | printf("%s: reselect without IDENTIFY; " |
| 1196 | "sending DEVICE RESET\n" , device_xname(sc->sc_dev)); |
| 1197 | AIC_BREAK(); |
| 1198 | goto reset; |
| 1199 | } |
| 1200 | |
| 1201 | (void) aic_reselect(sc, sc->sc_imess[0]); |
| 1202 | break; |
| 1203 | |
| 1204 | default: |
| 1205 | aprint_error_dev(sc->sc_dev, |
| 1206 | "unexpected MESSAGE IN; sending DEVICE RESET\n" ); |
| 1207 | AIC_BREAK(); |
| 1208 | reset: |
| 1209 | aic_sched_msgout(sc, SEND_DEV_RESET); |
| 1210 | break; |
| 1211 | |
| 1212 | #ifdef notdef |
| 1213 | abort: |
| 1214 | aic_sched_msgout(sc, SEND_ABORT); |
| 1215 | break; |
| 1216 | #endif |
| 1217 | } |
| 1218 | |
| 1219 | bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | SPIOEN); |
| 1220 | /* Ack the last message byte. */ |
| 1221 | (void) bus_space_read_1(iot, ioh, SCSIDAT); |
| 1222 | bus_space_write_1(iot, ioh, SXFRCTL0, CHEN); |
| 1223 | while ((bus_space_read_1(iot, ioh, SCSISIG) & ACKI) != 0) |
| 1224 | ; |
| 1225 | |
| 1226 | /* Go get the next message, if any. */ |
| 1227 | goto nextmsg; |
| 1228 | |
| 1229 | out: |
| 1230 | AIC_MISC(("n=%d imess=0x%02x " , n, sc->sc_imess[0])); |
| 1231 | } |
| 1232 | |
| 1233 | /* |
| 1234 | * Send the highest priority, scheduled message. |
| 1235 | */ |
| 1236 | static void |
| 1237 | aic_msgout(struct aic_softc *sc) |
| 1238 | { |
| 1239 | bus_space_tag_t iot = sc->sc_iot; |
| 1240 | bus_space_handle_t ioh = sc->sc_ioh; |
| 1241 | #if AIC_USE_SYNCHRONOUS |
| 1242 | struct aic_tinfo *ti; |
| 1243 | #endif |
| 1244 | u_char sstat1; |
| 1245 | int n; |
| 1246 | |
| 1247 | AIC_TRACE(("aic_msgout " )); |
| 1248 | |
| 1249 | /* Reset the FIFO. */ |
| 1250 | bus_space_write_1(iot, ioh, DMACNTRL0, RSTFIFO); |
| 1251 | /* Enable REQ/ACK protocol. */ |
| 1252 | bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | SPIOEN); |
| 1253 | |
| 1254 | if (sc->sc_prevphase == PH_MSGOUT) { |
| 1255 | if (sc->sc_omp == sc->sc_omess) { |
| 1256 | /* |
| 1257 | * This is a retransmission. |
| 1258 | * |
| 1259 | * We get here if the target stayed in MESSAGE OUT |
| 1260 | * phase. Section 5.1.9.2 of the SCSI 2 spec indicates |
| 1261 | * that all of the previously transmitted messages must |
| 1262 | * be sent again, in the same order. Therefore, we |
| 1263 | * requeue all the previously transmitted messages, and |
| 1264 | * start again from the top. Our simple priority |
| 1265 | * scheme keeps the messages in the right order. |
| 1266 | */ |
| 1267 | AIC_MISC(("retransmitting " )); |
| 1268 | sc->sc_msgpriq |= sc->sc_msgoutq; |
| 1269 | /* |
| 1270 | * Set ATN. If we're just sending a trivial 1-byte |
| 1271 | * message, we'll clear ATN later on anyway. |
| 1272 | */ |
| 1273 | bus_space_write_1(iot, ioh, SCSISIG, PH_MSGOUT | ATNO); |
| 1274 | } else { |
| 1275 | /* This is a continuation of the previous message. */ |
| 1276 | n = sc->sc_omp - sc->sc_omess; |
| 1277 | goto nextbyte; |
| 1278 | } |
| 1279 | } |
| 1280 | |
| 1281 | /* No messages transmitted so far. */ |
| 1282 | sc->sc_msgoutq = 0; |
| 1283 | sc->sc_lastmsg = 0; |
| 1284 | |
| 1285 | nextmsg: |
| 1286 | /* Pick up highest priority message. */ |
| 1287 | sc->sc_currmsg = sc->sc_msgpriq & -sc->sc_msgpriq; |
| 1288 | sc->sc_msgpriq &= ~sc->sc_currmsg; |
| 1289 | sc->sc_msgoutq |= sc->sc_currmsg; |
| 1290 | |
| 1291 | /* Build the outgoing message data. */ |
| 1292 | switch (sc->sc_currmsg) { |
| 1293 | case SEND_IDENTIFY: |
| 1294 | AIC_ASSERT(sc->sc_nexus != NULL); |
| 1295 | sc->sc_omess[0] = |
| 1296 | MSG_IDENTIFY(sc->sc_nexus->xs->xs_periph->periph_lun, 1); |
| 1297 | n = 1; |
| 1298 | break; |
| 1299 | |
| 1300 | #if AIC_USE_SYNCHRONOUS |
| 1301 | case SEND_SDTR: |
| 1302 | AIC_ASSERT(sc->sc_nexus != NULL); |
| 1303 | ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target]; |
| 1304 | sc->sc_omess[4] = MSG_EXTENDED; |
| 1305 | sc->sc_omess[3] = 3; |
| 1306 | sc->sc_omess[2] = MSG_EXT_SDTR; |
| 1307 | sc->sc_omess[1] = ti->period >> 2; |
| 1308 | sc->sc_omess[0] = ti->offset; |
| 1309 | n = 5; |
| 1310 | break; |
| 1311 | #endif |
| 1312 | |
| 1313 | #if AIC_USE_WIDE |
| 1314 | case SEND_WDTR: |
| 1315 | AIC_ASSERT(sc->sc_nexus != NULL); |
| 1316 | ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target]; |
| 1317 | sc->sc_omess[3] = MSG_EXTENDED; |
| 1318 | sc->sc_omess[2] = 2; |
| 1319 | sc->sc_omess[1] = MSG_EXT_WDTR; |
| 1320 | sc->sc_omess[0] = ti->width; |
| 1321 | n = 4; |
| 1322 | break; |
| 1323 | #endif |
| 1324 | |
| 1325 | case SEND_DEV_RESET: |
| 1326 | sc->sc_flags |= AIC_ABORTING; |
| 1327 | sc->sc_omess[0] = MSG_BUS_DEV_RESET; |
| 1328 | n = 1; |
| 1329 | break; |
| 1330 | |
| 1331 | case SEND_REJECT: |
| 1332 | sc->sc_omess[0] = MSG_MESSAGE_REJECT; |
| 1333 | n = 1; |
| 1334 | break; |
| 1335 | |
| 1336 | case SEND_PARITY_ERROR: |
| 1337 | sc->sc_omess[0] = MSG_PARITY_ERROR; |
| 1338 | n = 1; |
| 1339 | break; |
| 1340 | |
| 1341 | case SEND_INIT_DET_ERR: |
| 1342 | sc->sc_omess[0] = MSG_INITIATOR_DET_ERR; |
| 1343 | n = 1; |
| 1344 | break; |
| 1345 | |
| 1346 | case SEND_ABORT: |
| 1347 | sc->sc_flags |= AIC_ABORTING; |
| 1348 | sc->sc_omess[0] = MSG_ABORT; |
| 1349 | n = 1; |
| 1350 | break; |
| 1351 | |
| 1352 | default: |
| 1353 | aprint_error_dev(sc->sc_dev, |
| 1354 | "unexpected MESSAGE OUT; sending NOOP\n" ); |
| 1355 | AIC_BREAK(); |
| 1356 | sc->sc_omess[0] = MSG_NOOP; |
| 1357 | n = 1; |
| 1358 | break; |
| 1359 | } |
| 1360 | sc->sc_omp = &sc->sc_omess[n]; |
| 1361 | |
| 1362 | nextbyte: |
| 1363 | /* Send message bytes. */ |
| 1364 | for (;;) { |
| 1365 | for (;;) { |
| 1366 | sstat1 = bus_space_read_1(iot, ioh, SSTAT1); |
| 1367 | if ((sstat1 & (REQINIT | PHASECHG | BUSFREE)) != 0) |
| 1368 | break; |
| 1369 | /* Wait for REQINIT. XXX Need timeout. */ |
| 1370 | } |
| 1371 | if ((sstat1 & (PHASECHG | BUSFREE)) != 0) { |
| 1372 | /* |
| 1373 | * Target left MESSAGE OUT, possibly to reject |
| 1374 | * our message. |
| 1375 | * |
| 1376 | * If this is the last message being sent, then we |
| 1377 | * deassert ATN, since either the target is going to |
| 1378 | * ignore this message, or it's going to ask for a |
| 1379 | * retransmission via MESSAGE PARITY ERROR (in which |
| 1380 | * case we reassert ATN anyway). |
| 1381 | */ |
| 1382 | if (sc->sc_msgpriq == 0) |
| 1383 | bus_space_write_1(iot, ioh, CLRSINT1, CLRATNO); |
| 1384 | goto out; |
| 1385 | } |
| 1386 | |
| 1387 | /* Clear ATN before last byte if this is the last message. */ |
| 1388 | if (n == 1 && sc->sc_msgpriq == 0) |
| 1389 | bus_space_write_1(iot, ioh, CLRSINT1, CLRATNO); |
| 1390 | /* Send message byte. */ |
| 1391 | bus_space_write_1(iot, ioh, SCSIDAT, *--sc->sc_omp); |
| 1392 | --n; |
| 1393 | /* Keep track of the last message we've sent any bytes of. */ |
| 1394 | sc->sc_lastmsg = sc->sc_currmsg; |
| 1395 | /* Wait for ACK to be negated. XXX Need timeout. */ |
| 1396 | while ((bus_space_read_1(iot, ioh, SCSISIG) & ACKI) != 0) |
| 1397 | ; |
| 1398 | |
| 1399 | if (n == 0) |
| 1400 | break; |
| 1401 | } |
| 1402 | |
| 1403 | /* We get here only if the entire message has been transmitted. */ |
| 1404 | if (sc->sc_msgpriq != 0) { |
| 1405 | /* There are more outgoing messages. */ |
| 1406 | goto nextmsg; |
| 1407 | } |
| 1408 | |
| 1409 | /* |
| 1410 | * The last message has been transmitted. We need to remember the last |
| 1411 | * message transmitted (in case the target switches to MESSAGE IN phase |
| 1412 | * and sends a MESSAGE REJECT), and the list of messages transmitted |
| 1413 | * this time around (in case the target stays in MESSAGE OUT phase to |
| 1414 | * request a retransmit). |
| 1415 | */ |
| 1416 | |
| 1417 | out: |
| 1418 | /* Disable REQ/ACK protocol. */ |
| 1419 | bus_space_write_1(iot, ioh, SXFRCTL0, CHEN); |
| 1420 | } |
| 1421 | |
| 1422 | /* aic_dataout_pio: perform a data transfer using the FIFO datapath in the |
| 1423 | * aic6360 |
| 1424 | * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted |
| 1425 | * and ACK deasserted (i.e. waiting for a data byte) |
| 1426 | * This new revision has been optimized (I tried) to make the common case fast, |
| 1427 | * and the rarer cases (as a result) somewhat more comlex |
| 1428 | */ |
| 1429 | static int |
| 1430 | aic_dataout_pio(struct aic_softc *sc, u_char *p, int n) |
| 1431 | { |
| 1432 | bus_space_tag_t iot = sc->sc_iot; |
| 1433 | bus_space_handle_t ioh = sc->sc_ioh; |
| 1434 | u_char dmastat = 0; |
| 1435 | int out = 0; |
| 1436 | #define DOUTAMOUNT 128 /* Full FIFO */ |
| 1437 | |
| 1438 | AIC_MISC(("%02x%02x " , bus_space_read_1(iot, ioh, FIFOSTAT), |
| 1439 | bus_space_read_1(iot, ioh, SSTAT2))); |
| 1440 | |
| 1441 | /* Clear host FIFO and counter. */ |
| 1442 | bus_space_write_1(iot, ioh, DMACNTRL0, RSTFIFO | WRITE); |
| 1443 | /* Enable FIFOs. */ |
| 1444 | bus_space_write_1(iot, ioh, DMACNTRL0, ENDMA | DWORDPIO | WRITE); |
| 1445 | bus_space_write_1(iot, ioh, SXFRCTL0, SCSIEN | DMAEN | CHEN); |
| 1446 | |
| 1447 | /* Turn off ENREQINIT for now. */ |
| 1448 | bus_space_write_1(iot, ioh, SIMODE1, |
| 1449 | ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENPHASECHG); |
| 1450 | |
| 1451 | /* I have tried to make the main loop as tight as possible. This |
| 1452 | * means that some of the code following the loop is a bit more |
| 1453 | * complex than otherwise. |
| 1454 | */ |
| 1455 | while (n > 0) { |
| 1456 | for (;;) { |
| 1457 | dmastat = bus_space_read_1(iot, ioh, DMASTAT); |
| 1458 | if ((dmastat & (DFIFOEMP | INTSTAT)) != 0) |
| 1459 | break; |
| 1460 | } |
| 1461 | |
| 1462 | if ((dmastat & INTSTAT) != 0) |
| 1463 | goto phasechange; |
| 1464 | |
| 1465 | if (n >= DOUTAMOUNT) { |
| 1466 | n -= DOUTAMOUNT; |
| 1467 | out += DOUTAMOUNT; |
| 1468 | |
| 1469 | #if AIC_USE_DWORDS |
| 1470 | bus_space_write_multi_4(iot, ioh, DMADATALONG, |
| 1471 | (u_int32_t *) p, DOUTAMOUNT >> 2); |
| 1472 | #else |
| 1473 | bus_space_write_multi_2(iot, ioh, DMADATA, |
| 1474 | (u_int16_t *) p, DOUTAMOUNT >> 1); |
| 1475 | #endif |
| 1476 | |
| 1477 | p += DOUTAMOUNT; |
| 1478 | } else { |
| 1479 | int xfer; |
| 1480 | |
| 1481 | xfer = n; |
| 1482 | AIC_MISC(("%d> " , xfer)); |
| 1483 | |
| 1484 | n -= xfer; |
| 1485 | out += xfer; |
| 1486 | |
| 1487 | #if AIC_USE_DWORDS |
| 1488 | if (xfer >= 12) { |
| 1489 | bus_space_write_multi_4(iot, ioh, DMADATALONG, |
| 1490 | (u_int32_t *) p, xfer >> 2); |
| 1491 | p += xfer & ~3; |
| 1492 | xfer &= 3; |
| 1493 | } |
| 1494 | #else |
| 1495 | if (xfer >= 8) { |
| 1496 | bus_space_write_multi_2(iot, ioh, DMADATA, |
| 1497 | (u_int16_t *) p, xfer >> 1); |
| 1498 | p += xfer & ~1; |
| 1499 | xfer &= 1; |
| 1500 | } |
| 1501 | #endif |
| 1502 | |
| 1503 | if (xfer > 0) { |
| 1504 | bus_space_write_1(iot, ioh, DMACNTRL0, |
| 1505 | ENDMA | B8MODE | WRITE); |
| 1506 | bus_space_write_multi_1(iot, ioh, DMADATA, |
| 1507 | p, xfer); |
| 1508 | p += xfer; |
| 1509 | bus_space_write_1(iot, ioh, DMACNTRL0, |
| 1510 | ENDMA | DWORDPIO | WRITE); |
| 1511 | } |
| 1512 | } |
| 1513 | } |
| 1514 | |
| 1515 | if (out == 0) { |
| 1516 | bus_space_write_1(iot, ioh, SXFRCTL1, BITBUCKET); |
| 1517 | for (;;) { |
| 1518 | if ((bus_space_read_1(iot, ioh, DMASTAT) & INTSTAT) |
| 1519 | != 0) |
| 1520 | break; |
| 1521 | } |
| 1522 | bus_space_write_1(iot, ioh, SXFRCTL1, 0); |
| 1523 | AIC_MISC(("extra data " )); |
| 1524 | } else { |
| 1525 | /* See the bytes off chip */ |
| 1526 | for (;;) { |
| 1527 | dmastat = bus_space_read_1(iot, ioh, DMASTAT); |
| 1528 | if ((dmastat & INTSTAT) != 0) |
| 1529 | goto phasechange; |
| 1530 | if ((dmastat & DFIFOEMP) != 0 && |
| 1531 | (bus_space_read_1(iot, ioh, SSTAT2) & SEMPTY) != 0) |
| 1532 | break; |
| 1533 | } |
| 1534 | } |
| 1535 | |
| 1536 | phasechange: |
| 1537 | if ((dmastat & INTSTAT) != 0) { |
| 1538 | /* Some sort of phase change. */ |
| 1539 | int amount; |
| 1540 | |
| 1541 | /* Stop transfers, do some accounting */ |
| 1542 | amount = bus_space_read_1(iot, ioh, FIFOSTAT) |
| 1543 | + (bus_space_read_1(iot, ioh, SSTAT2) & 15); |
| 1544 | if (amount > 0) { |
| 1545 | out -= amount; |
| 1546 | bus_space_write_1(iot, ioh, DMACNTRL0, |
| 1547 | RSTFIFO | WRITE); |
| 1548 | bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | CLRCH); |
| 1549 | AIC_MISC(("+%d " , amount)); |
| 1550 | } |
| 1551 | } |
| 1552 | |
| 1553 | /* Turn on ENREQINIT again. */ |
| 1554 | bus_space_write_1(iot, ioh, SIMODE1, |
| 1555 | ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENREQINIT | ENPHASECHG); |
| 1556 | |
| 1557 | /* Stop the FIFO data path. */ |
| 1558 | bus_space_write_1(iot, ioh, SXFRCTL0, CHEN); |
| 1559 | bus_space_write_1(iot, ioh, DMACNTRL0, 0); |
| 1560 | |
| 1561 | return out; |
| 1562 | } |
| 1563 | |
| 1564 | /* aic_datain_pio: perform data transfers using the FIFO datapath in the |
| 1565 | * aic6360 |
| 1566 | * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted |
| 1567 | * and ACK deasserted (i.e. at least one byte is ready). |
| 1568 | * For now, uses a pretty dumb algorithm, hangs around until all data has been |
| 1569 | * transferred. This, is OK for fast targets, but not so smart for slow |
| 1570 | * targets which don't disconnect or for huge transfers. |
| 1571 | */ |
| 1572 | static int |
| 1573 | aic_datain_pio(struct aic_softc *sc, u_char *p, int n) |
| 1574 | { |
| 1575 | bus_space_tag_t iot = sc->sc_iot; |
| 1576 | bus_space_handle_t ioh = sc->sc_ioh; |
| 1577 | u_char dmastat; |
| 1578 | int in = 0; |
| 1579 | #define DINAMOUNT 128 /* Full FIFO */ |
| 1580 | |
| 1581 | AIC_MISC(("%02x%02x " , bus_space_read_1(iot, ioh, FIFOSTAT), |
| 1582 | bus_space_read_1(iot, ioh, SSTAT2))); |
| 1583 | |
| 1584 | /* Clear host FIFO and counter. */ |
| 1585 | bus_space_write_1(iot, ioh, DMACNTRL0, RSTFIFO); |
| 1586 | /* Enable FIFOs. */ |
| 1587 | bus_space_write_1(iot, ioh, DMACNTRL0, ENDMA | DWORDPIO); |
| 1588 | bus_space_write_1(iot, ioh, SXFRCTL0, SCSIEN | DMAEN | CHEN); |
| 1589 | |
| 1590 | /* Turn off ENREQINIT for now. */ |
| 1591 | bus_space_write_1(iot, ioh, SIMODE1, |
| 1592 | ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENPHASECHG); |
| 1593 | |
| 1594 | /* We leave this loop if one or more of the following is true: |
| 1595 | * a) phase != PH_DATAIN && FIFOs are empty |
| 1596 | * b) SCSIRSTI is set (a reset has occurred) or busfree is detected. |
| 1597 | */ |
| 1598 | while (n > 0) { |
| 1599 | /* Wait for fifo half full or phase mismatch */ |
| 1600 | for (;;) { |
| 1601 | dmastat = bus_space_read_1(iot, ioh, DMASTAT); |
| 1602 | if ((dmastat & (DFIFOFULL | INTSTAT)) != 0) |
| 1603 | break; |
| 1604 | } |
| 1605 | |
| 1606 | if ((dmastat & DFIFOFULL) != 0) { |
| 1607 | n -= DINAMOUNT; |
| 1608 | in += DINAMOUNT; |
| 1609 | |
| 1610 | #if AIC_USE_DWORDS |
| 1611 | bus_space_read_multi_4(iot, ioh, DMADATALONG, |
| 1612 | (u_int32_t *) p, DINAMOUNT >> 2); |
| 1613 | #else |
| 1614 | bus_space_read_multi_2(iot, ioh, DMADATA, |
| 1615 | (u_int16_t *) p, DINAMOUNT >> 1); |
| 1616 | #endif |
| 1617 | |
| 1618 | p += DINAMOUNT; |
| 1619 | } else { |
| 1620 | int xfer; |
| 1621 | |
| 1622 | xfer = min(bus_space_read_1(iot, ioh, FIFOSTAT), n); |
| 1623 | AIC_MISC((">%d " , xfer)); |
| 1624 | |
| 1625 | n -= xfer; |
| 1626 | in += xfer; |
| 1627 | |
| 1628 | #if AIC_USE_DWORDS |
| 1629 | if (xfer >= 12) { |
| 1630 | bus_space_read_multi_4(iot, ioh, DMADATALONG, |
| 1631 | (u_int32_t *) p, xfer >> 2); |
| 1632 | p += xfer & ~3; |
| 1633 | xfer &= 3; |
| 1634 | } |
| 1635 | #else |
| 1636 | if (xfer >= 8) { |
| 1637 | bus_space_read_multi_2(iot, ioh, DMADATA, |
| 1638 | (u_int16_t *) p, xfer >> 1); |
| 1639 | p += xfer & ~1; |
| 1640 | xfer &= 1; |
| 1641 | } |
| 1642 | #endif |
| 1643 | |
| 1644 | if (xfer > 0) { |
| 1645 | bus_space_write_1(iot, ioh, DMACNTRL0, |
| 1646 | ENDMA | B8MODE); |
| 1647 | bus_space_read_multi_1(iot, ioh, DMADATA, |
| 1648 | p, xfer); |
| 1649 | p += xfer; |
| 1650 | bus_space_write_1(iot, ioh, DMACNTRL0, |
| 1651 | ENDMA | DWORDPIO); |
| 1652 | } |
| 1653 | } |
| 1654 | |
| 1655 | if ((dmastat & INTSTAT) != 0) |
| 1656 | goto phasechange; |
| 1657 | } |
| 1658 | |
| 1659 | /* Some SCSI-devices are rude enough to transfer more data than what |
| 1660 | * was requested, e.g. 2048 bytes from a CD-ROM instead of the |
| 1661 | * requested 512. Test for progress, i.e. real transfers. If no real |
| 1662 | * transfers have been performed (n is probably already zero) and the |
| 1663 | * FIFO is not empty, waste some bytes.... |
| 1664 | */ |
| 1665 | if (in == 0) { |
| 1666 | bus_space_write_1(iot, ioh, SXFRCTL1, BITBUCKET); |
| 1667 | for (;;) { |
| 1668 | if ((bus_space_read_1(iot, ioh, DMASTAT) & INTSTAT) |
| 1669 | != 0) |
| 1670 | break; |
| 1671 | } |
| 1672 | bus_space_write_1(iot, ioh, SXFRCTL1, 0); |
| 1673 | AIC_MISC(("extra data " )); |
| 1674 | } |
| 1675 | |
| 1676 | phasechange: |
| 1677 | /* Turn on ENREQINIT again. */ |
| 1678 | bus_space_write_1(iot, ioh, SIMODE1, |
| 1679 | ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENREQINIT | ENPHASECHG); |
| 1680 | |
| 1681 | /* Stop the FIFO data path. */ |
| 1682 | bus_space_write_1(iot, ioh, SXFRCTL0, CHEN); |
| 1683 | bus_space_write_1(iot, ioh, DMACNTRL0, 0); |
| 1684 | |
| 1685 | return in; |
| 1686 | } |
| 1687 | |
| 1688 | /* |
| 1689 | * This is the workhorse routine of the driver. |
| 1690 | * Deficiencies (for now): |
| 1691 | * 1) always uses programmed I/O |
| 1692 | */ |
| 1693 | int |
| 1694 | aicintr(void *arg) |
| 1695 | { |
| 1696 | struct aic_softc *sc = arg; |
| 1697 | bus_space_tag_t iot = sc->sc_iot; |
| 1698 | bus_space_handle_t ioh = sc->sc_ioh; |
| 1699 | u_char sstat0, sstat1; |
| 1700 | struct aic_acb *acb; |
| 1701 | struct scsipi_periph *periph; |
| 1702 | struct aic_tinfo *ti; |
| 1703 | int n; |
| 1704 | |
| 1705 | if (!device_is_active(sc->sc_dev)) |
| 1706 | return (0); |
| 1707 | |
| 1708 | /* |
| 1709 | * Clear INTEN. We enable it again before returning. This makes the |
| 1710 | * interrupt esssentially level-triggered. |
| 1711 | */ |
| 1712 | bus_space_write_1(iot, ioh, DMACNTRL0, 0); |
| 1713 | |
| 1714 | AIC_TRACE(("aicintr " )); |
| 1715 | |
| 1716 | loop: |
| 1717 | /* |
| 1718 | * First check for abnormal conditions, such as reset. |
| 1719 | */ |
| 1720 | sstat1 = bus_space_read_1(iot, ioh, SSTAT1); |
| 1721 | AIC_MISC(("sstat1:0x%02x " , sstat1)); |
| 1722 | |
| 1723 | if ((sstat1 & SCSIRSTI) != 0) { |
| 1724 | printf("%s: SCSI bus reset\n" , device_xname(sc->sc_dev)); |
| 1725 | goto reset; |
| 1726 | } |
| 1727 | |
| 1728 | /* |
| 1729 | * Check for less serious errors. |
| 1730 | */ |
| 1731 | if ((sstat1 & SCSIPERR) != 0) { |
| 1732 | printf("%s: SCSI bus parity error\n" , device_xname(sc->sc_dev)); |
| 1733 | bus_space_write_1(iot, ioh, CLRSINT1, CLRSCSIPERR); |
| 1734 | if (sc->sc_prevphase == PH_MSGIN) { |
| 1735 | sc->sc_flags |= AIC_DROP_MSGIN; |
| 1736 | aic_sched_msgout(sc, SEND_PARITY_ERROR); |
| 1737 | } else |
| 1738 | aic_sched_msgout(sc, SEND_INIT_DET_ERR); |
| 1739 | } |
| 1740 | |
| 1741 | /* |
| 1742 | * If we're not already busy doing something test for the following |
| 1743 | * conditions: |
| 1744 | * 1) We have been reselected by something |
| 1745 | * 2) We have selected something successfully |
| 1746 | * 3) Our selection process has timed out |
| 1747 | * 4) This is really a bus free interrupt just to get a new command |
| 1748 | * going? |
| 1749 | * 5) Spurious interrupt? |
| 1750 | */ |
| 1751 | switch (sc->sc_state) { |
| 1752 | case AIC_IDLE: |
| 1753 | case AIC_SELECTING: |
| 1754 | sstat0 = bus_space_read_1(iot, ioh, SSTAT0); |
| 1755 | AIC_MISC(("sstat0:0x%02x " , sstat0)); |
| 1756 | |
| 1757 | if ((sstat0 & TARGET) != 0) { |
| 1758 | /* |
| 1759 | * We don't currently support target mode. |
| 1760 | */ |
| 1761 | printf("%s: target mode selected; going to BUS FREE\n" , |
| 1762 | device_xname(sc->sc_dev)); |
| 1763 | bus_space_write_1(iot, ioh, SCSISIG, 0); |
| 1764 | |
| 1765 | goto sched; |
| 1766 | } else if ((sstat0 & SELDI) != 0) { |
| 1767 | AIC_MISC(("reselected " )); |
| 1768 | |
| 1769 | /* |
| 1770 | * If we're trying to select a target ourselves, |
| 1771 | * push our command back into the ready list. |
| 1772 | */ |
| 1773 | if (sc->sc_state == AIC_SELECTING) { |
| 1774 | AIC_MISC(("backoff selector " )); |
| 1775 | AIC_ASSERT(sc->sc_nexus != NULL); |
| 1776 | acb = sc->sc_nexus; |
| 1777 | sc->sc_nexus = NULL; |
| 1778 | TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); |
| 1779 | } |
| 1780 | |
| 1781 | /* Save reselection ID. */ |
| 1782 | sc->sc_selid = bus_space_read_1(iot, ioh, SELID); |
| 1783 | |
| 1784 | sc->sc_state = AIC_RESELECTED; |
| 1785 | } else if ((sstat0 & SELDO) != 0) { |
| 1786 | AIC_MISC(("selected " )); |
| 1787 | |
| 1788 | /* We have selected a target. Things to do: |
| 1789 | * a) Determine what message(s) to send. |
| 1790 | * b) Verify that we're still selecting the target. |
| 1791 | * c) Mark device as busy. |
| 1792 | */ |
| 1793 | if (sc->sc_state != AIC_SELECTING) { |
| 1794 | printf("%s: selection out while idle; " |
| 1795 | "resetting\n" , device_xname(sc->sc_dev)); |
| 1796 | AIC_BREAK(); |
| 1797 | goto reset; |
| 1798 | } |
| 1799 | AIC_ASSERT(sc->sc_nexus != NULL); |
| 1800 | acb = sc->sc_nexus; |
| 1801 | periph = acb->xs->xs_periph; |
| 1802 | ti = &sc->sc_tinfo[periph->periph_target]; |
| 1803 | |
| 1804 | sc->sc_msgpriq = SEND_IDENTIFY; |
| 1805 | if (acb->flags & ACB_RESET) |
| 1806 | sc->sc_msgpriq |= SEND_DEV_RESET; |
| 1807 | else if (acb->flags & ACB_ABORT) |
| 1808 | sc->sc_msgpriq |= SEND_ABORT; |
| 1809 | else { |
| 1810 | #if AIC_USE_SYNCHRONOUS |
| 1811 | if ((ti->flags & DO_SYNC) != 0) |
| 1812 | sc->sc_msgpriq |= SEND_SDTR; |
| 1813 | #endif |
| 1814 | #if AIC_USE_WIDE |
| 1815 | if ((ti->flags & DO_WIDE) != 0) |
| 1816 | sc->sc_msgpriq |= SEND_WDTR; |
| 1817 | #endif |
| 1818 | } |
| 1819 | |
| 1820 | acb->flags |= ACB_NEXUS; |
| 1821 | ti->lubusy |= (1 << periph->periph_lun); |
| 1822 | |
| 1823 | /* Do an implicit RESTORE POINTERS. */ |
| 1824 | sc->sc_dp = acb->data_addr; |
| 1825 | sc->sc_dleft = acb->data_length; |
| 1826 | sc->sc_cp = (u_char *)&acb->scsipi_cmd; |
| 1827 | sc->sc_cleft = acb->scsipi_cmd_length; |
| 1828 | |
| 1829 | /* On our first connection, schedule a timeout. */ |
| 1830 | if ((acb->xs->xs_control & XS_CTL_POLL) == 0) |
| 1831 | callout_reset(&acb->xs->xs_callout, |
| 1832 | mstohz(acb->timeout), aic_timeout, acb); |
| 1833 | |
| 1834 | sc->sc_state = AIC_CONNECTED; |
| 1835 | } else if ((sstat1 & SELTO) != 0) { |
| 1836 | AIC_MISC(("selection timeout " )); |
| 1837 | |
| 1838 | if (sc->sc_state != AIC_SELECTING) { |
| 1839 | printf("%s: selection timeout while idle; " |
| 1840 | "resetting\n" , device_xname(sc->sc_dev)); |
| 1841 | AIC_BREAK(); |
| 1842 | goto reset; |
| 1843 | } |
| 1844 | AIC_ASSERT(sc->sc_nexus != NULL); |
| 1845 | acb = sc->sc_nexus; |
| 1846 | |
| 1847 | bus_space_write_1(iot, ioh, SXFRCTL1, 0); |
| 1848 | bus_space_write_1(iot, ioh, SCSISEQ, ENRESELI); |
| 1849 | bus_space_write_1(iot, ioh, CLRSINT1, CLRSELTIMO); |
| 1850 | delay(250); |
| 1851 | |
| 1852 | acb->xs->error = XS_SELTIMEOUT; |
| 1853 | goto finish; |
| 1854 | } else { |
| 1855 | if (sc->sc_state != AIC_IDLE) { |
| 1856 | printf("%s: BUS FREE while not idle; " |
| 1857 | "state=%d\n" , |
| 1858 | device_xname(sc->sc_dev), sc->sc_state); |
| 1859 | AIC_BREAK(); |
| 1860 | goto out; |
| 1861 | } |
| 1862 | |
| 1863 | goto sched; |
| 1864 | } |
| 1865 | |
| 1866 | /* |
| 1867 | * Turn off selection stuff, and prepare to catch bus free |
| 1868 | * interrupts, parity errors, and phase changes. |
| 1869 | */ |
| 1870 | bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | CLRSTCNT | CLRCH); |
| 1871 | bus_space_write_1(iot, ioh, SXFRCTL1, 0); |
| 1872 | bus_space_write_1(iot, ioh, SCSISEQ, ENAUTOATNP); |
| 1873 | bus_space_write_1(iot, ioh, CLRSINT0, CLRSELDI | CLRSELDO); |
| 1874 | bus_space_write_1(iot, ioh, CLRSINT1, |
| 1875 | CLRBUSFREE | CLRPHASECHG); |
| 1876 | bus_space_write_1(iot, ioh, SIMODE0, 0); |
| 1877 | bus_space_write_1(iot, ioh, SIMODE1, |
| 1878 | ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENREQINIT | |
| 1879 | ENPHASECHG); |
| 1880 | |
| 1881 | sc->sc_flags = 0; |
| 1882 | sc->sc_prevphase = PH_INVALID; |
| 1883 | goto dophase; |
| 1884 | } |
| 1885 | |
| 1886 | if ((sstat1 & BUSFREE) != 0) { |
| 1887 | /* We've gone to BUS FREE phase. */ |
| 1888 | bus_space_write_1(iot, ioh, CLRSINT1, |
| 1889 | CLRBUSFREE | CLRPHASECHG); |
| 1890 | |
| 1891 | switch (sc->sc_state) { |
| 1892 | case AIC_RESELECTED: |
| 1893 | goto sched; |
| 1894 | |
| 1895 | case AIC_CONNECTED: |
| 1896 | AIC_ASSERT(sc->sc_nexus != NULL); |
| 1897 | acb = sc->sc_nexus; |
| 1898 | |
| 1899 | #if AIC_USE_SYNCHRONOUS + AIC_USE_WIDE |
| 1900 | if (sc->sc_prevphase == PH_MSGOUT) { |
| 1901 | /* |
| 1902 | * If the target went to BUS FREE phase during |
| 1903 | * or immediately after sending a SDTR or WDTR |
| 1904 | * message, disable negotiation. |
| 1905 | */ |
| 1906 | periph = acb->xs->xs_periph; |
| 1907 | ti = &sc->sc_tinfo[periph->periph_target]; |
| 1908 | switch (sc->sc_lastmsg) { |
| 1909 | #if AIC_USE_SYNCHRONOUS |
| 1910 | case SEND_SDTR: |
| 1911 | ti->flags &= ~DO_SYNC; |
| 1912 | ti->period = ti->offset = 0; |
| 1913 | break; |
| 1914 | #endif |
| 1915 | #if AIC_USE_WIDE |
| 1916 | case SEND_WDTR: |
| 1917 | ti->flags &= ~DO_WIDE; |
| 1918 | ti->width = 0; |
| 1919 | break; |
| 1920 | #endif |
| 1921 | } |
| 1922 | } |
| 1923 | #endif |
| 1924 | |
| 1925 | if ((sc->sc_flags & AIC_ABORTING) == 0) { |
| 1926 | /* |
| 1927 | * Section 5.1.1 of the SCSI 2 spec suggests |
| 1928 | * issuing a REQUEST SENSE following an |
| 1929 | * unexpected disconnect. Some devices go into |
| 1930 | * a contingent allegiance condition when |
| 1931 | * disconnecting, and this is necessary to |
| 1932 | * clean up their state. |
| 1933 | */ |
| 1934 | aprint_error_dev(sc->sc_dev, |
| 1935 | "unexpected disconnect; " |
| 1936 | "sending REQUEST SENSE\n" ); |
| 1937 | AIC_BREAK(); |
| 1938 | aic_sense(sc, acb); |
| 1939 | goto out; |
| 1940 | } |
| 1941 | |
| 1942 | acb->xs->error = XS_DRIVER_STUFFUP; |
| 1943 | goto finish; |
| 1944 | |
| 1945 | case AIC_DISCONNECT: |
| 1946 | AIC_ASSERT(sc->sc_nexus != NULL); |
| 1947 | acb = sc->sc_nexus; |
| 1948 | #if 1 /* XXXX */ |
| 1949 | acb->data_addr = sc->sc_dp; |
| 1950 | acb->data_length = sc->sc_dleft; |
| 1951 | #endif |
| 1952 | TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain); |
| 1953 | sc->sc_nexus = NULL; |
| 1954 | goto sched; |
| 1955 | |
| 1956 | case AIC_CMDCOMPLETE: |
| 1957 | AIC_ASSERT(sc->sc_nexus != NULL); |
| 1958 | acb = sc->sc_nexus; |
| 1959 | goto finish; |
| 1960 | } |
| 1961 | } |
| 1962 | |
| 1963 | bus_space_write_1(iot, ioh, CLRSINT1, CLRPHASECHG); |
| 1964 | |
| 1965 | dophase: |
| 1966 | if ((sstat1 & REQINIT) == 0) { |
| 1967 | /* Wait for REQINIT. */ |
| 1968 | goto out; |
| 1969 | } |
| 1970 | |
| 1971 | sc->sc_phase = bus_space_read_1(iot, ioh, SCSISIG) & PH_MASK; |
| 1972 | bus_space_write_1(iot, ioh, SCSISIG, sc->sc_phase); |
| 1973 | |
| 1974 | switch (sc->sc_phase) { |
| 1975 | case PH_MSGOUT: |
| 1976 | if (sc->sc_state != AIC_CONNECTED && |
| 1977 | sc->sc_state != AIC_RESELECTED) |
| 1978 | break; |
| 1979 | aic_msgout(sc); |
| 1980 | sc->sc_prevphase = PH_MSGOUT; |
| 1981 | goto loop; |
| 1982 | |
| 1983 | case PH_MSGIN: |
| 1984 | if (sc->sc_state != AIC_CONNECTED && |
| 1985 | sc->sc_state != AIC_RESELECTED) |
| 1986 | break; |
| 1987 | aic_msgin(sc); |
| 1988 | sc->sc_prevphase = PH_MSGIN; |
| 1989 | goto loop; |
| 1990 | |
| 1991 | case PH_CMD: |
| 1992 | if (sc->sc_state != AIC_CONNECTED) |
| 1993 | break; |
| 1994 | #if AIC_DEBUG |
| 1995 | if ((aic_debug & AIC_SHOWMISC) != 0) { |
| 1996 | AIC_ASSERT(sc->sc_nexus != NULL); |
| 1997 | acb = sc->sc_nexus; |
| 1998 | printf("cmd=0x%02x+%d " , |
| 1999 | acb->scsipi_cmd.opcode, acb->scsipi_cmd_length-1); |
| 2000 | } |
| 2001 | #endif |
| 2002 | n = aic_dataout_pio(sc, sc->sc_cp, sc->sc_cleft); |
| 2003 | sc->sc_cp += n; |
| 2004 | sc->sc_cleft -= n; |
| 2005 | sc->sc_prevphase = PH_CMD; |
| 2006 | goto loop; |
| 2007 | |
| 2008 | case PH_DATAOUT: |
| 2009 | if (sc->sc_state != AIC_CONNECTED) |
| 2010 | break; |
| 2011 | AIC_MISC(("dataout %ld " , (long)sc->sc_dleft)); |
| 2012 | n = aic_dataout_pio(sc, sc->sc_dp, sc->sc_dleft); |
| 2013 | sc->sc_dp += n; |
| 2014 | sc->sc_dleft -= n; |
| 2015 | sc->sc_prevphase = PH_DATAOUT; |
| 2016 | goto loop; |
| 2017 | |
| 2018 | case PH_DATAIN: |
| 2019 | if (sc->sc_state != AIC_CONNECTED) |
| 2020 | break; |
| 2021 | AIC_MISC(("datain %ld " , (long)sc->sc_dleft)); |
| 2022 | n = aic_datain_pio(sc, sc->sc_dp, sc->sc_dleft); |
| 2023 | sc->sc_dp += n; |
| 2024 | sc->sc_dleft -= n; |
| 2025 | sc->sc_prevphase = PH_DATAIN; |
| 2026 | goto loop; |
| 2027 | |
| 2028 | case PH_STAT: |
| 2029 | if (sc->sc_state != AIC_CONNECTED) |
| 2030 | break; |
| 2031 | AIC_ASSERT(sc->sc_nexus != NULL); |
| 2032 | acb = sc->sc_nexus; |
| 2033 | bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | SPIOEN); |
| 2034 | acb->target_stat = bus_space_read_1(iot, ioh, SCSIDAT); |
| 2035 | bus_space_write_1(iot, ioh, SXFRCTL0, CHEN); |
| 2036 | AIC_MISC(("target_stat=0x%02x " , acb->target_stat)); |
| 2037 | sc->sc_prevphase = PH_STAT; |
| 2038 | goto loop; |
| 2039 | } |
| 2040 | |
| 2041 | aprint_error_dev(sc->sc_dev, "unexpected bus phase; resetting\n" ); |
| 2042 | AIC_BREAK(); |
| 2043 | reset: |
| 2044 | aic_init(sc, 1); |
| 2045 | return 1; |
| 2046 | |
| 2047 | finish: |
| 2048 | callout_stop(&acb->xs->xs_callout); |
| 2049 | aic_done(sc, acb); |
| 2050 | goto out; |
| 2051 | |
| 2052 | sched: |
| 2053 | sc->sc_state = AIC_IDLE; |
| 2054 | aic_sched(sc); |
| 2055 | goto out; |
| 2056 | |
| 2057 | out: |
| 2058 | bus_space_write_1(iot, ioh, DMACNTRL0, INTEN); |
| 2059 | return 1; |
| 2060 | } |
| 2061 | |
| 2062 | static void |
| 2063 | aic_abort(struct aic_softc *sc, struct aic_acb *acb) |
| 2064 | { |
| 2065 | |
| 2066 | /* 2 secs for the abort */ |
| 2067 | acb->timeout = AIC_ABORT_TIMEOUT; |
| 2068 | acb->flags |= ACB_ABORT; |
| 2069 | |
| 2070 | if (acb == sc->sc_nexus) { |
| 2071 | /* |
| 2072 | * If we're still selecting, the message will be scheduled |
| 2073 | * after selection is complete. |
| 2074 | */ |
| 2075 | if (sc->sc_state == AIC_CONNECTED) |
| 2076 | aic_sched_msgout(sc, SEND_ABORT); |
| 2077 | } else { |
| 2078 | aic_dequeue(sc, acb); |
| 2079 | TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); |
| 2080 | if (sc->sc_state == AIC_IDLE) |
| 2081 | aic_sched(sc); |
| 2082 | } |
| 2083 | } |
| 2084 | |
| 2085 | static void |
| 2086 | aic_timeout(void *arg) |
| 2087 | { |
| 2088 | struct aic_acb *acb = arg; |
| 2089 | struct scsipi_xfer *xs = acb->xs; |
| 2090 | struct scsipi_periph *periph = xs->xs_periph; |
| 2091 | struct aic_softc *sc = |
| 2092 | device_private(periph->periph_channel->chan_adapter->adapt_dev); |
| 2093 | int s; |
| 2094 | |
| 2095 | scsipi_printaddr(periph); |
| 2096 | printf("timed out" ); |
| 2097 | |
| 2098 | s = splbio(); |
| 2099 | |
| 2100 | if (acb->flags & ACB_ABORT) { |
| 2101 | /* abort timed out */ |
| 2102 | printf(" AGAIN\n" ); |
| 2103 | /* XXX Must reset! */ |
| 2104 | } else { |
| 2105 | /* abort the operation that has timed out */ |
| 2106 | printf("\n" ); |
| 2107 | acb->xs->error = XS_TIMEOUT; |
| 2108 | aic_abort(sc, acb); |
| 2109 | } |
| 2110 | |
| 2111 | splx(s); |
| 2112 | } |
| 2113 | |
| 2114 | #ifdef AIC_DEBUG |
| 2115 | /* |
| 2116 | * The following functions are mostly used for debugging purposes, either |
| 2117 | * directly called from the driver or from the kernel debugger. |
| 2118 | */ |
| 2119 | |
| 2120 | static void |
| 2121 | aic_show_scsi_cmd(struct aic_acb *acb) |
| 2122 | { |
| 2123 | u_char *b = (u_char *)&acb->scsipi_cmd; |
| 2124 | struct scsipi_periph *periph = acb->xs->xs_periph; |
| 2125 | int i; |
| 2126 | |
| 2127 | scsipi_printaddr(periph); |
| 2128 | if ((acb->xs->xs_control & XS_CTL_RESET) == 0) { |
| 2129 | for (i = 0; i < acb->scsipi_cmd_length; i++) { |
| 2130 | if (i) |
| 2131 | printf("," ); |
| 2132 | printf("%x" , b[i]); |
| 2133 | } |
| 2134 | printf("\n" ); |
| 2135 | } else |
| 2136 | printf("RESET\n" ); |
| 2137 | } |
| 2138 | |
| 2139 | static void |
| 2140 | aic_print_acb(struct aic_acb *acb) |
| 2141 | { |
| 2142 | |
| 2143 | printf("acb@%p xs=%p flags=%x" , acb, acb->xs, acb->flags); |
| 2144 | printf(" dp=%p dleft=%d target_stat=%x\n" , |
| 2145 | acb->data_addr, acb->data_length, acb->target_stat); |
| 2146 | aic_show_scsi_cmd(acb); |
| 2147 | } |
| 2148 | |
| 2149 | void |
| 2150 | aic_print_active_acb(void) |
| 2151 | { |
| 2152 | extern struct cfdriver aic_cd; |
| 2153 | struct aic_acb *acb; |
| 2154 | struct aic_softc *sc = device_lookup_private(&aic_cd, 0); |
| 2155 | |
| 2156 | printf("ready list:\n" ); |
| 2157 | for (acb = sc->ready_list.tqh_first; acb != NULL; |
| 2158 | acb = acb->chain.tqe_next) |
| 2159 | aic_print_acb(acb); |
| 2160 | printf("nexus:\n" ); |
| 2161 | if (sc->sc_nexus != NULL) |
| 2162 | aic_print_acb(sc->sc_nexus); |
| 2163 | printf("nexus list:\n" ); |
| 2164 | for (acb = sc->nexus_list.tqh_first; acb != NULL; |
| 2165 | acb = acb->chain.tqe_next) |
| 2166 | aic_print_acb(acb); |
| 2167 | } |
| 2168 | |
| 2169 | void |
| 2170 | aic_dump6360(struct aic_softc *sc) |
| 2171 | { |
| 2172 | bus_space_tag_t iot = sc->sc_iot; |
| 2173 | bus_space_handle_t ioh = sc->sc_ioh; |
| 2174 | |
| 2175 | printf("aic6360: SCSISEQ=%x SXFRCTL0=%x SXFRCTL1=%x SCSISIG=%x\n" , |
| 2176 | bus_space_read_1(iot, ioh, SCSISEQ), |
| 2177 | bus_space_read_1(iot, ioh, SXFRCTL0), |
| 2178 | bus_space_read_1(iot, ioh, SXFRCTL1), |
| 2179 | bus_space_read_1(iot, ioh, SCSISIG)); |
| 2180 | printf(" SSTAT0=%x SSTAT1=%x SSTAT2=%x SSTAT3=%x SSTAT4=%x\n" , |
| 2181 | bus_space_read_1(iot, ioh, SSTAT0), |
| 2182 | bus_space_read_1(iot, ioh, SSTAT1), |
| 2183 | bus_space_read_1(iot, ioh, SSTAT2), |
| 2184 | bus_space_read_1(iot, ioh, SSTAT3), |
| 2185 | bus_space_read_1(iot, ioh, SSTAT4)); |
| 2186 | printf(" SIMODE0=%x SIMODE1=%x DMACNTRL0=%x DMACNTRL1=%x " |
| 2187 | "DMASTAT=%x\n" , |
| 2188 | bus_space_read_1(iot, ioh, SIMODE0), |
| 2189 | bus_space_read_1(iot, ioh, SIMODE1), |
| 2190 | bus_space_read_1(iot, ioh, DMACNTRL0), |
| 2191 | bus_space_read_1(iot, ioh, DMACNTRL1), |
| 2192 | bus_space_read_1(iot, ioh, DMASTAT)); |
| 2193 | printf(" FIFOSTAT=%d SCSIBUS=0x%x\n" , |
| 2194 | bus_space_read_1(iot, ioh, FIFOSTAT), |
| 2195 | bus_space_read_1(iot, ioh, SCSIBUS)); |
| 2196 | } |
| 2197 | |
| 2198 | void |
| 2199 | aic_dump_driver(struct aic_softc *sc) |
| 2200 | { |
| 2201 | struct aic_tinfo *ti; |
| 2202 | int i; |
| 2203 | |
| 2204 | printf("nexus=%p prevphase=%x\n" , sc->sc_nexus, sc->sc_prevphase); |
| 2205 | printf("state=%x msgin=%x msgpriq=%x msgoutq=%x lastmsg=%x " |
| 2206 | "currmsg=%x\n" , |
| 2207 | sc->sc_state, sc->sc_imess[0], |
| 2208 | sc->sc_msgpriq, sc->sc_msgoutq, sc->sc_lastmsg, sc->sc_currmsg); |
| 2209 | for (i = 0; i < 7; i++) { |
| 2210 | ti = &sc->sc_tinfo[i]; |
| 2211 | printf("tinfo%d: %d cmds %d disconnects %d timeouts" , |
| 2212 | i, ti->cmds, ti->dconns, ti->touts); |
| 2213 | printf(" %d senses flags=%x\n" , ti->senses, ti->flags); |
| 2214 | } |
| 2215 | } |
| 2216 | #endif |
| 2217 | |