| 1 | /* $NetBSD: tpmreg.h,v 1.3 2012/01/23 04:12:26 christos Exp $ */ |
| 2 | |
| 3 | /* |
| 4 | * Copyright (c) 2008, 2009 Michael Shalayeff |
| 5 | * Copyright (c) 2009, 2010 Hans-Jörg Höxer |
| 6 | * All rights reserved. |
| 7 | * |
| 8 | * Permission to use, copy, modify, and distribute this software for any |
| 9 | * purpose with or without fee is hereby granted, provided that the above |
| 10 | * copyright notice and this permission notice appear in all copies. |
| 11 | * |
| 12 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| 13 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| 14 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
| 15 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| 16 | * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN |
| 17 | * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT |
| 18 | * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| 19 | */ |
| 20 | |
| 21 | #define TPM_BUFSIZ 1024 |
| 22 | |
| 23 | #define TPM_HDRSIZE 10 |
| 24 | |
| 25 | #define TPM_PARAM_SIZE 0x0001 |
| 26 | |
| 27 | #define TPM_ACCESS 0x0000 /* access register */ |
| 28 | #define TPM_ACCESS_ESTABLISHMENT 0x01 /* establishment */ |
| 29 | #define TPM_ACCESS_REQUEST_USE 0x02 /* request using locality */ |
| 30 | #define TPM_ACCESS_REQUEST_PENDING 0x04 /* pending request */ |
| 31 | #define TPM_ACCESS_SEIZE 0x08 /* request locality seize */ |
| 32 | #define TPM_ACCESS_SEIZED 0x10 /* locality has been seized */ |
| 33 | #define TPM_ACCESS_ACTIVE_LOCALITY 0x20 /* locality is active */ |
| 34 | #define TPM_ACCESS_VALID 0x80 /* bits are valid */ |
| 35 | #define TPM_ACCESS_BITS \ |
| 36 | "\020\01EST\02REQ\03PEND\04SEIZE\05SEIZED\06ACT\010VALID" |
| 37 | |
| 38 | #define TPM_INTERRUPT_ENABLE 0x0008 |
| 39 | #define TPM_GLOBAL_INT_ENABLE 0x80000000 /* enable ints */ |
| 40 | #define TPM_CMD_READY_INT 0x00000080 /* cmd ready enable */ |
| 41 | #define TPM_INT_EDGE_FALLING 0x00000018 |
| 42 | #define TPM_INT_EDGE_RISING 0x00000010 |
| 43 | #define TPM_INT_LEVEL_LOW 0x00000008 |
| 44 | #define TPM_INT_LEVEL_HIGH 0x00000000 |
| 45 | #define TPM_LOCALITY_CHANGE_INT 0x00000004 /* locality change enable */ |
| 46 | #define TPM_STS_VALID_INT 0x00000002 /* int on TPM_STS_VALID is set */ |
| 47 | #define TPM_DATA_AVAIL_INT 0x00000001 /* int on TPM_STS_DATA_AVAIL is set */ |
| 48 | #define TPM_INTERRUPT_ENABLE_BITS \ |
| 49 | "\177\020b\0DRDY\0b\1STSVALID\0b\2LOCCHG\0" \ |
| 50 | "F\3\2:\0HIGH\0:\1LOW\0:\2RISE\0:\3FALL\0" \ |
| 51 | "b\7IRDY\0b\x1fGIENABLE\0" |
| 52 | |
| 53 | #define TPM_INT_VECTOR 0x000c /* 8 bit reg for 4 bit irq vector */ |
| 54 | #define TPM_INT_STATUS 0x0010 /* bits are & 0x87 from TPM_INTERRUPT_ENABLE */ |
| 55 | |
| 56 | #define TPM_INTF_CAPABILITIES 0x0014 /* capability register */ |
| 57 | #define TPM_INTF_BURST_COUNT_STATIC 0x0100 /* TPM_STS_BMASK static */ |
| 58 | #define TPM_INTF_CMD_READY_INT 0x0080 /* int on ready supported */ |
| 59 | #define TPM_INTF_INT_EDGE_FALLING 0x0040 /* falling edge ints supported */ |
| 60 | #define TPM_INTF_INT_EDGE_RISING 0x0020 /* rising edge ints supported */ |
| 61 | #define TPM_INTF_INT_LEVEL_LOW 0x0010 /* level-low ints supported */ |
| 62 | #define TPM_INTF_INT_LEVEL_HIGH 0x0008 /* level-high ints supported */ |
| 63 | #define TPM_INTF_LOCALITY_CHANGE_INT 0x0004 /* locality-change int (mb 1) */ |
| 64 | #define TPM_INTF_STS_VALID_INT 0x0002 /* TPM_STS_VALID int supported */ |
| 65 | #define TPM_INTF_DATA_AVAIL_INT 0x0001 /* TPM_STS_DATA_AVAIL int supported (mb 1) */ |
| 66 | #define TPM_CAPSREQ \ |
| 67 | (TPM_INTF_DATA_AVAIL_INT|TPM_INTF_LOCALITY_CHANGE_INT|TPM_INTF_INT_LEVEL_LOW) |
| 68 | #define TPM_CAPBITS \ |
| 69 | "\020\01IDRDY\02ISTSV\03ILOCH\04IHIGH\05ILOW\06IRISE\07IFALL\010IRDY\011BCST" |
| 70 | |
| 71 | #define TPM_STS 0x0018 /* status register */ |
| 72 | #define TPM_STS_MASK 0x000000ff /* status bits */ |
| 73 | #define TPM_STS_BMASK 0x00ffff00 /* ro io burst size */ |
| 74 | #define TPM_STS_VALID 0x00000080 /* ro other bits are valid */ |
| 75 | #define TPM_STS_CMD_READY 0x00000040 /* rw chip/signal ready */ |
| 76 | #define TPM_STS_GO 0x00000020 /* wo start the command */ |
| 77 | #define TPM_STS_DATA_AVAIL 0x00000010 /* ro data available */ |
| 78 | #define TPM_STS_DATA_EXPECT 0x00000008 /* ro more data to be written */ |
| 79 | #define TPM_STS_RESP_RETRY 0x00000002 /* wo resend the response */ |
| 80 | #define TPM_STS_BITS "\020\010VALID\07RDY\06GO\05DRDY\04EXPECT\02RETRY" |
| 81 | |
| 82 | #define TPM_DATA 0x0024 |
| 83 | #define TPM_ID 0x0f00 |
| 84 | #define TPM_REV 0x0f04 |
| 85 | #define TPM_SIZE 0x5000 /* five pages of the above */ |
| 86 | |
| 87 | #define TPM_ACCESS_TMO 2000 /* 2sec */ |
| 88 | #define TPM_READY_TMO 2000 /* 2sec */ |
| 89 | #define TPM_READ_TMO 2000 /* 2sec */ |
| 90 | #define TPM_BURST_TMO 2000 /* 2sec */ |
| 91 | |
| 92 | #define TPM_LEGACY_BUSY 0x01 |
| 93 | #define TPM_LEGACY_ABRT 0x01 |
| 94 | #define TPM_LEGACY_DA 0x02 |
| 95 | #define TPM_LEGACY_RE 0x04 |
| 96 | #define TPM_LEGACY_LAST 0x04 |
| 97 | #define TPM_LEGACY_BITS "\020\01BUSY\2DA\3RE\4LAST" |
| 98 | #define TPM_LEGACY_TMO (2*60) /* sec */ |
| 99 | #define TPM_LEGACY_SLEEP 5 /* ticks */ |
| 100 | #define TPM_LEGACY_DELAY 100 |
| 101 | |