| 1 | /* $NetBSD: glxtphyreg.h,v 1.2 2008/04/28 20:23:53 martin Exp $ */ |
| 2 | |
| 3 | /*- |
| 4 | * Copyright (c) 2001 The NetBSD Foundation, Inc. |
| 5 | * All rights reserved. |
| 6 | * |
| 7 | * This code is derived from software contributed to The NetBSD Foundation |
| 8 | * by Jason R. Thorpe. |
| 9 | * |
| 10 | * Redistribution and use in source and binary forms, with or without |
| 11 | * modification, are permitted provided that the following conditions |
| 12 | * are met: |
| 13 | * 1. Redistributions of source code must retain the above copyright |
| 14 | * notice, this list of conditions and the following disclaimer. |
| 15 | * 2. Redistributions in binary form must reproduce the above copyright |
| 16 | * notice, this list of conditions and the following disclaimer in the |
| 17 | * documentation and/or other materials provided with the distribution. |
| 18 | * |
| 19 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS |
| 20 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
| 21 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 22 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS |
| 23 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 24 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 25 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 26 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 27 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 28 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 29 | * POSSIBILITY OF SUCH DAMAGE. |
| 30 | */ |
| 31 | |
| 32 | #ifndef _DEV_MII_GLXTPHYREG_H_ |
| 33 | #define _DEV_MII_GLXTPHYREG_H_ |
| 34 | |
| 35 | /* |
| 36 | * LXT-1000 registers. |
| 37 | */ |
| 38 | |
| 39 | #define MII_GLXTPHY_PCR 0x10 /* port configuration register */ |
| 40 | #define PCR_TX_DIS (1U << 13) /* transmit disable */ |
| 41 | #define PCR_BYP_SCR (1U << 12) /* bypass scrambler */ |
| 42 | #define PCR_BYP_4B5B (1U << 11) /* bypass 4b/5b encoder */ |
| 43 | #define PCR_JAB_DIS (1U << 10) /* disable jabber */ |
| 44 | #define PCR_SQE (1U << 9) /* enable heartbeat */ |
| 45 | #define PCR_TP_LOOPBACK (1U << 8) /* disable TP loopback */ |
| 46 | #define PCR_SMART_SPEED (1U << 7) /* enable SmartSpeed */ |
| 47 | #define PCR_PRE_EN (1U << 5) /* preamble enable */ |
| 48 | #define PCR_10_SERIAL (1U << 3) /* 10Mb/s serial mode */ |
| 49 | #define PCR_AN_ISOLATE (1U << 2) /* autoneg. isolate */ |
| 50 | #define PCR_TBI (1U << 1) /* use ten-bit interface */ |
| 51 | |
| 52 | #define MII_GLXTPHY_QSR 0x11 /* quick status register */ |
| 53 | #define QSR_SPEED_get(x) (((x) >> 14) & 0x3) |
| 54 | #define QSR_TX_STATUS (1U << 13) /* transmit active */ |
| 55 | #define QSR_RX_STATUS (1U << 12) /* receive active */ |
| 56 | #define QSR_COL_STATUS (1U << 11) /* collision active */ |
| 57 | #define QSR_LINK (1U << 10) /* link up */ |
| 58 | #define QSR_DUPLEX (1U << 9) /* full-duplex */ |
| 59 | #define QSR_AN (1U << 8) /* autoneg. enabled */ |
| 60 | #define QSR_ACOMP (1U << 7) /* autoneg. complete */ |
| 61 | #define QSR_LINE_LENGTH_get(x) (((x) >> 4) & 0x7) |
| 62 | #define QSR_PAUSE (1U << 3) /* partner can pause */ |
| 63 | #define QSR_APAUSE (1U << 2) /* partner can asym-pause */ |
| 64 | #define QSR_EVENT (1U << 0) /* event has occurred */ |
| 65 | |
| 66 | #define SPEED_10_SERIAL 0 |
| 67 | #define SPEED_10_MII 1 |
| 68 | #define SPEED_100 2 |
| 69 | #define SPEED_1000 3 |
| 70 | |
| 71 | #define MII_GLXT_IER 0x12 /* interrupt enable register */ |
| 72 | #define IER_AN_FAULT (1U << 13) /* autoneg fault */ |
| 73 | #define IER_CROSS (1U << 11) /* crossover MDIX */ |
| 74 | #define IER_POLARITY (1U << 10) /* polarity change */ |
| 75 | #define IER_SMRT (1U << 9) /* SmartSpeed event */ |
| 76 | #define IER_CNTR (1U << 8) /* counter full */ |
| 77 | #define IER_AN (1U << 7) /* autoneg complete */ |
| 78 | #define IER_SPEED (1U << 6) /* speed change */ |
| 79 | #define IER_DUPLEX (1U << 5) /* duplex change */ |
| 80 | #define IER_LINK (1U << 4) /* link change */ |
| 81 | #define IER_INTEN (1U << 1) /* enable interrupts */ |
| 82 | #define IER_TINT (1U << 0) /* force interrupt */ |
| 83 | |
| 84 | #define MII_GLXT_ISR 0x13 /* interrupt status register */ |
| 85 | /* See IER bits. */ |
| 86 | |
| 87 | #define MII_GLXT_LEDCFG 0x14 /* LED configuration register */ |
| 88 | #define LEDCFG_LEDC(x) ((x) << 14) /* collision */ |
| 89 | #define LEDCFG_LEDR(x) ((x) << 12) /* receive */ |
| 90 | #define LEDCFG_LEDT(x) ((x) << 10) /* transmit */ |
| 91 | #define LEDCFG_LEDG(x) ((x) << 8) /* gigabit */ |
| 92 | #define LEDCFG_LEDS(x) ((x) << 6) /* speed */ |
| 93 | #define LEDCFG_LEDL(x) ((x) << 4) /* link */ |
| 94 | #define LEDCFG_LEDF(x) ((x) << 2) /* full-duplex */ |
| 95 | #define LEDCFG_PULSESTRETCH (1U << 1) |
| 96 | #define LEDCFG_LEDFREQ (1U << 0) |
| 97 | |
| 98 | #define LED_MODE_INDICATION 0 /* indicate LED's event */ |
| 99 | #define LED_MODE_BLINK 1 /* blink */ |
| 100 | #define LED_MODE_ON 2 /* force on */ |
| 101 | #define LED_MODE_OFF 3 /* force off */ |
| 102 | |
| 103 | #define MII_GLXT_PORTCR 0x15 /* port control register */ |
| 104 | #define PORTCR_TX_TCLK (1U << 15) /* enable TX_TCLK */ |
| 105 | #define PORTCR_ALT_NP (1U << 13) /* alternet next-page feature */ |
| 106 | |
| 107 | #endif /* _DEV_MII_GLXTPHYREG_H_ */ |
| 108 | |