| 1 | /* $NetBSD: ugreg.h,v 1.1 2007/05/08 16:48:38 xtraeme Exp $ */ |
| 2 | |
| 3 | /* |
| 4 | * Copyright (c) 2007 Mihai Chelaru <kefren@netbsd.ro> |
| 5 | * All rights reserved. |
| 6 | * |
| 7 | * Redistribution and use in source and binary forms, with or without |
| 8 | * modification, are permitted provided that the following conditions |
| 9 | * are met: |
| 10 | * 1. Redistributions of source code must retain the above copyright |
| 11 | * notice, this list of conditions and the following disclaimer. |
| 12 | * 2. The name of the author may not be used to endorse or promote products |
| 13 | * derived from this software without specific prior written permission. |
| 14 | * |
| 15 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| 16 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| 17 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 18 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 19 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
| 20 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 21 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
| 22 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| 23 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
| 24 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 25 | * SUCH DAMAGE. |
| 26 | */ |
| 27 | |
| 28 | #ifndef _UGREG_H_ |
| 29 | #define _UGREG_H_ |
| 30 | |
| 31 | #define UG_DRV_VERSION 1000 |
| 32 | |
| 33 | /* |
| 34 | * Abit uGuru (first version) |
| 35 | */ |
| 36 | |
| 37 | #define UG_DELAY_CYCLES 5000 |
| 38 | #define UG_NUM_SENSORS 19 |
| 39 | #define UG_MAX_SENSORS 32 |
| 40 | |
| 41 | /* Data and Cmd offsets - Base is ussualy 0xE0 */ |
| 42 | #define UG_CMD 0 |
| 43 | #define UG_DATA 4 |
| 44 | |
| 45 | /* Temp and Voltage Sensors */ |
| 46 | #define UG_CPUTEMP 0x2100 |
| 47 | #define UG_SYSTEMP 0x2101 |
| 48 | #define UG_HTV 0x2102 |
| 49 | #define UG_VCORE 0x2103 |
| 50 | #define UG_DDRVDD 0x2104 |
| 51 | #define UG_3V3 0x2105 |
| 52 | #define UG_5V 0x2106 |
| 53 | #define UG_NBVDD 0x2108 |
| 54 | #define UG_AGP 0x2109 |
| 55 | #define UG_DDRVTT 0x210A |
| 56 | #define UG_5VSB 0x210B |
| 57 | #define UG_3VDUAL 0x210D |
| 58 | #define UG_SBVDD 0x210E |
| 59 | #define UG_PWMTEMP 0x210F |
| 60 | |
| 61 | /* Fans */ |
| 62 | #define UG_CPUFAN 0x2600 |
| 63 | #define UG_NBFAN 0x2601 |
| 64 | #define UG_SYSFAN 0x2602 |
| 65 | #define UG_AUXFAN1 0x2603 |
| 66 | #define UG_AUXFAN2 0x2604 |
| 67 | |
| 68 | /* RFacts */ |
| 69 | #define UG_RFACT 1000 |
| 70 | #define UG_RFACT3 3490 * UG_RFACT / 255 |
| 71 | #define UG_RFACT4 4360 * UG_RFACT / 255 |
| 72 | #define UG_RFACT6 6250 * UG_RFACT / 255 |
| 73 | #define UG_RFACT_FAN 15300/255 |
| 74 | |
| 75 | /* Voltage and Fan sensors offsets */ |
| 76 | #define UG_VOLT_MIN 3 |
| 77 | #define UG_FAN_MIN 14 |
| 78 | |
| 79 | /* |
| 80 | * Abit uGuru2 or uGuru 2005 settings |
| 81 | */ |
| 82 | |
| 83 | /* Sensor banks */ |
| 84 | #define UG2_SETTINGS_BANK 0x01 |
| 85 | #define UG2_SENSORS_BANK 0x08 |
| 86 | #define UG2_MISC_BANK 0x09 |
| 87 | |
| 88 | /* Sensor offsets */ |
| 89 | #define UG2_ALARMS_OFFSET 0x1E |
| 90 | #define UG2_SETTINGS_OFFSET 0x24 |
| 91 | #define UG2_VALUES_OFFSET 0x80 |
| 92 | |
| 93 | /* Misc Sensor */ |
| 94 | #define UG2_BOARD_ID 0x0A |
| 95 | |
| 96 | /* sensor types */ |
| 97 | #define UG2_VOLTAGE_SENSOR 0 |
| 98 | #define UG2_TEMP_SENSOR 1 |
| 99 | #define UG2_FAN_SENSOR 2 |
| 100 | |
| 101 | /* uGuru status flags */ |
| 102 | #define UG2_STATUS_READY_FOR_READ 0x01 |
| 103 | #define UG2_STATUS_BUSY 0x02 |
| 104 | /* No more than 32 sensors */ |
| 105 | #define UG2_MAX_NO_SENSORS 32 |
| 106 | |
| 107 | /* Unknown board should be the last. Now is 0x0016 */ |
| 108 | #define UG_MAX_MSB_BOARD 0x00 |
| 109 | #define UG_MAX_LSB_BOARD 0x16 |
| 110 | #define UG_MIN_LSB_BOARD 0x0c |
| 111 | |
| 112 | #endif /* _UGREG_H_ */ |
| 113 | |