| 1 | /* $NetBSD: adv_pci.c,v 1.29 2014/10/18 08:33:28 snj Exp $ */ |
| 2 | |
| 3 | /* |
| 4 | * Copyright (c) 1998 The NetBSD Foundation, Inc. All rights reserved. |
| 5 | * |
| 6 | * Author: Baldassare Dante Profeta <dante@mclink.it> |
| 7 | * |
| 8 | * Redistribution and use in source and binary forms, with or without |
| 9 | * modification, are permitted provided that the following conditions |
| 10 | * are met: |
| 11 | * 1. Redistributions of source code must retain the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer. |
| 13 | * 2. Redistributions in binary form must reproduce the above copyright |
| 14 | * notice, this list of conditions and the following disclaimer in the |
| 15 | * documentation and/or other materials provided with the distribution. |
| 16 | * |
| 17 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS |
| 18 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
| 19 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 20 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS |
| 21 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 22 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 23 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 24 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 25 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 26 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 27 | * POSSIBILITY OF SUCH DAMAGE. |
| 28 | */ |
| 29 | /* |
| 30 | * Device probe and attach routines for the following |
| 31 | * Advanced Systems Inc. SCSI controllers: |
| 32 | * |
| 33 | * Connectivity Products: |
| 34 | * ABP920 - Bus-Master PCI (16 CDB) |
| 35 | * ABP930 - Bus-Master PCI (16 CDB) (Footnote 1) |
| 36 | * ABP930U - Bus-Master PCI Ultra (16 CDB) |
| 37 | * ABP930UA - Bus-Master PCI Ultra (16 CDB) |
| 38 | * ABP960 - Bus-Master PCI MAC/PC (16 CDB) (Footnote 2) |
| 39 | * ABP960U - Bus-Master PCI MAC/PC Ultra (16 CDB) (Footnote 2) |
| 40 | * |
| 41 | * Single Channel Products: |
| 42 | * ABP940 - Bus-Master PCI (240 CDB) |
| 43 | * ABP940U - Bus-Master PCI Ultra (240 CDB) |
| 44 | * ABP970 - Bus-Master PCI MAC/PC (240 CDB) |
| 45 | * ABP970U - Bus-Master PCI MAC/PC Ultra (240 CDB) |
| 46 | * ABP940UW - Bus-Master PCI Ultra-Wide (240 CDB) |
| 47 | * |
| 48 | * Multi Channel Products: |
| 49 | * ABP950 - Dual Channel Bus-Master PCI (240 CDB Per Channel) |
| 50 | * ABP980 - Four Channel Bus-Master PCI (240 CDB Per Channel) |
| 51 | * ABP980U - Four Channel Bus-Master PCI Ultra (240 CDB Per Channel) |
| 52 | * |
| 53 | * Footnotes: |
| 54 | * 1. This board has been sold by SIIG as the Fast SCSI Pro PCI. |
| 55 | * 2. This board has been sold by Iomega as a Jaz Jet PCI adapter. |
| 56 | */ |
| 57 | |
| 58 | #include <sys/cdefs.h> |
| 59 | __KERNEL_RCSID(0, "$NetBSD: adv_pci.c,v 1.29 2014/10/18 08:33:28 snj Exp $" ); |
| 60 | |
| 61 | #include <sys/param.h> |
| 62 | #include <sys/systm.h> |
| 63 | #include <sys/malloc.h> |
| 64 | #include <sys/kernel.h> |
| 65 | #include <sys/queue.h> |
| 66 | #include <sys/device.h> |
| 67 | |
| 68 | #include <sys/bus.h> |
| 69 | #include <sys/intr.h> |
| 70 | |
| 71 | #include <dev/scsipi/scsi_all.h> |
| 72 | #include <dev/scsipi/scsipi_all.h> |
| 73 | #include <dev/scsipi/scsiconf.h> |
| 74 | |
| 75 | #include <dev/pci/pcireg.h> |
| 76 | #include <dev/pci/pcivar.h> |
| 77 | #include <dev/pci/pcidevs.h> |
| 78 | |
| 79 | #include <dev/ic/advlib.h> |
| 80 | #include <dev/ic/adv.h> |
| 81 | |
| 82 | /******************************************************************************/ |
| 83 | |
| 84 | #define PCI_BASEADR_IO 0x10 |
| 85 | |
| 86 | /******************************************************************************/ |
| 87 | /* |
| 88 | * Check the slots looking for a board we recognise |
| 89 | * If we find one, note its address (slot) and call |
| 90 | * the actual probe routine to check it out. |
| 91 | */ |
| 92 | static int |
| 93 | adv_pci_match(device_t parent, cfdata_t match, void *aux) |
| 94 | { |
| 95 | struct pci_attach_args *pa = aux; |
| 96 | |
| 97 | if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ADVSYS) |
| 98 | switch (PCI_PRODUCT(pa->pa_id)) { |
| 99 | case PCI_PRODUCT_ADVSYS_1200A: |
| 100 | case PCI_PRODUCT_ADVSYS_1200B: |
| 101 | case PCI_PRODUCT_ADVSYS_ULTRA: |
| 102 | return (1); |
| 103 | } |
| 104 | |
| 105 | return 0; |
| 106 | } |
| 107 | |
| 108 | static void |
| 109 | adv_pci_attach(device_t parent, device_t self, void *aux) |
| 110 | { |
| 111 | struct pci_attach_args *pa = aux; |
| 112 | ASC_SOFTC *sc = device_private(self); |
| 113 | bus_space_tag_t iot; |
| 114 | bus_space_handle_t ioh; |
| 115 | pci_intr_handle_t ih; |
| 116 | pci_chipset_tag_t pc = pa->pa_pc; |
| 117 | u_int32_t command; |
| 118 | const char *intrstr; |
| 119 | char intrbuf[PCI_INTRSTR_LEN]; |
| 120 | |
| 121 | aprint_naive(": SCSI controller\n" ); |
| 122 | |
| 123 | sc->sc_dev = self; |
| 124 | sc->sc_flags = 0x0; |
| 125 | if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ADVSYS) |
| 126 | switch (PCI_PRODUCT(pa->pa_id)) { |
| 127 | case PCI_PRODUCT_ADVSYS_1200A: |
| 128 | aprint_normal(": AdvanSys ASC1200A SCSI adapter\n" ); |
| 129 | break; |
| 130 | |
| 131 | case PCI_PRODUCT_ADVSYS_1200B: |
| 132 | aprint_normal(": AdvanSys ASC1200B SCSI adapter\n" ); |
| 133 | break; |
| 134 | |
| 135 | case PCI_PRODUCT_ADVSYS_ULTRA: |
| 136 | switch (PCI_REVISION(pa->pa_class)) { |
| 137 | case ASC_PCI_REVISION_3050: |
| 138 | aprint_normal( |
| 139 | ": AdvanSys ABP-9xxUA SCSI adapter\n" ); |
| 140 | break; |
| 141 | |
| 142 | case ASC_PCI_REVISION_3150: |
| 143 | aprint_normal( |
| 144 | ": AdvanSys ABP-9xxU SCSI adapter\n" ); |
| 145 | break; |
| 146 | } |
| 147 | break; |
| 148 | |
| 149 | default: |
| 150 | aprint_error(": unknown model!\n" ); |
| 151 | return; |
| 152 | } |
| 153 | |
| 154 | |
| 155 | /* |
| 156 | * Make sure IO/MEM/MASTER are enabled |
| 157 | */ |
| 158 | command = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); |
| 159 | if ((command & (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | |
| 160 | PCI_COMMAND_MASTER_ENABLE)) != |
| 161 | (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | |
| 162 | PCI_COMMAND_MASTER_ENABLE)) { |
| 163 | pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, |
| 164 | command | (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | |
| 165 | PCI_COMMAND_MASTER_ENABLE)); |
| 166 | } |
| 167 | /* |
| 168 | * Latency timer settings. |
| 169 | */ |
| 170 | { |
| 171 | u_int32_t bhlcr; |
| 172 | |
| 173 | bhlcr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG); |
| 174 | |
| 175 | if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADVSYS_1200A || |
| 176 | PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADVSYS_1200B) { |
| 177 | bhlcr &= 0xFFFF00FFul; |
| 178 | pci_conf_write(pa->pa_pc, pa->pa_tag, |
| 179 | PCI_BHLC_REG, bhlcr); |
| 180 | } else if ((PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADVSYS_ULTRA) |
| 181 | && (PCI_LATTIMER(bhlcr) < 0x20)) { |
| 182 | bhlcr &= 0xFFFF00FFul; |
| 183 | bhlcr |= 0x00002000ul; |
| 184 | pci_conf_write(pa->pa_pc, pa->pa_tag, |
| 185 | PCI_BHLC_REG, bhlcr); |
| 186 | } |
| 187 | } |
| 188 | |
| 189 | |
| 190 | /* |
| 191 | * Map Device Registers for I/O |
| 192 | */ |
| 193 | if (pci_mapreg_map(pa, PCI_BASEADR_IO, PCI_MAPREG_TYPE_IO, 0, |
| 194 | &iot, &ioh, NULL, NULL)) { |
| 195 | aprint_error_dev(sc->sc_dev, "unable to map device registers\n" ); |
| 196 | return; |
| 197 | } |
| 198 | |
| 199 | ASC_SET_CHIP_CONTROL(iot, ioh, ASC_CC_HALT); |
| 200 | ASC_SET_CHIP_STATUS(iot, ioh, 0); |
| 201 | |
| 202 | sc->sc_iot = iot; |
| 203 | sc->sc_ioh = ioh; |
| 204 | sc->sc_dmat = pa->pa_dmat; |
| 205 | sc->pci_device_id = pa->pa_id; |
| 206 | sc->bus_type = ASC_IS_PCI; |
| 207 | sc->chip_version = ASC_GET_CHIP_VER_NO(iot, ioh); |
| 208 | |
| 209 | /* |
| 210 | * Initialize the board |
| 211 | */ |
| 212 | if (adv_init(sc)) |
| 213 | panic("adv_pci_attach: adv_init failed" ); |
| 214 | |
| 215 | /* |
| 216 | * Map Interrupt line |
| 217 | */ |
| 218 | if (pci_intr_map(pa, &ih)) { |
| 219 | aprint_error_dev(sc->sc_dev, "couldn't map interrupt\n" ); |
| 220 | return; |
| 221 | } |
| 222 | intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf)); |
| 223 | |
| 224 | /* |
| 225 | * Establish Interrupt handler |
| 226 | */ |
| 227 | sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, adv_intr, sc); |
| 228 | if (sc->sc_ih == NULL) { |
| 229 | aprint_error_dev(sc->sc_dev, "couldn't establish interrupt" ); |
| 230 | if (intrstr != NULL) |
| 231 | aprint_error(" at %s" , intrstr); |
| 232 | aprint_error("\n" ); |
| 233 | return; |
| 234 | } |
| 235 | aprint_normal_dev(sc->sc_dev, "interrupting at %s\n" , intrstr); |
| 236 | |
| 237 | /* |
| 238 | * Attach all the sub-devices we can find |
| 239 | */ |
| 240 | adv_attach(sc); |
| 241 | } |
| 242 | |
| 243 | CFATTACH_DECL_NEW(adv_pci, sizeof(ASC_SOFTC), |
| 244 | adv_pci_match, adv_pci_attach, NULL, NULL); |
| 245 | |