| 1 | /* $NetBSD: nouveau_engine_graph_gm107.c,v 1.2 2014/08/23 08:03:33 riastradh Exp $ */ |
| 2 | |
| 3 | /* |
| 4 | * Copyright 2013 Red Hat Inc. |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 7 | * copy of this software and associated documentation files (the "Software"), |
| 8 | * to deal in the Software without restriction, including without limitation |
| 9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 10 | * and/or sell copies of the Software, and to permit persons to whom the |
| 11 | * Software is furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in |
| 14 | * all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 22 | * OTHER DEALINGS IN THE SOFTWARE. |
| 23 | * |
| 24 | * Authors: Ben Skeggs <bskeggs@redhat.com> |
| 25 | */ |
| 26 | |
| 27 | #include <sys/cdefs.h> |
| 28 | __KERNEL_RCSID(0, "$NetBSD: nouveau_engine_graph_gm107.c,v 1.2 2014/08/23 08:03:33 riastradh Exp $" ); |
| 29 | |
| 30 | #include <subdev/bios.h> |
| 31 | #include <subdev/bios/P0260.h> |
| 32 | |
| 33 | #include "nvc0.h" |
| 34 | #include "ctxnvc0.h" |
| 35 | |
| 36 | /******************************************************************************* |
| 37 | * Graphics object classes |
| 38 | ******************************************************************************/ |
| 39 | |
| 40 | static struct nouveau_oclass |
| 41 | gm107_graph_sclass[] = { |
| 42 | { 0x902d, &nouveau_object_ofuncs }, |
| 43 | { 0xa140, &nouveau_object_ofuncs }, |
| 44 | { 0xb097, &nouveau_object_ofuncs }, |
| 45 | { 0xb0c0, &nouveau_object_ofuncs }, |
| 46 | {} |
| 47 | }; |
| 48 | |
| 49 | /******************************************************************************* |
| 50 | * PGRAPH register lists |
| 51 | ******************************************************************************/ |
| 52 | |
| 53 | static const struct nvc0_graph_init |
| 54 | gm107_graph_init_main_0[] = { |
| 55 | { 0x400080, 1, 0x04, 0x003003c2 }, |
| 56 | { 0x400088, 1, 0x04, 0x0001bfe7 }, |
| 57 | { 0x40008c, 1, 0x04, 0x00060000 }, |
| 58 | { 0x400090, 1, 0x04, 0x00000030 }, |
| 59 | { 0x40013c, 1, 0x04, 0x003901f3 }, |
| 60 | { 0x400140, 1, 0x04, 0x00000100 }, |
| 61 | { 0x400144, 1, 0x04, 0x00000000 }, |
| 62 | { 0x400148, 1, 0x04, 0x00000110 }, |
| 63 | { 0x400138, 1, 0x04, 0x00000000 }, |
| 64 | { 0x400130, 2, 0x04, 0x00000000 }, |
| 65 | { 0x400124, 1, 0x04, 0x00000002 }, |
| 66 | {} |
| 67 | }; |
| 68 | |
| 69 | static const struct nvc0_graph_init |
| 70 | gm107_graph_init_ds_0[] = { |
| 71 | { 0x405844, 1, 0x04, 0x00ffffff }, |
| 72 | { 0x405850, 1, 0x04, 0x00000000 }, |
| 73 | { 0x405900, 1, 0x04, 0x00000000 }, |
| 74 | { 0x405908, 1, 0x04, 0x00000000 }, |
| 75 | {} |
| 76 | }; |
| 77 | |
| 78 | static const struct nvc0_graph_init |
| 79 | gm107_graph_init_scc_0[] = { |
| 80 | { 0x40803c, 1, 0x04, 0x00000010 }, |
| 81 | {} |
| 82 | }; |
| 83 | |
| 84 | static const struct nvc0_graph_init |
| 85 | gm107_graph_init_sked_0[] = { |
| 86 | { 0x407010, 1, 0x04, 0x00000000 }, |
| 87 | { 0x407040, 1, 0x04, 0x40440424 }, |
| 88 | { 0x407048, 1, 0x04, 0x0000000a }, |
| 89 | {} |
| 90 | }; |
| 91 | |
| 92 | static const struct nvc0_graph_init |
| 93 | gm107_graph_init_prop_0[] = { |
| 94 | { 0x418408, 1, 0x04, 0x00000000 }, |
| 95 | { 0x4184a0, 1, 0x04, 0x00000000 }, |
| 96 | {} |
| 97 | }; |
| 98 | |
| 99 | static const struct nvc0_graph_init |
| 100 | gm107_graph_init_setup_1[] = { |
| 101 | { 0x4188c8, 2, 0x04, 0x00000000 }, |
| 102 | { 0x4188d0, 1, 0x04, 0x00010000 }, |
| 103 | { 0x4188d4, 1, 0x04, 0x00010201 }, |
| 104 | {} |
| 105 | }; |
| 106 | |
| 107 | static const struct nvc0_graph_init |
| 108 | gm107_graph_init_zcull_0[] = { |
| 109 | { 0x418910, 1, 0x04, 0x00010001 }, |
| 110 | { 0x418914, 1, 0x04, 0x00000301 }, |
| 111 | { 0x418918, 1, 0x04, 0x00800000 }, |
| 112 | { 0x418930, 2, 0x04, 0x00000000 }, |
| 113 | { 0x418980, 1, 0x04, 0x77777770 }, |
| 114 | { 0x418984, 3, 0x04, 0x77777777 }, |
| 115 | {} |
| 116 | }; |
| 117 | |
| 118 | static const struct nvc0_graph_init |
| 119 | gm107_graph_init_gpc_unk_1[] = { |
| 120 | { 0x418d00, 1, 0x04, 0x00000000 }, |
| 121 | { 0x418f00, 1, 0x04, 0x00000400 }, |
| 122 | { 0x418f08, 1, 0x04, 0x00000000 }, |
| 123 | { 0x418e08, 1, 0x04, 0x00000000 }, |
| 124 | {} |
| 125 | }; |
| 126 | |
| 127 | static const struct nvc0_graph_init |
| 128 | gm107_graph_init_tpccs_0[] = { |
| 129 | { 0x419dc4, 1, 0x04, 0x00000000 }, |
| 130 | { 0x419dc8, 1, 0x04, 0x00000501 }, |
| 131 | { 0x419dd0, 1, 0x04, 0x00000000 }, |
| 132 | { 0x419dd4, 1, 0x04, 0x00000100 }, |
| 133 | { 0x419dd8, 1, 0x04, 0x00000001 }, |
| 134 | { 0x419ddc, 1, 0x04, 0x00000002 }, |
| 135 | { 0x419de0, 1, 0x04, 0x00000001 }, |
| 136 | { 0x419d0c, 1, 0x04, 0x00000000 }, |
| 137 | { 0x419d10, 1, 0x04, 0x00000014 }, |
| 138 | {} |
| 139 | }; |
| 140 | |
| 141 | static const struct nvc0_graph_init |
| 142 | gm107_graph_init_tex_0[] = { |
| 143 | { 0x419ab0, 1, 0x04, 0x00000000 }, |
| 144 | { 0x419ab8, 1, 0x04, 0x000000e7 }, |
| 145 | { 0x419abc, 1, 0x04, 0x00000000 }, |
| 146 | { 0x419acc, 1, 0x04, 0x000000ff }, |
| 147 | { 0x419ac0, 1, 0x04, 0x00000000 }, |
| 148 | { 0x419aa8, 2, 0x04, 0x00000000 }, |
| 149 | { 0x419ad0, 2, 0x04, 0x00000000 }, |
| 150 | { 0x419ae0, 2, 0x04, 0x00000000 }, |
| 151 | { 0x419af0, 4, 0x04, 0x00000000 }, |
| 152 | {} |
| 153 | }; |
| 154 | |
| 155 | static const struct nvc0_graph_init |
| 156 | gm107_graph_init_pe_0[] = { |
| 157 | { 0x419900, 1, 0x04, 0x000000ff }, |
| 158 | { 0x41980c, 1, 0x04, 0x00000010 }, |
| 159 | { 0x419844, 1, 0x04, 0x00000000 }, |
| 160 | { 0x419838, 1, 0x04, 0x000000ff }, |
| 161 | { 0x419850, 1, 0x04, 0x00000004 }, |
| 162 | { 0x419854, 2, 0x04, 0x00000000 }, |
| 163 | { 0x419894, 3, 0x04, 0x00100401 }, |
| 164 | {} |
| 165 | }; |
| 166 | |
| 167 | static const struct nvc0_graph_init |
| 168 | gm107_graph_init_l1c_0[] = { |
| 169 | { 0x419c98, 1, 0x04, 0x00000000 }, |
| 170 | { 0x419cc0, 2, 0x04, 0x00000000 }, |
| 171 | {} |
| 172 | }; |
| 173 | |
| 174 | static const struct nvc0_graph_init |
| 175 | gm107_graph_init_sm_0[] = { |
| 176 | { 0x419e30, 1, 0x04, 0x000000ff }, |
| 177 | { 0x419e00, 1, 0x04, 0x00000000 }, |
| 178 | { 0x419ea0, 1, 0x04, 0x00000000 }, |
| 179 | { 0x419ee4, 1, 0x04, 0x00000000 }, |
| 180 | { 0x419ea4, 1, 0x04, 0x00000100 }, |
| 181 | { 0x419ea8, 1, 0x04, 0x01000000 }, |
| 182 | { 0x419ee8, 1, 0x04, 0x00000091 }, |
| 183 | { 0x419eb4, 1, 0x04, 0x00000000 }, |
| 184 | { 0x419ebc, 2, 0x04, 0x00000000 }, |
| 185 | { 0x419edc, 1, 0x04, 0x000c1810 }, |
| 186 | { 0x419ed8, 1, 0x04, 0x00000000 }, |
| 187 | { 0x419ee0, 1, 0x04, 0x00000000 }, |
| 188 | { 0x419f74, 1, 0x04, 0x00005155 }, |
| 189 | { 0x419f80, 4, 0x04, 0x00000000 }, |
| 190 | {} |
| 191 | }; |
| 192 | |
| 193 | static const struct nvc0_graph_init |
| 194 | gm107_graph_init_l1c_1[] = { |
| 195 | { 0x419ccc, 2, 0x04, 0x00000000 }, |
| 196 | { 0x419c80, 1, 0x04, 0x3f006022 }, |
| 197 | { 0x419c88, 1, 0x04, 0x00000000 }, |
| 198 | {} |
| 199 | }; |
| 200 | |
| 201 | static const struct nvc0_graph_init |
| 202 | gm107_graph_init_pes_0[] = { |
| 203 | { 0x41be50, 1, 0x04, 0x000000ff }, |
| 204 | { 0x41be04, 1, 0x04, 0x00000000 }, |
| 205 | { 0x41be08, 1, 0x04, 0x00000004 }, |
| 206 | { 0x41be0c, 1, 0x04, 0x00000008 }, |
| 207 | { 0x41be10, 1, 0x04, 0x0e3b8bc7 }, |
| 208 | { 0x41be14, 2, 0x04, 0x00000000 }, |
| 209 | { 0x41be3c, 5, 0x04, 0x00100401 }, |
| 210 | {} |
| 211 | }; |
| 212 | |
| 213 | static const struct nvc0_graph_init |
| 214 | gm107_graph_init_wwdx_0[] = { |
| 215 | { 0x41bfd4, 1, 0x04, 0x00800000 }, |
| 216 | { 0x41bfdc, 1, 0x04, 0x00000000 }, |
| 217 | {} |
| 218 | }; |
| 219 | |
| 220 | static const struct nvc0_graph_init |
| 221 | gm107_graph_init_cbm_0[] = { |
| 222 | { 0x41becc, 1, 0x04, 0x00000000 }, |
| 223 | {} |
| 224 | }; |
| 225 | |
| 226 | static const struct nvc0_graph_init |
| 227 | gm107_graph_init_be_0[] = { |
| 228 | { 0x408890, 1, 0x04, 0x000000ff }, |
| 229 | { 0x40880c, 1, 0x04, 0x00000000 }, |
| 230 | { 0x408850, 1, 0x04, 0x00000004 }, |
| 231 | { 0x408878, 1, 0x04, 0x00c81603 }, |
| 232 | { 0x40887c, 1, 0x04, 0x80543432 }, |
| 233 | { 0x408880, 1, 0x04, 0x0010581e }, |
| 234 | { 0x408884, 1, 0x04, 0x00001205 }, |
| 235 | { 0x408974, 1, 0x04, 0x000000ff }, |
| 236 | { 0x408910, 9, 0x04, 0x00000000 }, |
| 237 | { 0x408950, 1, 0x04, 0x00000000 }, |
| 238 | { 0x408954, 1, 0x04, 0x0000ffff }, |
| 239 | { 0x408958, 1, 0x04, 0x00000034 }, |
| 240 | { 0x40895c, 1, 0x04, 0x8531a003 }, |
| 241 | { 0x408960, 1, 0x04, 0x0561985a }, |
| 242 | { 0x408964, 1, 0x04, 0x04e15c4f }, |
| 243 | { 0x408968, 1, 0x04, 0x02808833 }, |
| 244 | { 0x40896c, 1, 0x04, 0x01f02438 }, |
| 245 | { 0x408970, 1, 0x04, 0x00012c00 }, |
| 246 | { 0x408984, 1, 0x04, 0x00000000 }, |
| 247 | { 0x408988, 1, 0x04, 0x08040201 }, |
| 248 | { 0x40898c, 1, 0x04, 0x80402010 }, |
| 249 | {} |
| 250 | }; |
| 251 | |
| 252 | static const struct nvc0_graph_init |
| 253 | gm107_graph_init_sm_1[] = { |
| 254 | { 0x419e5c, 1, 0x04, 0x00000000 }, |
| 255 | { 0x419e58, 1, 0x04, 0x00000000 }, |
| 256 | {} |
| 257 | }; |
| 258 | |
| 259 | static const struct nvc0_graph_pack |
| 260 | gm107_graph_pack_mmio[] = { |
| 261 | { gm107_graph_init_main_0 }, |
| 262 | { nvf0_graph_init_fe_0 }, |
| 263 | { nvc0_graph_init_pri_0 }, |
| 264 | { nvc0_graph_init_rstr2d_0 }, |
| 265 | { nvc0_graph_init_pd_0 }, |
| 266 | { gm107_graph_init_ds_0 }, |
| 267 | { gm107_graph_init_scc_0 }, |
| 268 | { gm107_graph_init_sked_0 }, |
| 269 | { nvf0_graph_init_cwd_0 }, |
| 270 | { gm107_graph_init_prop_0 }, |
| 271 | { nv108_graph_init_gpc_unk_0 }, |
| 272 | { nvc0_graph_init_setup_0 }, |
| 273 | { nvc0_graph_init_crstr_0 }, |
| 274 | { gm107_graph_init_setup_1 }, |
| 275 | { gm107_graph_init_zcull_0 }, |
| 276 | { nvc0_graph_init_gpm_0 }, |
| 277 | { gm107_graph_init_gpc_unk_1 }, |
| 278 | { nvc0_graph_init_gcc_0 }, |
| 279 | { gm107_graph_init_tpccs_0 }, |
| 280 | { gm107_graph_init_tex_0 }, |
| 281 | { gm107_graph_init_pe_0 }, |
| 282 | { gm107_graph_init_l1c_0 }, |
| 283 | { nvc0_graph_init_mpc_0 }, |
| 284 | { gm107_graph_init_sm_0 }, |
| 285 | { gm107_graph_init_l1c_1 }, |
| 286 | { gm107_graph_init_pes_0 }, |
| 287 | { gm107_graph_init_wwdx_0 }, |
| 288 | { gm107_graph_init_cbm_0 }, |
| 289 | { gm107_graph_init_be_0 }, |
| 290 | { gm107_graph_init_sm_1 }, |
| 291 | {} |
| 292 | }; |
| 293 | |
| 294 | /******************************************************************************* |
| 295 | * PGRAPH engine/subdev functions |
| 296 | ******************************************************************************/ |
| 297 | |
| 298 | static void |
| 299 | gm107_graph_init_bios(struct nvc0_graph_priv *priv) |
| 300 | { |
| 301 | static const struct { |
| 302 | u32 ctrl; |
| 303 | u32 data; |
| 304 | } regs[] = { |
| 305 | { 0x419ed8, 0x419ee0 }, |
| 306 | { 0x419ad0, 0x419ad4 }, |
| 307 | { 0x419ae0, 0x419ae4 }, |
| 308 | { 0x419af0, 0x419af4 }, |
| 309 | { 0x419af8, 0x419afc }, |
| 310 | }; |
| 311 | struct nouveau_bios *bios = nouveau_bios(priv); |
| 312 | struct nvbios_P0260E infoE; |
| 313 | struct nvbios_P0260X infoX; |
| 314 | int E = -1, X; |
| 315 | u8 ver, hdr; |
| 316 | |
| 317 | while (nvbios_P0260Ep(bios, ++E, &ver, &hdr, &infoE)) { |
| 318 | if (X = -1, E < ARRAY_SIZE(regs)) { |
| 319 | nv_wr32(priv, regs[E].ctrl, infoE.data); |
| 320 | while (nvbios_P0260Xp(bios, ++X, &ver, &hdr, &infoX)) |
| 321 | nv_wr32(priv, regs[E].data, infoX.data); |
| 322 | } |
| 323 | } |
| 324 | } |
| 325 | |
| 326 | static int |
| 327 | gm107_graph_init(struct nouveau_object *object) |
| 328 | { |
| 329 | struct nvc0_graph_oclass *oclass = (void *)object->oclass; |
| 330 | struct nvc0_graph_priv *priv = (void *)object; |
| 331 | const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, priv->tpc_total); |
| 332 | u32 data[TPC_MAX / 8] = {}; |
| 333 | u8 tpcnr[GPC_MAX]; |
| 334 | int gpc, tpc, ppc, rop; |
| 335 | int ret, i; |
| 336 | |
| 337 | ret = nouveau_graph_init(&priv->base); |
| 338 | if (ret) |
| 339 | return ret; |
| 340 | |
| 341 | nv_wr32(priv, GPC_BCAST(0x0880), 0x00000000); |
| 342 | nv_wr32(priv, GPC_BCAST(0x0890), 0x00000000); |
| 343 | nv_wr32(priv, GPC_BCAST(0x0894), 0x00000000); |
| 344 | nv_wr32(priv, GPC_BCAST(0x08b4), priv->unk4188b4->addr >> 8); |
| 345 | nv_wr32(priv, GPC_BCAST(0x08b8), priv->unk4188b8->addr >> 8); |
| 346 | |
| 347 | nvc0_graph_mmio(priv, oclass->mmio); |
| 348 | |
| 349 | gm107_graph_init_bios(priv); |
| 350 | |
| 351 | nv_wr32(priv, GPC_UNIT(0, 0x3018), 0x00000001); |
| 352 | |
| 353 | memset(data, 0x00, sizeof(data)); |
| 354 | memcpy(tpcnr, priv->tpc_nr, sizeof(priv->tpc_nr)); |
| 355 | for (i = 0, gpc = -1; i < priv->tpc_total; i++) { |
| 356 | do { |
| 357 | gpc = (gpc + 1) % priv->gpc_nr; |
| 358 | } while (!tpcnr[gpc]); |
| 359 | tpc = priv->tpc_nr[gpc] - tpcnr[gpc]--; |
| 360 | |
| 361 | data[i / 8] |= tpc << ((i % 8) * 4); |
| 362 | } |
| 363 | |
| 364 | nv_wr32(priv, GPC_BCAST(0x0980), data[0]); |
| 365 | nv_wr32(priv, GPC_BCAST(0x0984), data[1]); |
| 366 | nv_wr32(priv, GPC_BCAST(0x0988), data[2]); |
| 367 | nv_wr32(priv, GPC_BCAST(0x098c), data[3]); |
| 368 | |
| 369 | for (gpc = 0; gpc < priv->gpc_nr; gpc++) { |
| 370 | nv_wr32(priv, GPC_UNIT(gpc, 0x0914), |
| 371 | priv->magic_not_rop_nr << 8 | priv->tpc_nr[gpc]); |
| 372 | nv_wr32(priv, GPC_UNIT(gpc, 0x0910), 0x00040000 | |
| 373 | priv->tpc_total); |
| 374 | nv_wr32(priv, GPC_UNIT(gpc, 0x0918), magicgpc918); |
| 375 | } |
| 376 | |
| 377 | nv_wr32(priv, GPC_BCAST(0x3fd4), magicgpc918); |
| 378 | nv_wr32(priv, GPC_BCAST(0x08ac), nv_rd32(priv, 0x100800)); |
| 379 | |
| 380 | nv_wr32(priv, 0x400500, 0x00010001); |
| 381 | |
| 382 | nv_wr32(priv, 0x400100, 0xffffffff); |
| 383 | nv_wr32(priv, 0x40013c, 0xffffffff); |
| 384 | nv_wr32(priv, 0x400124, 0x00000002); |
| 385 | nv_wr32(priv, 0x409c24, 0x000e0000); |
| 386 | |
| 387 | nv_wr32(priv, 0x404000, 0xc0000000); |
| 388 | nv_wr32(priv, 0x404600, 0xc0000000); |
| 389 | nv_wr32(priv, 0x408030, 0xc0000000); |
| 390 | nv_wr32(priv, 0x404490, 0xc0000000); |
| 391 | nv_wr32(priv, 0x406018, 0xc0000000); |
| 392 | nv_wr32(priv, 0x407020, 0x40000000); |
| 393 | nv_wr32(priv, 0x405840, 0xc0000000); |
| 394 | nv_wr32(priv, 0x405844, 0x00ffffff); |
| 395 | nv_mask(priv, 0x419cc0, 0x00000008, 0x00000008); |
| 396 | |
| 397 | for (gpc = 0; gpc < priv->gpc_nr; gpc++) { |
| 398 | for (ppc = 0; ppc < 2 /* priv->ppc_nr[gpc] */; ppc++) |
| 399 | nv_wr32(priv, PPC_UNIT(gpc, ppc, 0x038), 0xc0000000); |
| 400 | nv_wr32(priv, GPC_UNIT(gpc, 0x0420), 0xc0000000); |
| 401 | nv_wr32(priv, GPC_UNIT(gpc, 0x0900), 0xc0000000); |
| 402 | nv_wr32(priv, GPC_UNIT(gpc, 0x1028), 0xc0000000); |
| 403 | nv_wr32(priv, GPC_UNIT(gpc, 0x0824), 0xc0000000); |
| 404 | for (tpc = 0; tpc < priv->tpc_nr[gpc]; tpc++) { |
| 405 | nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x508), 0xffffffff); |
| 406 | nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff); |
| 407 | nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x224), 0xc0000000); |
| 408 | nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x48c), 0xc0000000); |
| 409 | nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000); |
| 410 | nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x430), 0xc0000000); |
| 411 | nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x644), 0x00dffffe); |
| 412 | nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x64c), 0x00000005); |
| 413 | } |
| 414 | nv_wr32(priv, GPC_UNIT(gpc, 0x2c90), 0xffffffff); |
| 415 | nv_wr32(priv, GPC_UNIT(gpc, 0x2c94), 0xffffffff); |
| 416 | } |
| 417 | |
| 418 | for (rop = 0; rop < priv->rop_nr; rop++) { |
| 419 | nv_wr32(priv, ROP_UNIT(rop, 0x144), 0x40000000); |
| 420 | nv_wr32(priv, ROP_UNIT(rop, 0x070), 0x40000000); |
| 421 | nv_wr32(priv, ROP_UNIT(rop, 0x204), 0xffffffff); |
| 422 | nv_wr32(priv, ROP_UNIT(rop, 0x208), 0xffffffff); |
| 423 | } |
| 424 | |
| 425 | nv_wr32(priv, 0x400108, 0xffffffff); |
| 426 | nv_wr32(priv, 0x400138, 0xffffffff); |
| 427 | nv_wr32(priv, 0x400118, 0xffffffff); |
| 428 | nv_wr32(priv, 0x400130, 0xffffffff); |
| 429 | nv_wr32(priv, 0x40011c, 0xffffffff); |
| 430 | nv_wr32(priv, 0x400134, 0xffffffff); |
| 431 | |
| 432 | nv_wr32(priv, 0x400054, 0x2c350f63); |
| 433 | return nvc0_graph_init_ctxctl(priv); |
| 434 | } |
| 435 | |
| 436 | #include "fuc/hubgm107.fuc5.h" |
| 437 | |
| 438 | static struct nvc0_graph_ucode |
| 439 | gm107_graph_fecs_ucode = { |
| 440 | .code.data = gm107_grhub_code, |
| 441 | .code.size = sizeof(gm107_grhub_code), |
| 442 | .data.data = gm107_grhub_data, |
| 443 | .data.size = sizeof(gm107_grhub_data), |
| 444 | }; |
| 445 | |
| 446 | #include "fuc/gpcgm107.fuc5.h" |
| 447 | |
| 448 | static struct nvc0_graph_ucode |
| 449 | gm107_graph_gpccs_ucode = { |
| 450 | .code.data = gm107_grgpc_code, |
| 451 | .code.size = sizeof(gm107_grgpc_code), |
| 452 | .data.data = gm107_grgpc_data, |
| 453 | .data.size = sizeof(gm107_grgpc_data), |
| 454 | }; |
| 455 | |
| 456 | struct nouveau_oclass * |
| 457 | gm107_graph_oclass = &(struct nvc0_graph_oclass) { |
| 458 | .base.handle = NV_ENGINE(GR, 0x07), |
| 459 | .base.ofuncs = &(struct nouveau_ofuncs) { |
| 460 | .ctor = nvc0_graph_ctor, |
| 461 | .dtor = nvc0_graph_dtor, |
| 462 | .init = gm107_graph_init, |
| 463 | .fini = _nouveau_graph_fini, |
| 464 | }, |
| 465 | .cclass = &gm107_grctx_oclass, |
| 466 | .sclass = gm107_graph_sclass, |
| 467 | .mmio = gm107_graph_pack_mmio, |
| 468 | .fecs.ucode = 0 ? &gm107_graph_fecs_ucode : NULL, |
| 469 | .gpccs.ucode = &gm107_graph_gpccs_ucode, |
| 470 | }.base; |
| 471 | |