| 1 | /* $NetBSD: elink3.c,v 1.139 2016/10/02 14:16:02 christos Exp $ */ |
| 2 | |
| 3 | /*- |
| 4 | * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc. |
| 5 | * All rights reserved. |
| 6 | * |
| 7 | * This code is derived from software contributed to The NetBSD Foundation |
| 8 | * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, |
| 9 | * NASA Ames Research Center. |
| 10 | * |
| 11 | * Redistribution and use in source and binary forms, with or without |
| 12 | * modification, are permitted provided that the following conditions |
| 13 | * are met: |
| 14 | * 1. Redistributions of source code must retain the above copyright |
| 15 | * notice, this list of conditions and the following disclaimer. |
| 16 | * 2. Redistributions in binary form must reproduce the above copyright |
| 17 | * notice, this list of conditions and the following disclaimer in the |
| 18 | * documentation and/or other materials provided with the distribution. |
| 19 | * |
| 20 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS |
| 21 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
| 22 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 23 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS |
| 24 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 25 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 26 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 27 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 28 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 29 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 30 | * POSSIBILITY OF SUCH DAMAGE. |
| 31 | */ |
| 32 | |
| 33 | /* |
| 34 | * Copyright (c) 1996, 1997 Jonathan Stone <jonathan@NetBSD.org> |
| 35 | * Copyright (c) 1994 Herb Peyerl <hpeyerl@beer.org> |
| 36 | * All rights reserved. |
| 37 | * |
| 38 | * Redistribution and use in source and binary forms, with or without |
| 39 | * modification, are permitted provided that the following conditions |
| 40 | * are met: |
| 41 | * 1. Redistributions of source code must retain the above copyright |
| 42 | * notice, this list of conditions and the following disclaimer. |
| 43 | * 2. Redistributions in binary form must reproduce the above copyright |
| 44 | * notice, this list of conditions and the following disclaimer in the |
| 45 | * documentation and/or other materials provided with the distribution. |
| 46 | * 3. All advertising materials mentioning features or use of this software |
| 47 | * must display the following acknowledgement: |
| 48 | * This product includes software developed by Herb Peyerl. |
| 49 | * 4. The name of Herb Peyerl may not be used to endorse or promote products |
| 50 | * derived from this software without specific prior written permission. |
| 51 | * |
| 52 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| 53 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| 54 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 55 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 56 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 57 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 58 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 59 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 60 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 61 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 62 | */ |
| 63 | |
| 64 | #include <sys/cdefs.h> |
| 65 | __KERNEL_RCSID(0, "$NetBSD: elink3.c,v 1.139 2016/10/02 14:16:02 christos Exp $" ); |
| 66 | |
| 67 | #include "opt_inet.h" |
| 68 | |
| 69 | #include <sys/param.h> |
| 70 | #include <sys/systm.h> |
| 71 | #include <sys/callout.h> |
| 72 | #include <sys/kernel.h> |
| 73 | #include <sys/mbuf.h> |
| 74 | #include <sys/socket.h> |
| 75 | #include <sys/ioctl.h> |
| 76 | #include <sys/errno.h> |
| 77 | #include <sys/syslog.h> |
| 78 | #include <sys/select.h> |
| 79 | #include <sys/device.h> |
| 80 | #include <sys/rndsource.h> |
| 81 | |
| 82 | #include <net/if.h> |
| 83 | #include <net/if_dl.h> |
| 84 | #include <net/if_ether.h> |
| 85 | #include <net/if_media.h> |
| 86 | |
| 87 | #include <net/bpf.h> |
| 88 | #include <net/bpfdesc.h> |
| 89 | |
| 90 | #include <sys/cpu.h> |
| 91 | #include <sys/bus.h> |
| 92 | #include <sys/intr.h> |
| 93 | |
| 94 | #include <dev/mii/mii.h> |
| 95 | #include <dev/mii/miivar.h> |
| 96 | #include <dev/mii/mii_bitbang.h> |
| 97 | |
| 98 | #include <dev/ic/elink3var.h> |
| 99 | #include <dev/ic/elink3reg.h> |
| 100 | |
| 101 | #ifdef DEBUG |
| 102 | int epdebug = 0; |
| 103 | #endif |
| 104 | |
| 105 | /* |
| 106 | * XXX endian workaround for big-endian CPUs with pcmcia: |
| 107 | * if stream methods for bus_space_multi are not provided, define them |
| 108 | * using non-stream bus_space_{read,write}_multi_. |
| 109 | * Assumes host CPU is same endian-ness as bus. |
| 110 | */ |
| 111 | #ifndef __BUS_SPACE_HAS_STREAM_METHODS |
| 112 | #define bus_space_read_multi_stream_2 bus_space_read_multi_2 |
| 113 | #define bus_space_read_multi_stream_4 bus_space_read_multi_4 |
| 114 | #define bus_space_write_multi_stream_2 bus_space_write_multi_2 |
| 115 | #define bus_space_write_multi_stream_4 bus_space_write_multi_4 |
| 116 | #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ |
| 117 | |
| 118 | /* |
| 119 | * Structure to map media-present bits in boards to ifmedia codes and |
| 120 | * printable media names. Used for table-driven ifmedia initialization. |
| 121 | */ |
| 122 | struct ep_media { |
| 123 | int epm_mpbit; /* media present bit */ |
| 124 | const char *epm_name; /* name of medium */ |
| 125 | int epm_ifmedia; /* ifmedia word for medium */ |
| 126 | int epm_epmedia; /* ELINKMEDIA_* constant */ |
| 127 | }; |
| 128 | |
| 129 | /* |
| 130 | * Media table for the Demon/Vortex/Boomerang chipsets. |
| 131 | * |
| 132 | * Note that MII on the Demon and Vortex (3c59x) indicates an external |
| 133 | * MII connector (for connecting an external PHY) ... I think. Treat |
| 134 | * it as `manual' on these chips. |
| 135 | * |
| 136 | * Any Boomerang (3c90x) chips with MII really do have an internal |
| 137 | * MII and real PHYs attached; no `native' media. |
| 138 | */ |
| 139 | const struct ep_media ep_vortex_media[] = { |
| 140 | { ELINK_PCI_10BASE_T, "10baseT" , IFM_ETHER|IFM_10_T, |
| 141 | ELINKMEDIA_10BASE_T }, |
| 142 | { ELINK_PCI_10BASE_T, "10baseT-FDX" , IFM_ETHER|IFM_10_T|IFM_FDX, |
| 143 | ELINKMEDIA_10BASE_T }, |
| 144 | { ELINK_PCI_AUI, "10base5" , IFM_ETHER|IFM_10_5, |
| 145 | ELINKMEDIA_AUI }, |
| 146 | { ELINK_PCI_BNC, "10base2" , IFM_ETHER|IFM_10_2, |
| 147 | ELINKMEDIA_10BASE_2 }, |
| 148 | { ELINK_PCI_100BASE_TX, "100baseTX" , IFM_ETHER|IFM_100_TX, |
| 149 | ELINKMEDIA_100BASE_TX }, |
| 150 | { ELINK_PCI_100BASE_TX, "100baseTX-FDX" ,IFM_ETHER|IFM_100_TX|IFM_FDX, |
| 151 | ELINKMEDIA_100BASE_TX }, |
| 152 | { ELINK_PCI_100BASE_FX, "100baseFX" , IFM_ETHER|IFM_100_FX, |
| 153 | ELINKMEDIA_100BASE_FX }, |
| 154 | { ELINK_PCI_100BASE_MII,"manual" , IFM_ETHER|IFM_MANUAL, |
| 155 | ELINKMEDIA_MII }, |
| 156 | { ELINK_PCI_100BASE_T4, "100baseT4" , IFM_ETHER|IFM_100_T4, |
| 157 | ELINKMEDIA_100BASE_T4 }, |
| 158 | { 0, NULL, 0, |
| 159 | 0 }, |
| 160 | }; |
| 161 | |
| 162 | /* |
| 163 | * Media table for the older 3Com Etherlink III chipset, used |
| 164 | * in the 3c509, 3c579, and 3c589. |
| 165 | */ |
| 166 | const struct ep_media ep_509_media[] = { |
| 167 | { ELINK_W0_CC_UTP, "10baseT" , IFM_ETHER|IFM_10_T, |
| 168 | ELINKMEDIA_10BASE_T }, |
| 169 | { ELINK_W0_CC_AUI, "10base5" , IFM_ETHER|IFM_10_5, |
| 170 | ELINKMEDIA_AUI }, |
| 171 | { ELINK_W0_CC_BNC, "10base2" , IFM_ETHER|IFM_10_2, |
| 172 | ELINKMEDIA_10BASE_2 }, |
| 173 | { 0, NULL, 0, |
| 174 | 0 }, |
| 175 | }; |
| 176 | |
| 177 | void ep_internalconfig(struct ep_softc *sc); |
| 178 | void ep_vortex_probemedia(struct ep_softc *sc); |
| 179 | void ep_509_probemedia(struct ep_softc *sc); |
| 180 | |
| 181 | static void eptxstat(struct ep_softc *); |
| 182 | static int epstatus(struct ep_softc *); |
| 183 | int epinit(struct ifnet *); |
| 184 | void epstop(struct ifnet *, int); |
| 185 | int epioctl(struct ifnet *, u_long, void *); |
| 186 | void epstart(struct ifnet *); |
| 187 | void epwatchdog(struct ifnet *); |
| 188 | void epreset(struct ep_softc *); |
| 189 | static bool epshutdown(device_t, int); |
| 190 | void epread(struct ep_softc *); |
| 191 | struct mbuf *epget(struct ep_softc *, int); |
| 192 | void epmbuffill(void *); |
| 193 | void epmbufempty(struct ep_softc *); |
| 194 | void epsetfilter(struct ep_softc *); |
| 195 | void ep_roadrunner_mii_enable(struct ep_softc *); |
| 196 | void epsetmedia(struct ep_softc *); |
| 197 | |
| 198 | /* ifmedia callbacks */ |
| 199 | int ep_media_change(struct ifnet *ifp); |
| 200 | void ep_media_status(struct ifnet *ifp, struct ifmediareq *req); |
| 201 | |
| 202 | /* MII callbacks */ |
| 203 | int ep_mii_readreg(device_t, int, int); |
| 204 | void ep_mii_writereg(device_t, int, int, int); |
| 205 | void ep_statchg(struct ifnet *); |
| 206 | |
| 207 | void ep_tick(void *); |
| 208 | |
| 209 | static int epbusyeeprom(struct ep_softc *); |
| 210 | u_int16_t ep_read_eeprom(struct ep_softc *, u_int16_t); |
| 211 | static inline void ep_reset_cmd(struct ep_softc *sc, u_int cmd, u_int arg); |
| 212 | static inline void ep_finish_reset(bus_space_tag_t, bus_space_handle_t); |
| 213 | static inline void ep_discard_rxtop(bus_space_tag_t, bus_space_handle_t); |
| 214 | static inline int ep_w1_reg(struct ep_softc *, int); |
| 215 | |
| 216 | /* |
| 217 | * MII bit-bang glue. |
| 218 | */ |
| 219 | u_int32_t ep_mii_bitbang_read(device_t); |
| 220 | void ep_mii_bitbang_write(device_t, u_int32_t); |
| 221 | |
| 222 | const struct mii_bitbang_ops ep_mii_bitbang_ops = { |
| 223 | ep_mii_bitbang_read, |
| 224 | ep_mii_bitbang_write, |
| 225 | { |
| 226 | PHYSMGMT_DATA, /* MII_BIT_MDO */ |
| 227 | PHYSMGMT_DATA, /* MII_BIT_MDI */ |
| 228 | PHYSMGMT_CLK, /* MII_BIT_MDC */ |
| 229 | PHYSMGMT_DIR, /* MII_BIT_DIR_HOST_PHY */ |
| 230 | 0, /* MII_BIT_DIR_PHY_HOST */ |
| 231 | } |
| 232 | }; |
| 233 | |
| 234 | /* |
| 235 | * Some chips (3c515 [Corkscrew] and 3c574 [RoadRunner]) have |
| 236 | * Window 1 registers offset! |
| 237 | */ |
| 238 | static inline int |
| 239 | ep_w1_reg(struct ep_softc *sc, int reg) |
| 240 | { |
| 241 | |
| 242 | switch (sc->ep_chipset) { |
| 243 | case ELINK_CHIPSET_CORKSCREW: |
| 244 | return (reg + 0x10); |
| 245 | |
| 246 | case ELINK_CHIPSET_ROADRUNNER: |
| 247 | switch (reg) { |
| 248 | case ELINK_W1_FREE_TX: |
| 249 | case ELINK_W1_RUNNER_RDCTL: |
| 250 | case ELINK_W1_RUNNER_WRCTL: |
| 251 | return (reg); |
| 252 | } |
| 253 | return (reg + 0x10); |
| 254 | } |
| 255 | |
| 256 | return (reg); |
| 257 | } |
| 258 | |
| 259 | /* |
| 260 | * Wait for any pending reset to complete. |
| 261 | * On newer hardware we could poll SC_COMMAND_IN_PROGRESS, |
| 262 | * but older hardware doesn't implement it and we must delay. |
| 263 | */ |
| 264 | static inline void |
| 265 | ep_finish_reset(bus_space_tag_t iot, bus_space_handle_t ioh) |
| 266 | { |
| 267 | int i; |
| 268 | |
| 269 | for (i = 0; i < 10000; i++) { |
| 270 | if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & |
| 271 | COMMAND_IN_PROGRESS) == 0) |
| 272 | break; |
| 273 | DELAY(10); |
| 274 | } |
| 275 | } |
| 276 | |
| 277 | /* |
| 278 | * Issue a (reset) command, and be sure it has completed. |
| 279 | * Used for global reset, TX_RESET, RX_RESET. |
| 280 | */ |
| 281 | static inline void |
| 282 | ep_reset_cmd(struct ep_softc *sc, u_int cmd, u_int arg) |
| 283 | { |
| 284 | bus_space_tag_t iot = sc->sc_iot; |
| 285 | bus_space_handle_t ioh = sc->sc_ioh; |
| 286 | |
| 287 | bus_space_write_2(iot, ioh, cmd, arg); |
| 288 | ep_finish_reset(iot, ioh); |
| 289 | } |
| 290 | |
| 291 | |
| 292 | static inline void |
| 293 | ep_discard_rxtop(bus_space_tag_t iot, bus_space_handle_t ioh) |
| 294 | { |
| 295 | int i; |
| 296 | |
| 297 | bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK); |
| 298 | |
| 299 | /* |
| 300 | * Spin for about 1 msec, to avoid forcing a DELAY() between |
| 301 | * every received packet (adding latency and limiting pkt-recv rate). |
| 302 | * On PCI, at 4 30-nsec PCI bus cycles for a read, 8000 iterations |
| 303 | * is about right. |
| 304 | */ |
| 305 | for (i = 0; i < 8000; i++) { |
| 306 | if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & |
| 307 | COMMAND_IN_PROGRESS) == 0) |
| 308 | return; |
| 309 | } |
| 310 | |
| 311 | /* Didn't complete in a hurry. Do DELAY()s. */ |
| 312 | ep_finish_reset(iot, ioh); |
| 313 | } |
| 314 | |
| 315 | /* |
| 316 | * Back-end attach and configure. |
| 317 | */ |
| 318 | int |
| 319 | epconfig(struct ep_softc *sc, u_short chipset, u_int8_t *enaddr) |
| 320 | { |
| 321 | struct ifnet *ifp = &sc->sc_ethercom.ec_if; |
| 322 | bus_space_tag_t iot = sc->sc_iot; |
| 323 | bus_space_handle_t ioh = sc->sc_ioh; |
| 324 | u_int16_t i; |
| 325 | u_int8_t myla[ETHER_ADDR_LEN]; |
| 326 | |
| 327 | callout_init(&sc->sc_mii_callout, 0); |
| 328 | callout_init(&sc->sc_mbuf_callout, 0); |
| 329 | |
| 330 | sc->ep_chipset = chipset; |
| 331 | |
| 332 | /* |
| 333 | * We could have been groveling around in other register |
| 334 | * windows in the front-end; make sure we're in window 0 |
| 335 | * to read the EEPROM. |
| 336 | */ |
| 337 | GO_WINDOW(0); |
| 338 | |
| 339 | if (enaddr == NULL) { |
| 340 | /* |
| 341 | * Read the station address from the eeprom. |
| 342 | */ |
| 343 | for (i = 0; i < ETHER_ADDR_LEN / 2; i++) { |
| 344 | u_int16_t x = ep_read_eeprom(sc, i); |
| 345 | myla[(i << 1)] = x >> 8; |
| 346 | myla[(i << 1) + 1] = x; |
| 347 | } |
| 348 | enaddr = myla; |
| 349 | } |
| 350 | |
| 351 | /* |
| 352 | * Vortex-based (3c59x pci,eisa) and Boomerang (3c900) cards |
| 353 | * allow FDDI-sized (4500) byte packets. Commands only take an |
| 354 | * 11-bit parameter, and 11 bits isn't enough to hold a full-size |
| 355 | * packet length. |
| 356 | * Commands to these cards implicitly upshift a packet size |
| 357 | * or threshold by 2 bits. |
| 358 | * To detect cards with large-packet support, we probe by setting |
| 359 | * the transmit threshold register, then change windows and |
| 360 | * read back the threshold register directly, and see if the |
| 361 | * threshold value was shifted or not. |
| 362 | */ |
| 363 | bus_space_write_2(iot, ioh, ELINK_COMMAND, |
| 364 | SET_TX_AVAIL_THRESH | ELINK_LARGEWIN_PROBE); |
| 365 | GO_WINDOW(5); |
| 366 | i = bus_space_read_2(iot, ioh, ELINK_W5_TX_AVAIL_THRESH); |
| 367 | GO_WINDOW(1); |
| 368 | switch (i) { |
| 369 | case ELINK_LARGEWIN_PROBE: |
| 370 | case (ELINK_LARGEWIN_PROBE & ELINK_LARGEWIN_MASK): |
| 371 | sc->ep_pktlenshift = 0; |
| 372 | break; |
| 373 | |
| 374 | case (ELINK_LARGEWIN_PROBE << 2): |
| 375 | sc->ep_pktlenshift = 2; |
| 376 | break; |
| 377 | |
| 378 | default: |
| 379 | aprint_error_dev(sc->sc_dev, |
| 380 | "wrote 0x%x to TX_AVAIL_THRESH, read back 0x%x. " |
| 381 | "Interface disabled\n" , |
| 382 | ELINK_LARGEWIN_PROBE, (int) i); |
| 383 | return (1); |
| 384 | } |
| 385 | |
| 386 | /* |
| 387 | * Ensure Tx-available interrupts are enabled for |
| 388 | * start the interface. |
| 389 | * XXX should be in epinit()? |
| 390 | */ |
| 391 | bus_space_write_2(iot, ioh, ELINK_COMMAND, |
| 392 | SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); |
| 393 | |
| 394 | strlcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); |
| 395 | ifp->if_softc = sc; |
| 396 | ifp->if_start = epstart; |
| 397 | ifp->if_ioctl = epioctl; |
| 398 | ifp->if_watchdog = epwatchdog; |
| 399 | ifp->if_init = epinit; |
| 400 | ifp->if_stop = epstop; |
| 401 | ifp->if_flags = |
| 402 | IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; |
| 403 | IFQ_SET_READY(&ifp->if_snd); |
| 404 | |
| 405 | if_attach(ifp); |
| 406 | ether_ifattach(ifp, enaddr); |
| 407 | |
| 408 | /* |
| 409 | * Finish configuration: |
| 410 | * determine chipset if the front-end couldn't do so, |
| 411 | * show board details, set media. |
| 412 | */ |
| 413 | |
| 414 | /* |
| 415 | * Print RAM size. We also print the Ethernet address in here. |
| 416 | * It's extracted from the ifp, so we have to make sure it's |
| 417 | * been attached first. |
| 418 | */ |
| 419 | ep_internalconfig(sc); |
| 420 | GO_WINDOW(0); |
| 421 | |
| 422 | /* |
| 423 | * Display some additional information, if pertinent. |
| 424 | */ |
| 425 | if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) |
| 426 | aprint_normal_dev(sc->sc_dev, "RoadRunner FIFO buffer enabled\n" ); |
| 427 | |
| 428 | /* |
| 429 | * Initialize our media structures and MII info. We'll |
| 430 | * probe the MII if we discover that we have one. |
| 431 | */ |
| 432 | sc->sc_mii.mii_ifp = ifp; |
| 433 | sc->sc_mii.mii_readreg = ep_mii_readreg; |
| 434 | sc->sc_mii.mii_writereg = ep_mii_writereg; |
| 435 | sc->sc_mii.mii_statchg = ep_statchg; |
| 436 | ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, ep_media_change, |
| 437 | ep_media_status); |
| 438 | |
| 439 | /* |
| 440 | * All CORKSCREW chips have MII. |
| 441 | */ |
| 442 | if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) |
| 443 | sc->ep_flags |= ELINK_FLAGS_MII; |
| 444 | |
| 445 | /* |
| 446 | * Now, determine which media we have. |
| 447 | */ |
| 448 | switch (sc->ep_chipset) { |
| 449 | case ELINK_CHIPSET_ROADRUNNER: |
| 450 | if (sc->ep_flags & ELINK_FLAGS_MII) { |
| 451 | ep_roadrunner_mii_enable(sc); |
| 452 | GO_WINDOW(0); |
| 453 | } |
| 454 | /* FALLTHROUGH */ |
| 455 | |
| 456 | case ELINK_CHIPSET_CORKSCREW: |
| 457 | case ELINK_CHIPSET_BOOMERANG: |
| 458 | /* |
| 459 | * If the device has MII, probe it. We won't be using |
| 460 | * any `native' media in this case, only PHYs. If |
| 461 | * we don't, just treat the Boomerang like the Vortex. |
| 462 | */ |
| 463 | if (sc->ep_flags & ELINK_FLAGS_MII) { |
| 464 | mii_attach(sc->sc_dev, &sc->sc_mii, 0xffffffff, |
| 465 | MII_PHY_ANY, MII_OFFSET_ANY, 0); |
| 466 | if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { |
| 467 | ifmedia_add(&sc->sc_mii.mii_media, |
| 468 | IFM_ETHER|IFM_NONE, 0, NULL); |
| 469 | ifmedia_set(&sc->sc_mii.mii_media, |
| 470 | IFM_ETHER|IFM_NONE); |
| 471 | } else { |
| 472 | ifmedia_set(&sc->sc_mii.mii_media, |
| 473 | IFM_ETHER|IFM_AUTO); |
| 474 | } |
| 475 | break; |
| 476 | } |
| 477 | /* FALLTHROUGH */ |
| 478 | |
| 479 | case ELINK_CHIPSET_VORTEX: |
| 480 | ep_vortex_probemedia(sc); |
| 481 | break; |
| 482 | |
| 483 | default: |
| 484 | ep_509_probemedia(sc); |
| 485 | break; |
| 486 | } |
| 487 | |
| 488 | GO_WINDOW(1); /* Window 1 is operating window */ |
| 489 | |
| 490 | rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev), |
| 491 | RND_TYPE_NET, RND_FLAG_DEFAULT); |
| 492 | |
| 493 | sc->tx_start_thresh = 20; /* probably a good starting point. */ |
| 494 | |
| 495 | /* Establish callback to reset card when we reboot. */ |
| 496 | if (pmf_device_register1(sc->sc_dev, NULL, NULL, epshutdown)) |
| 497 | pmf_class_network_register(sc->sc_dev, ifp); |
| 498 | else |
| 499 | aprint_error_dev(sc->sc_dev, |
| 500 | "couldn't establish power handler\n" ); |
| 501 | |
| 502 | ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); |
| 503 | ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); |
| 504 | |
| 505 | /* The attach is successful. */ |
| 506 | sc->sc_flags |= ELINK_FLAGS_ATTACHED; |
| 507 | return (0); |
| 508 | } |
| 509 | |
| 510 | |
| 511 | /* |
| 512 | * Show interface-model-independent info from window 3 |
| 513 | * internal-configuration register. |
| 514 | */ |
| 515 | void |
| 516 | ep_internalconfig(struct ep_softc *sc) |
| 517 | { |
| 518 | bus_space_tag_t iot = sc->sc_iot; |
| 519 | bus_space_handle_t ioh = sc->sc_ioh; |
| 520 | |
| 521 | u_int config0; |
| 522 | u_int config1; |
| 523 | |
| 524 | int ram_size, ram_width, ram_split; |
| 525 | /* |
| 526 | * NVRAM buffer Rx:Tx config names for busmastering cards |
| 527 | * (Demon, Vortex, and later). |
| 528 | */ |
| 529 | const char *const onboard_ram_config[] = { |
| 530 | "5:3" , "3:1" , "1:1" , "3:5" }; |
| 531 | |
| 532 | GO_WINDOW(3); |
| 533 | config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG); |
| 534 | config1 = (u_int)bus_space_read_2(iot, ioh, |
| 535 | ELINK_W3_INTERNAL_CONFIG + 2); |
| 536 | GO_WINDOW(0); |
| 537 | |
| 538 | ram_size = (config0 & CONFIG_RAMSIZE) >> CONFIG_RAMSIZE_SHIFT; |
| 539 | ram_width = (config0 & CONFIG_RAMWIDTH) >> CONFIG_RAMWIDTH_SHIFT; |
| 540 | |
| 541 | ram_split = (config1 & CONFIG_RAMSPLIT) >> CONFIG_RAMSPLIT_SHIFT; |
| 542 | |
| 543 | aprint_normal_dev(sc->sc_dev, "address %s, %dKB %s-wide FIFO, %s Rx:Tx split\n" , |
| 544 | ether_sprintf(CLLADDR(sc->sc_ethercom.ec_if.if_sadl)), |
| 545 | 8 << ram_size, |
| 546 | (ram_width) ? "word" : "byte" , |
| 547 | onboard_ram_config[ram_split]); |
| 548 | } |
| 549 | |
| 550 | |
| 551 | /* |
| 552 | * Find supported media on 3c509-generation hardware that doesn't have |
| 553 | * a "reset_options" register in window 3. |
| 554 | * Use the config_cntrl register in window 0 instead. |
| 555 | * Used on original, 10Mbit ISA (3c509), 3c509B, and pre-Demon EISA cards |
| 556 | * that implement CONFIG_CTRL. We don't have a good way to set the |
| 557 | * default active medium; punt to ifconfig instead. |
| 558 | */ |
| 559 | void |
| 560 | ep_509_probemedia(struct ep_softc *sc) |
| 561 | { |
| 562 | bus_space_tag_t iot = sc->sc_iot; |
| 563 | bus_space_handle_t ioh = sc->sc_ioh; |
| 564 | struct ifmedia *ifm = &sc->sc_mii.mii_media; |
| 565 | u_int16_t ep_w0_config, port; |
| 566 | const struct ep_media *epm; |
| 567 | const char *sep = "" , *defmedianame = NULL; |
| 568 | int defmedia = 0; |
| 569 | |
| 570 | GO_WINDOW(0); |
| 571 | ep_w0_config = bus_space_read_2(iot, ioh, ELINK_W0_CONFIG_CTRL); |
| 572 | |
| 573 | aprint_normal_dev(sc->sc_dev, "" ); |
| 574 | |
| 575 | /* Sanity check that there are any media! */ |
| 576 | if ((ep_w0_config & ELINK_W0_CC_MEDIAMASK) == 0) { |
| 577 | aprint_error("no media present!\n" ); |
| 578 | ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); |
| 579 | ifmedia_set(ifm, IFM_ETHER|IFM_NONE); |
| 580 | return; |
| 581 | } |
| 582 | |
| 583 | /* |
| 584 | * Get the default media from the EEPROM. |
| 585 | */ |
| 586 | port = ep_read_eeprom(sc, EEPROM_ADDR_CFG) >> 14; |
| 587 | |
| 588 | #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", " |
| 589 | |
| 590 | for (epm = ep_509_media; epm->epm_name != NULL; epm++) { |
| 591 | if (ep_w0_config & epm->epm_mpbit) { |
| 592 | /* |
| 593 | * This simple test works because 509 chipsets |
| 594 | * don't do full-duplex. |
| 595 | */ |
| 596 | if (epm->epm_epmedia == port || defmedia == 0) { |
| 597 | defmedia = epm->epm_ifmedia; |
| 598 | defmedianame = epm->epm_name; |
| 599 | } |
| 600 | ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, |
| 601 | NULL); |
| 602 | PRINT(epm->epm_name); |
| 603 | } |
| 604 | } |
| 605 | |
| 606 | #undef PRINT |
| 607 | |
| 608 | #ifdef DIAGNOSTIC |
| 609 | if (defmedia == 0) |
| 610 | panic("ep_509_probemedia: impossible" ); |
| 611 | #endif |
| 612 | |
| 613 | aprint_normal(" (default %s)\n" , defmedianame); |
| 614 | ifmedia_set(ifm, defmedia); |
| 615 | } |
| 616 | |
| 617 | /* |
| 618 | * Find media present on large-packet-capable elink3 devices. |
| 619 | * Show onboard configuration of large-packet-capable elink3 devices |
| 620 | * (Demon, Vortex, Boomerang), which do not implement CONFIG_CTRL in window 0. |
| 621 | * Use media and card-version info in window 3 instead. |
| 622 | */ |
| 623 | void |
| 624 | ep_vortex_probemedia(struct ep_softc *sc) |
| 625 | { |
| 626 | bus_space_tag_t iot = sc->sc_iot; |
| 627 | bus_space_handle_t ioh = sc->sc_ioh; |
| 628 | struct ifmedia *ifm = &sc->sc_mii.mii_media; |
| 629 | const struct ep_media *epm; |
| 630 | u_int config1; |
| 631 | int reset_options; |
| 632 | int default_media; /* 3-bit encoding of default (EEPROM) media */ |
| 633 | int defmedia = 0; |
| 634 | const char *sep = "" , *defmedianame = NULL; |
| 635 | |
| 636 | GO_WINDOW(3); |
| 637 | config1 = (u_int)bus_space_read_2(iot, ioh, |
| 638 | ELINK_W3_INTERNAL_CONFIG + 2); |
| 639 | reset_options = (int)bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS); |
| 640 | GO_WINDOW(0); |
| 641 | |
| 642 | default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; |
| 643 | |
| 644 | aprint_normal_dev(sc->sc_dev, "" ); |
| 645 | |
| 646 | /* Sanity check that there are any media! */ |
| 647 | if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { |
| 648 | aprint_error("no media present!\n" ); |
| 649 | ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); |
| 650 | ifmedia_set(ifm, IFM_ETHER|IFM_NONE); |
| 651 | return; |
| 652 | } |
| 653 | |
| 654 | #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", " |
| 655 | |
| 656 | for (epm = ep_vortex_media; epm->epm_name != NULL; epm++) { |
| 657 | if (reset_options & epm->epm_mpbit) { |
| 658 | /* |
| 659 | * Default media is a little more complicated |
| 660 | * on the Vortex. We support full-duplex which |
| 661 | * uses the same reset options bit. |
| 662 | * |
| 663 | * XXX Check EEPROM for default to FDX? |
| 664 | */ |
| 665 | if (epm->epm_epmedia == default_media) { |
| 666 | if ((epm->epm_ifmedia & IFM_FDX) == 0) { |
| 667 | defmedia = epm->epm_ifmedia; |
| 668 | defmedianame = epm->epm_name; |
| 669 | } |
| 670 | } else if (defmedia == 0) { |
| 671 | defmedia = epm->epm_ifmedia; |
| 672 | defmedianame = epm->epm_name; |
| 673 | } |
| 674 | ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, |
| 675 | NULL); |
| 676 | PRINT(epm->epm_name); |
| 677 | } |
| 678 | } |
| 679 | |
| 680 | #undef PRINT |
| 681 | |
| 682 | #ifdef DIAGNOSTIC |
| 683 | if (defmedia == 0) |
| 684 | panic("ep_vortex_probemedia: impossible" ); |
| 685 | #endif |
| 686 | |
| 687 | aprint_normal(" (default %s)\n" , defmedianame); |
| 688 | ifmedia_set(ifm, defmedia); |
| 689 | } |
| 690 | |
| 691 | /* |
| 692 | * One second timer, used to tick the MII. |
| 693 | */ |
| 694 | void |
| 695 | ep_tick(void *arg) |
| 696 | { |
| 697 | struct ep_softc *sc = arg; |
| 698 | int s; |
| 699 | |
| 700 | #ifdef DIAGNOSTIC |
| 701 | if ((sc->ep_flags & ELINK_FLAGS_MII) == 0) |
| 702 | panic("ep_tick" ); |
| 703 | #endif |
| 704 | |
| 705 | if (!device_is_active(sc->sc_dev)) |
| 706 | return; |
| 707 | |
| 708 | s = splnet(); |
| 709 | mii_tick(&sc->sc_mii); |
| 710 | splx(s); |
| 711 | |
| 712 | callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); |
| 713 | } |
| 714 | |
| 715 | /* |
| 716 | * Bring device up. |
| 717 | * |
| 718 | * The order in here seems important. Otherwise we may not receive |
| 719 | * interrupts. ?! |
| 720 | */ |
| 721 | int |
| 722 | epinit(struct ifnet *ifp) |
| 723 | { |
| 724 | struct ep_softc *sc = ifp->if_softc; |
| 725 | bus_space_tag_t iot = sc->sc_iot; |
| 726 | bus_space_handle_t ioh = sc->sc_ioh; |
| 727 | int i, error; |
| 728 | const u_int8_t *addr; |
| 729 | |
| 730 | if (!sc->enabled && (error = epenable(sc)) != 0) |
| 731 | return (error); |
| 732 | |
| 733 | /* Make sure any pending reset has completed before touching board */ |
| 734 | ep_finish_reset(iot, ioh); |
| 735 | |
| 736 | /* |
| 737 | * Cancel any pending I/O. |
| 738 | */ |
| 739 | epstop(ifp, 0); |
| 740 | |
| 741 | if (sc->bustype != ELINK_BUS_PCI && sc->bustype != ELINK_BUS_EISA |
| 742 | && sc->bustype != ELINK_BUS_MCA) { |
| 743 | GO_WINDOW(0); |
| 744 | bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 0); |
| 745 | bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, |
| 746 | ENABLE_DRQ_IRQ); |
| 747 | } |
| 748 | |
| 749 | if (sc->bustype == ELINK_BUS_PCMCIA) { |
| 750 | bus_space_write_2(iot, ioh, ELINK_W0_RESOURCE_CFG, 0x3f00); |
| 751 | } |
| 752 | |
| 753 | GO_WINDOW(2); |
| 754 | /* Reload the ether_addr. */ |
| 755 | addr = CLLADDR(ifp->if_sadl); |
| 756 | for (i = 0; i < 6; i += 2) |
| 757 | bus_space_write_2(iot, ioh, ELINK_W2_ADDR_0 + i, |
| 758 | (addr[i] << 0) | (addr[i + 1] << 8)); |
| 759 | |
| 760 | /* |
| 761 | * Reset the station-address receive filter. |
| 762 | * A bug workaround for busmastering (Vortex, Demon) cards. |
| 763 | */ |
| 764 | for (i = 0; i < 6; i += 2) |
| 765 | bus_space_write_2(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); |
| 766 | |
| 767 | ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); |
| 768 | ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); |
| 769 | |
| 770 | GO_WINDOW(1); /* Window 1 is operating window */ |
| 771 | for (i = 0; i < 31; i++) |
| 772 | (void)bus_space_read_2(iot, ioh, |
| 773 | ep_w1_reg(sc, ELINK_W1_TX_STATUS)); |
| 774 | |
| 775 | /* Set threshold for Tx-space available interrupt. */ |
| 776 | bus_space_write_2(iot, ioh, ELINK_COMMAND, |
| 777 | SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); |
| 778 | |
| 779 | if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { |
| 780 | /* |
| 781 | * Enable options in the PCMCIA LAN COR register, via |
| 782 | * RoadRunner Window 1. |
| 783 | * |
| 784 | * XXX MAGIC CONSTANTS! |
| 785 | */ |
| 786 | u_int16_t cor; |
| 787 | |
| 788 | bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, (1 << 11)); |
| 789 | |
| 790 | cor = bus_space_read_2(iot, ioh, 0) & ~0x30; |
| 791 | if (sc->ep_flags & ELINK_FLAGS_USESHAREDMEM) |
| 792 | cor |= 0x10; |
| 793 | if (sc->ep_flags & ELINK_FLAGS_FORCENOWAIT) |
| 794 | cor |= 0x20; |
| 795 | bus_space_write_2(iot, ioh, 0, cor); |
| 796 | |
| 797 | bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); |
| 798 | bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); |
| 799 | |
| 800 | if (sc->ep_flags & ELINK_FLAGS_MII) { |
| 801 | ep_roadrunner_mii_enable(sc); |
| 802 | GO_WINDOW(1); |
| 803 | } |
| 804 | } |
| 805 | |
| 806 | /* Enable interrupts. */ |
| 807 | bus_space_write_2(iot, ioh, ELINK_COMMAND, |
| 808 | SET_RD_0_MASK | WATCHED_INTERRUPTS); |
| 809 | bus_space_write_2(iot, ioh, ELINK_COMMAND, |
| 810 | SET_INTR_MASK | WATCHED_INTERRUPTS); |
| 811 | |
| 812 | /* |
| 813 | * Attempt to get rid of any stray interrupts that occurred during |
| 814 | * configuration. On the i386 this isn't possible because one may |
| 815 | * already be queued. However, a single stray interrupt is |
| 816 | * unimportant. |
| 817 | */ |
| 818 | bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); |
| 819 | |
| 820 | epsetfilter(sc); |
| 821 | epsetmedia(sc); |
| 822 | |
| 823 | bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); |
| 824 | bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); |
| 825 | |
| 826 | epmbuffill(sc); |
| 827 | |
| 828 | /* Interface is now `running', with no output active. */ |
| 829 | ifp->if_flags |= IFF_RUNNING; |
| 830 | ifp->if_flags &= ~IFF_OACTIVE; |
| 831 | |
| 832 | if (sc->ep_flags & ELINK_FLAGS_MII) { |
| 833 | /* Start the one second clock. */ |
| 834 | callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); |
| 835 | } |
| 836 | |
| 837 | /* Attempt to start output, if any. */ |
| 838 | epstart(ifp); |
| 839 | |
| 840 | return (0); |
| 841 | } |
| 842 | |
| 843 | |
| 844 | /* |
| 845 | * Set multicast receive filter. |
| 846 | * elink3 hardware has no selective multicast filter in hardware. |
| 847 | * Enable reception of all multicasts and filter in software. |
| 848 | */ |
| 849 | void |
| 850 | epsetfilter(struct ep_softc *sc) |
| 851 | { |
| 852 | struct ifnet *ifp = &sc->sc_ethercom.ec_if; |
| 853 | |
| 854 | GO_WINDOW(1); /* Window 1 is operating window */ |
| 855 | bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, |
| 856 | SET_RX_FILTER | FIL_INDIVIDUAL | FIL_BRDCST | |
| 857 | ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0) | |
| 858 | ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0)); |
| 859 | } |
| 860 | |
| 861 | int |
| 862 | ep_media_change(struct ifnet *ifp) |
| 863 | { |
| 864 | struct ep_softc *sc = ifp->if_softc; |
| 865 | |
| 866 | if (sc->enabled && (ifp->if_flags & IFF_UP) != 0) |
| 867 | epreset(sc); |
| 868 | |
| 869 | return (0); |
| 870 | } |
| 871 | |
| 872 | /* |
| 873 | * Reset and enable the MII on the RoadRunner. |
| 874 | */ |
| 875 | void |
| 876 | ep_roadrunner_mii_enable(struct ep_softc *sc) |
| 877 | { |
| 878 | bus_space_tag_t iot = sc->sc_iot; |
| 879 | bus_space_handle_t ioh = sc->sc_ioh; |
| 880 | |
| 881 | GO_WINDOW(3); |
| 882 | bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, |
| 883 | ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); |
| 884 | delay(1000); |
| 885 | bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, |
| 886 | ELINK_PCI_100BASE_MII|ELINK_RUNNER_MII_RESET| |
| 887 | ELINK_RUNNER_ENABLE_MII); |
| 888 | ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); |
| 889 | ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); |
| 890 | delay(1000); |
| 891 | bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, |
| 892 | ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); |
| 893 | } |
| 894 | |
| 895 | /* |
| 896 | * Set the card to use the specified media. |
| 897 | */ |
| 898 | void |
| 899 | epsetmedia(struct ep_softc *sc) |
| 900 | { |
| 901 | bus_space_tag_t iot = sc->sc_iot; |
| 902 | bus_space_handle_t ioh = sc->sc_ioh; |
| 903 | |
| 904 | /* Turn everything off. First turn off linkbeat and UTP. */ |
| 905 | GO_WINDOW(4); |
| 906 | bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0x0); |
| 907 | |
| 908 | /* Turn off coax */ |
| 909 | bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); |
| 910 | delay(1000); |
| 911 | |
| 912 | /* |
| 913 | * If the device has MII, select it, and then tell the |
| 914 | * PHY which media to use. |
| 915 | */ |
| 916 | if (sc->ep_flags & ELINK_FLAGS_MII) { |
| 917 | int config0, config1; |
| 918 | |
| 919 | GO_WINDOW(3); |
| 920 | |
| 921 | if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { |
| 922 | int resopt; |
| 923 | |
| 924 | resopt = bus_space_read_2(iot, ioh, |
| 925 | ELINK_W3_RESET_OPTIONS); |
| 926 | bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, |
| 927 | resopt | ELINK_RUNNER_ENABLE_MII); |
| 928 | } |
| 929 | |
| 930 | config0 = (u_int)bus_space_read_2(iot, ioh, |
| 931 | ELINK_W3_INTERNAL_CONFIG); |
| 932 | config1 = (u_int)bus_space_read_2(iot, ioh, |
| 933 | ELINK_W3_INTERNAL_CONFIG + 2); |
| 934 | |
| 935 | config1 = config1 & ~CONFIG_MEDIAMASK; |
| 936 | config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT); |
| 937 | |
| 938 | bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); |
| 939 | bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, |
| 940 | config1); |
| 941 | GO_WINDOW(1); /* back to operating window */ |
| 942 | |
| 943 | mii_mediachg(&sc->sc_mii); |
| 944 | return; |
| 945 | } |
| 946 | |
| 947 | /* |
| 948 | * Now turn on the selected media/transceiver. |
| 949 | */ |
| 950 | GO_WINDOW(4); |
| 951 | switch (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_cur->ifm_media)) { |
| 952 | case IFM_10_T: |
| 953 | bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, |
| 954 | JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); |
| 955 | break; |
| 956 | |
| 957 | case IFM_10_2: |
| 958 | bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); |
| 959 | DELAY(1000); /* 50ms not enmough? */ |
| 960 | break; |
| 961 | |
| 962 | case IFM_100_TX: |
| 963 | case IFM_100_FX: |
| 964 | case IFM_100_T4: /* XXX check documentation */ |
| 965 | bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, |
| 966 | LINKBEAT_ENABLE); |
| 967 | DELAY(1000); /* not strictly necessary? */ |
| 968 | break; |
| 969 | |
| 970 | case IFM_10_5: |
| 971 | bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, |
| 972 | SQE_ENABLE); |
| 973 | DELAY(1000); /* not strictly necessary? */ |
| 974 | break; |
| 975 | |
| 976 | case IFM_MANUAL: |
| 977 | /* |
| 978 | * Nothing to do here; we are actually enabling the |
| 979 | * external PHY on the MII port. |
| 980 | */ |
| 981 | break; |
| 982 | |
| 983 | case IFM_NONE: |
| 984 | printf("%s: interface disabled\n" , device_xname(sc->sc_dev)); |
| 985 | return; |
| 986 | |
| 987 | default: |
| 988 | panic("epsetmedia: impossible" ); |
| 989 | } |
| 990 | |
| 991 | /* |
| 992 | * Tell the chip which port to use. |
| 993 | */ |
| 994 | switch (sc->ep_chipset) { |
| 995 | case ELINK_CHIPSET_VORTEX: |
| 996 | case ELINK_CHIPSET_BOOMERANG: |
| 997 | { |
| 998 | int mctl, config0, config1; |
| 999 | |
| 1000 | GO_WINDOW(3); |
| 1001 | config0 = (u_int)bus_space_read_2(iot, ioh, |
| 1002 | ELINK_W3_INTERNAL_CONFIG); |
| 1003 | config1 = (u_int)bus_space_read_2(iot, ioh, |
| 1004 | ELINK_W3_INTERNAL_CONFIG + 2); |
| 1005 | |
| 1006 | config1 = config1 & ~CONFIG_MEDIAMASK; |
| 1007 | config1 |= (sc->sc_mii.mii_media.ifm_cur->ifm_data << |
| 1008 | CONFIG_MEDIAMASK_SHIFT); |
| 1009 | |
| 1010 | bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); |
| 1011 | bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, |
| 1012 | config1); |
| 1013 | |
| 1014 | mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); |
| 1015 | if (sc->sc_mii.mii_media.ifm_cur->ifm_media & IFM_FDX) |
| 1016 | mctl |= MAC_CONTROL_FDX; |
| 1017 | else |
| 1018 | mctl &= ~MAC_CONTROL_FDX; |
| 1019 | bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); |
| 1020 | break; |
| 1021 | } |
| 1022 | default: |
| 1023 | { |
| 1024 | int w0_addr_cfg; |
| 1025 | |
| 1026 | GO_WINDOW(0); |
| 1027 | w0_addr_cfg = bus_space_read_2(iot, ioh, ELINK_W0_ADDRESS_CFG); |
| 1028 | w0_addr_cfg &= 0x3fff; |
| 1029 | bus_space_write_2(iot, ioh, ELINK_W0_ADDRESS_CFG, w0_addr_cfg | |
| 1030 | (sc->sc_mii.mii_media.ifm_cur->ifm_data << 14)); |
| 1031 | DELAY(1000); |
| 1032 | break; |
| 1033 | } |
| 1034 | } |
| 1035 | |
| 1036 | GO_WINDOW(1); /* Window 1 is operating window */ |
| 1037 | } |
| 1038 | |
| 1039 | /* |
| 1040 | * Get currently-selected media from card. |
| 1041 | * (if_media callback, may be called before interface is brought up). |
| 1042 | */ |
| 1043 | void |
| 1044 | ep_media_status(struct ifnet *ifp, struct ifmediareq *req) |
| 1045 | { |
| 1046 | struct ep_softc *sc = ifp->if_softc; |
| 1047 | bus_space_tag_t iot = sc->sc_iot; |
| 1048 | bus_space_handle_t ioh = sc->sc_ioh; |
| 1049 | |
| 1050 | if (sc->enabled == 0) { |
| 1051 | req->ifm_active = IFM_ETHER|IFM_NONE; |
| 1052 | req->ifm_status = 0; |
| 1053 | return; |
| 1054 | } |
| 1055 | |
| 1056 | /* |
| 1057 | * If we have MII, go ask the PHY what's going on. |
| 1058 | */ |
| 1059 | if (sc->ep_flags & ELINK_FLAGS_MII) { |
| 1060 | mii_pollstat(&sc->sc_mii); |
| 1061 | req->ifm_active = sc->sc_mii.mii_media_active; |
| 1062 | req->ifm_status = sc->sc_mii.mii_media_status; |
| 1063 | return; |
| 1064 | } |
| 1065 | |
| 1066 | /* |
| 1067 | * Ok, at this point we claim that our active media is |
| 1068 | * the currently selected media. We'll update our status |
| 1069 | * if our chipset allows us to detect link. |
| 1070 | */ |
| 1071 | req->ifm_active = sc->sc_mii.mii_media.ifm_cur->ifm_media; |
| 1072 | req->ifm_status = 0; |
| 1073 | |
| 1074 | switch (sc->ep_chipset) { |
| 1075 | case ELINK_CHIPSET_VORTEX: |
| 1076 | case ELINK_CHIPSET_BOOMERANG: |
| 1077 | GO_WINDOW(4); |
| 1078 | req->ifm_status = IFM_AVALID; |
| 1079 | if (bus_space_read_2(iot, ioh, ELINK_W4_MEDIA_TYPE) & |
| 1080 | LINKBEAT_DETECT) |
| 1081 | req->ifm_status |= IFM_ACTIVE; |
| 1082 | GO_WINDOW(1); /* back to operating window */ |
| 1083 | break; |
| 1084 | } |
| 1085 | } |
| 1086 | |
| 1087 | |
| 1088 | |
| 1089 | /* |
| 1090 | * Start outputting on the interface. |
| 1091 | * Always called as splnet(). |
| 1092 | */ |
| 1093 | void |
| 1094 | epstart(struct ifnet *ifp) |
| 1095 | { |
| 1096 | struct ep_softc *sc = ifp->if_softc; |
| 1097 | bus_space_tag_t iot = sc->sc_iot; |
| 1098 | bus_space_handle_t ioh = sc->sc_ioh; |
| 1099 | struct mbuf *m, *m0; |
| 1100 | int sh, len, pad; |
| 1101 | bus_size_t txreg; |
| 1102 | |
| 1103 | /* Don't transmit if interface is busy or not running */ |
| 1104 | if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) |
| 1105 | return; |
| 1106 | |
| 1107 | startagain: |
| 1108 | /* Sneak a peek at the next packet */ |
| 1109 | IFQ_POLL(&ifp->if_snd, m0); |
| 1110 | if (m0 == 0) |
| 1111 | return; |
| 1112 | |
| 1113 | /* We need to use m->m_pkthdr.len, so require the header */ |
| 1114 | if ((m0->m_flags & M_PKTHDR) == 0) |
| 1115 | panic("epstart: no header mbuf" ); |
| 1116 | len = m0->m_pkthdr.len; |
| 1117 | |
| 1118 | pad = (4 - len) & 3; |
| 1119 | |
| 1120 | /* |
| 1121 | * The 3c509 automatically pads short packets to minimum ethernet |
| 1122 | * length, but we drop packets that are too large. Perhaps we should |
| 1123 | * truncate them instead? |
| 1124 | */ |
| 1125 | if (len + pad > ETHER_MAX_LEN) { |
| 1126 | /* packet is obviously too large: toss it */ |
| 1127 | ++ifp->if_oerrors; |
| 1128 | IFQ_DEQUEUE(&ifp->if_snd, m0); |
| 1129 | m_freem(m0); |
| 1130 | goto readcheck; |
| 1131 | } |
| 1132 | |
| 1133 | if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_FREE_TX)) < |
| 1134 | len + pad + 4) { |
| 1135 | bus_space_write_2(iot, ioh, ELINK_COMMAND, |
| 1136 | SET_TX_AVAIL_THRESH | |
| 1137 | ((len + pad + 4) >> sc->ep_pktlenshift)); |
| 1138 | /* not enough room in FIFO */ |
| 1139 | ifp->if_flags |= IFF_OACTIVE; |
| 1140 | return; |
| 1141 | } else { |
| 1142 | bus_space_write_2(iot, ioh, ELINK_COMMAND, |
| 1143 | SET_TX_AVAIL_THRESH | ELINK_THRESH_DISABLE); |
| 1144 | } |
| 1145 | |
| 1146 | IFQ_DEQUEUE(&ifp->if_snd, m0); |
| 1147 | if (m0 == 0) /* not really needed */ |
| 1148 | return; |
| 1149 | |
| 1150 | bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_TX_START_THRESH | |
| 1151 | ((len / 4 + sc->tx_start_thresh) /* >> sc->ep_pktlenshift*/)); |
| 1152 | |
| 1153 | bpf_mtap(ifp, m0); |
| 1154 | |
| 1155 | /* |
| 1156 | * Do the output at a high interrupt priority level so that an |
| 1157 | * interrupt from another device won't cause a FIFO underrun. |
| 1158 | * We choose splsched() since that blocks essentially everything |
| 1159 | * except for interrupts from serial devices (which typically |
| 1160 | * lose data if their interrupt isn't serviced fast enough). |
| 1161 | * |
| 1162 | * XXX THIS CAN CAUSE CLOCK DRIFT! |
| 1163 | */ |
| 1164 | sh = splsched(); |
| 1165 | |
| 1166 | txreg = ep_w1_reg(sc, ELINK_W1_TX_PIO_WR_1); |
| 1167 | |
| 1168 | if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { |
| 1169 | /* |
| 1170 | * Prime the FIFO buffer counter (number of 16-bit |
| 1171 | * words about to be written to the FIFO). |
| 1172 | * |
| 1173 | * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS |
| 1174 | * COUNTER IS NON-ZERO! |
| 1175 | */ |
| 1176 | bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, |
| 1177 | (len + pad) >> 1); |
| 1178 | } |
| 1179 | |
| 1180 | bus_space_write_2(iot, ioh, txreg, len); |
| 1181 | bus_space_write_2(iot, ioh, txreg, 0xffff); /* Second is meaningless */ |
| 1182 | if (ELINK_IS_BUS_32(sc->bustype)) { |
| 1183 | for (m = m0; m;) { |
| 1184 | if (m->m_len > 3) { |
| 1185 | /* align our reads from core */ |
| 1186 | if (mtod(m, u_long) & 3) { |
| 1187 | u_long count = |
| 1188 | 4 - (mtod(m, u_long) & 3); |
| 1189 | bus_space_write_multi_1(iot, ioh, |
| 1190 | txreg, mtod(m, u_int8_t *), count); |
| 1191 | m->m_data = |
| 1192 | (void *)(mtod(m, u_long) + count); |
| 1193 | m->m_len -= count; |
| 1194 | } |
| 1195 | bus_space_write_multi_stream_4(iot, ioh, |
| 1196 | txreg, mtod(m, u_int32_t *), m->m_len >> 2); |
| 1197 | m->m_data = (void *)(mtod(m, u_long) + |
| 1198 | (u_long)(m->m_len & ~3)); |
| 1199 | m->m_len -= m->m_len & ~3; |
| 1200 | } |
| 1201 | if (m->m_len) { |
| 1202 | bus_space_write_multi_1(iot, ioh, |
| 1203 | txreg, mtod(m, u_int8_t *), m->m_len); |
| 1204 | } |
| 1205 | m = m0 = m_free(m); |
| 1206 | } |
| 1207 | } else { |
| 1208 | for (m = m0; m;) { |
| 1209 | if (m->m_len > 1) { |
| 1210 | if (mtod(m, u_long) & 1) { |
| 1211 | bus_space_write_1(iot, ioh, |
| 1212 | txreg, *(mtod(m, u_int8_t *))); |
| 1213 | m->m_data = |
| 1214 | (void *)(mtod(m, u_long) + 1); |
| 1215 | m->m_len -= 1; |
| 1216 | } |
| 1217 | bus_space_write_multi_stream_2(iot, ioh, |
| 1218 | txreg, mtod(m, u_int16_t *), |
| 1219 | m->m_len >> 1); |
| 1220 | } |
| 1221 | if (m->m_len & 1) { |
| 1222 | bus_space_write_1(iot, ioh, txreg, |
| 1223 | *(mtod(m, u_int8_t *) + m->m_len - 1)); |
| 1224 | } |
| 1225 | m = m0 = m_free(m); |
| 1226 | } |
| 1227 | } |
| 1228 | while (pad--) |
| 1229 | bus_space_write_1(iot, ioh, txreg, 0); |
| 1230 | |
| 1231 | splx(sh); |
| 1232 | |
| 1233 | ++ifp->if_opackets; |
| 1234 | |
| 1235 | readcheck: |
| 1236 | if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)) & |
| 1237 | ERR_INCOMPLETE) == 0) { |
| 1238 | /* We received a complete packet. */ |
| 1239 | u_int16_t status = bus_space_read_2(iot, ioh, ELINK_STATUS); |
| 1240 | |
| 1241 | if ((status & INTR_LATCH) == 0) { |
| 1242 | /* |
| 1243 | * No interrupt, read the packet and continue |
| 1244 | * Is this supposed to happen? Is my motherboard |
| 1245 | * completely busted? |
| 1246 | */ |
| 1247 | epread(sc); |
| 1248 | } else { |
| 1249 | /* Got an interrupt, return so that it gets serviced. */ |
| 1250 | return; |
| 1251 | } |
| 1252 | } else { |
| 1253 | /* Check if we are stuck and reset [see XXX comment] */ |
| 1254 | if (epstatus(sc)) { |
| 1255 | if (ifp->if_flags & IFF_DEBUG) |
| 1256 | printf("%s: adapter reset\n" , |
| 1257 | device_xname(sc->sc_dev)); |
| 1258 | epreset(sc); |
| 1259 | } |
| 1260 | } |
| 1261 | |
| 1262 | goto startagain; |
| 1263 | } |
| 1264 | |
| 1265 | |
| 1266 | /* |
| 1267 | * XXX: The 3c509 card can get in a mode where both the fifo status bit |
| 1268 | * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set |
| 1269 | * We detect this situation and we reset the adapter. |
| 1270 | * It happens at times when there is a lot of broadcast traffic |
| 1271 | * on the cable (once in a blue moon). |
| 1272 | */ |
| 1273 | static int |
| 1274 | epstatus(struct ep_softc *sc) |
| 1275 | { |
| 1276 | bus_space_tag_t iot = sc->sc_iot; |
| 1277 | bus_space_handle_t ioh = sc->sc_ioh; |
| 1278 | u_int16_t fifost; |
| 1279 | |
| 1280 | /* |
| 1281 | * Check the FIFO status and act accordingly |
| 1282 | */ |
| 1283 | GO_WINDOW(4); |
| 1284 | fifost = bus_space_read_2(iot, ioh, ELINK_W4_FIFO_DIAG); |
| 1285 | GO_WINDOW(1); |
| 1286 | |
| 1287 | if (fifost & FIFOS_RX_UNDERRUN) { |
| 1288 | if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) |
| 1289 | printf("%s: RX underrun\n" , device_xname(sc->sc_dev)); |
| 1290 | epreset(sc); |
| 1291 | return 0; |
| 1292 | } |
| 1293 | |
| 1294 | if (fifost & FIFOS_RX_STATUS_OVERRUN) { |
| 1295 | if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) |
| 1296 | printf("%s: RX Status overrun\n" , device_xname(sc->sc_dev)); |
| 1297 | return 1; |
| 1298 | } |
| 1299 | |
| 1300 | if (fifost & FIFOS_RX_OVERRUN) { |
| 1301 | if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) |
| 1302 | printf("%s: RX overrun\n" , device_xname(sc->sc_dev)); |
| 1303 | return 1; |
| 1304 | } |
| 1305 | |
| 1306 | if (fifost & FIFOS_TX_OVERRUN) { |
| 1307 | if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) |
| 1308 | printf("%s: TX overrun\n" , device_xname(sc->sc_dev)); |
| 1309 | epreset(sc); |
| 1310 | return 0; |
| 1311 | } |
| 1312 | |
| 1313 | return 0; |
| 1314 | } |
| 1315 | |
| 1316 | |
| 1317 | static void |
| 1318 | eptxstat(struct ep_softc *sc) |
| 1319 | { |
| 1320 | bus_space_tag_t iot = sc->sc_iot; |
| 1321 | bus_space_handle_t ioh = sc->sc_ioh; |
| 1322 | int i; |
| 1323 | |
| 1324 | /* |
| 1325 | * We need to read+write TX_STATUS until we get a 0 status |
| 1326 | * in order to turn off the interrupt flag. |
| 1327 | */ |
| 1328 | while ((i = bus_space_read_2(iot, ioh, |
| 1329 | ep_w1_reg(sc, ELINK_W1_TX_STATUS))) & TXS_COMPLETE) { |
| 1330 | bus_space_write_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS), |
| 1331 | 0x0); |
| 1332 | |
| 1333 | if (i & TXS_JABBER) { |
| 1334 | ++sc->sc_ethercom.ec_if.if_oerrors; |
| 1335 | if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) |
| 1336 | printf("%s: jabber (%x)\n" , |
| 1337 | device_xname(sc->sc_dev), i); |
| 1338 | epreset(sc); |
| 1339 | } else if (i & TXS_UNDERRUN) { |
| 1340 | ++sc->sc_ethercom.ec_if.if_oerrors; |
| 1341 | if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) |
| 1342 | printf("%s: fifo underrun (%x) @%d\n" , |
| 1343 | device_xname(sc->sc_dev), i, |
| 1344 | sc->tx_start_thresh); |
| 1345 | if (sc->tx_succ_ok < 100) |
| 1346 | sc->tx_start_thresh = min(ETHER_MAX_LEN, |
| 1347 | sc->tx_start_thresh + 20); |
| 1348 | sc->tx_succ_ok = 0; |
| 1349 | epreset(sc); |
| 1350 | } else if (i & TXS_MAX_COLLISION) { |
| 1351 | ++sc->sc_ethercom.ec_if.if_collisions; |
| 1352 | bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); |
| 1353 | sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; |
| 1354 | } else |
| 1355 | sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; |
| 1356 | } |
| 1357 | } |
| 1358 | |
| 1359 | int |
| 1360 | epintr(void *arg) |
| 1361 | { |
| 1362 | struct ep_softc *sc = arg; |
| 1363 | bus_space_tag_t iot = sc->sc_iot; |
| 1364 | bus_space_handle_t ioh = sc->sc_ioh; |
| 1365 | struct ifnet *ifp = &sc->sc_ethercom.ec_if; |
| 1366 | u_int16_t status; |
| 1367 | int ret = 0; |
| 1368 | |
| 1369 | if (sc->enabled == 0 || !device_is_active(sc->sc_dev)) |
| 1370 | return (0); |
| 1371 | |
| 1372 | |
| 1373 | for (;;) { |
| 1374 | status = bus_space_read_2(iot, ioh, ELINK_STATUS); |
| 1375 | |
| 1376 | if ((status & WATCHED_INTERRUPTS) == 0) { |
| 1377 | if ((status & INTR_LATCH) == 0) { |
| 1378 | #if 0 |
| 1379 | printf("%s: intr latch cleared\n" , |
| 1380 | device_xname(sc->sc_dev)); |
| 1381 | #endif |
| 1382 | break; |
| 1383 | } |
| 1384 | } |
| 1385 | |
| 1386 | ret = 1; |
| 1387 | |
| 1388 | /* |
| 1389 | * Acknowledge any interrupts. It's important that we do this |
| 1390 | * first, since there would otherwise be a race condition. |
| 1391 | * Due to the i386 interrupt queueing, we may get spurious |
| 1392 | * interrupts occasionally. |
| 1393 | */ |
| 1394 | bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | |
| 1395 | (status & (INTR_LATCH | ALL_INTERRUPTS))); |
| 1396 | |
| 1397 | #if 0 |
| 1398 | status = bus_space_read_2(iot, ioh, ELINK_STATUS); |
| 1399 | |
| 1400 | printf("%s: intr%s%s%s%s\n" , device_xname(sc->sc_dev), |
| 1401 | (status & RX_COMPLETE)?" RX_COMPLETE" :"" , |
| 1402 | (status & TX_COMPLETE)?" TX_COMPLETE" :"" , |
| 1403 | (status & TX_AVAIL)?" TX_AVAIL" :"" , |
| 1404 | (status & CARD_FAILURE)?" CARD_FAILURE" :"" ); |
| 1405 | #endif |
| 1406 | |
| 1407 | if (status & RX_COMPLETE) { |
| 1408 | epread(sc); |
| 1409 | } |
| 1410 | if (status & TX_AVAIL) { |
| 1411 | sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; |
| 1412 | epstart(&sc->sc_ethercom.ec_if); |
| 1413 | } |
| 1414 | if (status & CARD_FAILURE) { |
| 1415 | printf("%s: adapter failure (%x)\n" , |
| 1416 | device_xname(sc->sc_dev), status); |
| 1417 | #if 1 |
| 1418 | epinit(ifp); |
| 1419 | #else |
| 1420 | epreset(sc); |
| 1421 | #endif |
| 1422 | return (1); |
| 1423 | } |
| 1424 | if (status & TX_COMPLETE) { |
| 1425 | eptxstat(sc); |
| 1426 | epstart(ifp); |
| 1427 | } |
| 1428 | |
| 1429 | if (status) |
| 1430 | rnd_add_uint32(&sc->rnd_source, status); |
| 1431 | } |
| 1432 | |
| 1433 | /* no more interrupts */ |
| 1434 | return (ret); |
| 1435 | } |
| 1436 | |
| 1437 | void |
| 1438 | epread(struct ep_softc *sc) |
| 1439 | { |
| 1440 | bus_space_tag_t iot = sc->sc_iot; |
| 1441 | bus_space_handle_t ioh = sc->sc_ioh; |
| 1442 | struct ifnet *ifp = &sc->sc_ethercom.ec_if; |
| 1443 | struct mbuf *m; |
| 1444 | int len; |
| 1445 | |
| 1446 | len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)); |
| 1447 | |
| 1448 | again: |
| 1449 | if (ifp->if_flags & IFF_DEBUG) { |
| 1450 | int err = len & ERR_MASK; |
| 1451 | const char *s = NULL; |
| 1452 | |
| 1453 | if (len & ERR_INCOMPLETE) |
| 1454 | s = "incomplete packet" ; |
| 1455 | else if (err == ERR_OVERRUN) |
| 1456 | s = "packet overrun" ; |
| 1457 | else if (err == ERR_RUNT) |
| 1458 | s = "runt packet" ; |
| 1459 | else if (err == ERR_ALIGNMENT) |
| 1460 | s = "bad alignment" ; |
| 1461 | else if (err == ERR_CRC) |
| 1462 | s = "bad crc" ; |
| 1463 | else if (err == ERR_OVERSIZE) |
| 1464 | s = "oversized packet" ; |
| 1465 | else if (err == ERR_DRIBBLE) |
| 1466 | s = "dribble bits" ; |
| 1467 | |
| 1468 | if (s) |
| 1469 | printf("%s: %s\n" , device_xname(sc->sc_dev), s); |
| 1470 | } |
| 1471 | |
| 1472 | if (len & ERR_INCOMPLETE) |
| 1473 | return; |
| 1474 | |
| 1475 | if (len & ERR_RX) { |
| 1476 | ++ifp->if_ierrors; |
| 1477 | goto abort; |
| 1478 | } |
| 1479 | |
| 1480 | len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */ |
| 1481 | |
| 1482 | /* Pull packet off interface. */ |
| 1483 | m = epget(sc, len); |
| 1484 | if (m == 0) { |
| 1485 | ifp->if_ierrors++; |
| 1486 | goto abort; |
| 1487 | } |
| 1488 | |
| 1489 | ++ifp->if_ipackets; |
| 1490 | |
| 1491 | /* |
| 1492 | * Check if there's a BPF listener on this interface. |
| 1493 | * If so, hand off the raw packet to BPF. |
| 1494 | */ |
| 1495 | bpf_mtap(ifp, m); |
| 1496 | |
| 1497 | if_percpuq_enqueue(ifp->if_percpuq, m); |
| 1498 | |
| 1499 | /* |
| 1500 | * In periods of high traffic we can actually receive enough |
| 1501 | * packets so that the fifo overrun bit will be set at this point, |
| 1502 | * even though we just read a packet. In this case we |
| 1503 | * are not going to receive any more interrupts. We check for |
| 1504 | * this condition and read again until the fifo is not full. |
| 1505 | * We could simplify this test by not using epstatus(), but |
| 1506 | * rechecking the RX_STATUS register directly. This test could |
| 1507 | * result in unnecessary looping in cases where there is a new |
| 1508 | * packet but the fifo is not full, but it will not fix the |
| 1509 | * stuck behavior. |
| 1510 | * |
| 1511 | * Even with this improvement, we still get packet overrun errors |
| 1512 | * which are hurting performance. Maybe when I get some more time |
| 1513 | * I'll modify epread() so that it can handle RX_EARLY interrupts. |
| 1514 | */ |
| 1515 | if (epstatus(sc)) { |
| 1516 | len = bus_space_read_2(iot, ioh, |
| 1517 | ep_w1_reg(sc, ELINK_W1_RX_STATUS)); |
| 1518 | /* Check if we are stuck and reset [see XXX comment] */ |
| 1519 | if (len & ERR_INCOMPLETE) { |
| 1520 | if (ifp->if_flags & IFF_DEBUG) |
| 1521 | printf("%s: adapter reset\n" , |
| 1522 | device_xname(sc->sc_dev)); |
| 1523 | epreset(sc); |
| 1524 | return; |
| 1525 | } |
| 1526 | goto again; |
| 1527 | } |
| 1528 | |
| 1529 | return; |
| 1530 | |
| 1531 | abort: |
| 1532 | ep_discard_rxtop(iot, ioh); |
| 1533 | |
| 1534 | } |
| 1535 | |
| 1536 | struct mbuf * |
| 1537 | epget(struct ep_softc *sc, int totlen) |
| 1538 | { |
| 1539 | bus_space_tag_t iot = sc->sc_iot; |
| 1540 | bus_space_handle_t ioh = sc->sc_ioh; |
| 1541 | struct ifnet *ifp = &sc->sc_ethercom.ec_if; |
| 1542 | struct mbuf *m; |
| 1543 | bus_size_t rxreg; |
| 1544 | int len, remaining; |
| 1545 | int s; |
| 1546 | void *newdata; |
| 1547 | u_long offset; |
| 1548 | |
| 1549 | m = sc->mb[sc->next_mb]; |
| 1550 | sc->mb[sc->next_mb] = 0; |
| 1551 | if (m == 0) { |
| 1552 | MGETHDR(m, M_DONTWAIT, MT_DATA); |
| 1553 | if (m == 0) |
| 1554 | return 0; |
| 1555 | } else { |
| 1556 | /* If the queue is no longer full, refill. */ |
| 1557 | if (sc->last_mb == sc->next_mb) |
| 1558 | callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); |
| 1559 | |
| 1560 | /* Convert one of our saved mbuf's. */ |
| 1561 | sc->next_mb = (sc->next_mb + 1) % MAX_MBS; |
| 1562 | m->m_data = m->m_pktdat; |
| 1563 | m->m_flags = M_PKTHDR; |
| 1564 | memset(&m->m_pkthdr, 0, sizeof(m->m_pkthdr)); |
| 1565 | } |
| 1566 | m_set_rcvif(m, ifp); |
| 1567 | m->m_pkthdr.len = totlen; |
| 1568 | len = MHLEN; |
| 1569 | |
| 1570 | /* |
| 1571 | * Allocate big enough space to hold whole packet, to avoid |
| 1572 | * allocating new mbufs on splsched(). |
| 1573 | */ |
| 1574 | if (totlen + ALIGNBYTES > len) { |
| 1575 | if (totlen + ALIGNBYTES > MCLBYTES) { |
| 1576 | len = ALIGN(totlen + ALIGNBYTES); |
| 1577 | MEXTMALLOC(m, len, M_DONTWAIT); |
| 1578 | } else { |
| 1579 | len = MCLBYTES; |
| 1580 | MCLGET(m, M_DONTWAIT); |
| 1581 | } |
| 1582 | if ((m->m_flags & M_EXT) == 0) { |
| 1583 | m_free(m); |
| 1584 | return 0; |
| 1585 | } |
| 1586 | } |
| 1587 | |
| 1588 | /* align the struct ip header */ |
| 1589 | newdata = (char *)ALIGN(m->m_data + sizeof(struct ether_header)) |
| 1590 | - sizeof(struct ether_header); |
| 1591 | m->m_data = newdata; |
| 1592 | m->m_len = totlen; |
| 1593 | |
| 1594 | rxreg = ep_w1_reg(sc, ELINK_W1_RX_PIO_RD_1); |
| 1595 | remaining = totlen; |
| 1596 | offset = mtod(m, u_long); |
| 1597 | |
| 1598 | /* |
| 1599 | * We read the packet at a high interrupt priority level so that |
| 1600 | * an interrupt from another device won't cause the card's packet |
| 1601 | * buffer to overflow. We choose splsched() since that blocks |
| 1602 | * essentially everything except for interrupts from serial |
| 1603 | * devices (which typically lose data if their interrupt isn't |
| 1604 | * serviced fast enough). |
| 1605 | * |
| 1606 | * XXX THIS CAN CAUSE CLOCK DRIFT! |
| 1607 | */ |
| 1608 | s = splsched(); |
| 1609 | |
| 1610 | if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { |
| 1611 | /* |
| 1612 | * Prime the FIFO buffer counter (number of 16-bit |
| 1613 | * words about to be read from the FIFO). |
| 1614 | * |
| 1615 | * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS |
| 1616 | * COUNTER IS NON-ZERO! |
| 1617 | */ |
| 1618 | bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, totlen >> 1); |
| 1619 | } |
| 1620 | |
| 1621 | if (ELINK_IS_BUS_32(sc->bustype)) { |
| 1622 | /* |
| 1623 | * Read bytes up to the point where we are aligned. |
| 1624 | * (We can align to 4 bytes, rather than ALIGNBYTES, |
| 1625 | * here because we're later reading 4-byte chunks.) |
| 1626 | */ |
| 1627 | if ((remaining > 3) && (offset & 3)) { |
| 1628 | int count = (4 - (offset & 3)); |
| 1629 | bus_space_read_multi_1(iot, ioh, |
| 1630 | rxreg, (u_int8_t *) offset, count); |
| 1631 | offset += count; |
| 1632 | remaining -= count; |
| 1633 | } |
| 1634 | if (remaining > 3) { |
| 1635 | bus_space_read_multi_stream_4(iot, ioh, |
| 1636 | rxreg, (u_int32_t *) offset, |
| 1637 | remaining >> 2); |
| 1638 | offset += remaining & ~3; |
| 1639 | remaining &= 3; |
| 1640 | } |
| 1641 | if (remaining) { |
| 1642 | bus_space_read_multi_1(iot, ioh, |
| 1643 | rxreg, (u_int8_t *) offset, remaining); |
| 1644 | } |
| 1645 | } else { |
| 1646 | if ((remaining > 1) && (offset & 1)) { |
| 1647 | bus_space_read_multi_1(iot, ioh, |
| 1648 | rxreg, (u_int8_t *) offset, 1); |
| 1649 | remaining -= 1; |
| 1650 | offset += 1; |
| 1651 | } |
| 1652 | if (remaining > 1) { |
| 1653 | bus_space_read_multi_stream_2(iot, ioh, |
| 1654 | rxreg, (u_int16_t *) offset, |
| 1655 | remaining >> 1); |
| 1656 | offset += remaining & ~1; |
| 1657 | } |
| 1658 | if (remaining & 1) { |
| 1659 | bus_space_read_multi_1(iot, ioh, |
| 1660 | rxreg, (u_int8_t *) offset, remaining & 1); |
| 1661 | } |
| 1662 | } |
| 1663 | |
| 1664 | ep_discard_rxtop(iot, ioh); |
| 1665 | |
| 1666 | if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) |
| 1667 | bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); |
| 1668 | splx(s); |
| 1669 | |
| 1670 | return (m); |
| 1671 | } |
| 1672 | |
| 1673 | int |
| 1674 | epioctl(struct ifnet *ifp, u_long cmd, void *data) |
| 1675 | { |
| 1676 | struct ep_softc *sc = ifp->if_softc; |
| 1677 | struct ifreq *ifr = (struct ifreq *)data; |
| 1678 | int s, error = 0; |
| 1679 | |
| 1680 | s = splnet(); |
| 1681 | |
| 1682 | switch (cmd) { |
| 1683 | |
| 1684 | case SIOCSIFMEDIA: |
| 1685 | case SIOCGIFMEDIA: |
| 1686 | error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); |
| 1687 | break; |
| 1688 | |
| 1689 | case SIOCADDMULTI: |
| 1690 | case SIOCDELMULTI: |
| 1691 | if (sc->enabled == 0) { |
| 1692 | error = EIO; |
| 1693 | break; |
| 1694 | } |
| 1695 | |
| 1696 | default: |
| 1697 | error = ether_ioctl(ifp, cmd, data); |
| 1698 | |
| 1699 | if (error == ENETRESET) { |
| 1700 | /* |
| 1701 | * Multicast list has changed; set the hardware filter |
| 1702 | * accordingly. |
| 1703 | */ |
| 1704 | if (ifp->if_flags & IFF_RUNNING) |
| 1705 | epreset(sc); |
| 1706 | error = 0; |
| 1707 | } |
| 1708 | break; |
| 1709 | } |
| 1710 | |
| 1711 | splx(s); |
| 1712 | return (error); |
| 1713 | } |
| 1714 | |
| 1715 | void |
| 1716 | epreset(struct ep_softc *sc) |
| 1717 | { |
| 1718 | int s; |
| 1719 | |
| 1720 | s = splnet(); |
| 1721 | epinit(&sc->sc_ethercom.ec_if); |
| 1722 | splx(s); |
| 1723 | } |
| 1724 | |
| 1725 | void |
| 1726 | epwatchdog(struct ifnet *ifp) |
| 1727 | { |
| 1728 | struct ep_softc *sc = ifp->if_softc; |
| 1729 | |
| 1730 | log(LOG_ERR, "%s: device timeout\n" , device_xname(sc->sc_dev)); |
| 1731 | ++sc->sc_ethercom.ec_if.if_oerrors; |
| 1732 | |
| 1733 | epreset(sc); |
| 1734 | } |
| 1735 | |
| 1736 | void |
| 1737 | epstop(struct ifnet *ifp, int disable) |
| 1738 | { |
| 1739 | struct ep_softc *sc = ifp->if_softc; |
| 1740 | bus_space_tag_t iot = sc->sc_iot; |
| 1741 | bus_space_handle_t ioh = sc->sc_ioh; |
| 1742 | |
| 1743 | if (sc->ep_flags & ELINK_FLAGS_MII) { |
| 1744 | /* Stop the one second clock. */ |
| 1745 | callout_stop(&sc->sc_mbuf_callout); |
| 1746 | |
| 1747 | /* Down the MII. */ |
| 1748 | mii_down(&sc->sc_mii); |
| 1749 | } |
| 1750 | |
| 1751 | if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { |
| 1752 | /* |
| 1753 | * Clear the FIFO buffer count, thus halting |
| 1754 | * any currently-running transactions. |
| 1755 | */ |
| 1756 | GO_WINDOW(1); /* sanity */ |
| 1757 | bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); |
| 1758 | bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); |
| 1759 | } |
| 1760 | |
| 1761 | bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); |
| 1762 | ep_discard_rxtop(iot, ioh); |
| 1763 | |
| 1764 | bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); |
| 1765 | bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); |
| 1766 | |
| 1767 | ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); |
| 1768 | ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); |
| 1769 | |
| 1770 | bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | INTR_LATCH); |
| 1771 | bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK); |
| 1772 | bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK); |
| 1773 | bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RX_FILTER); |
| 1774 | |
| 1775 | epmbufempty(sc); |
| 1776 | |
| 1777 | if (disable) |
| 1778 | epdisable(sc); |
| 1779 | |
| 1780 | ifp->if_flags &= ~IFF_RUNNING; |
| 1781 | } |
| 1782 | |
| 1783 | |
| 1784 | /* |
| 1785 | * Before reboots, reset card completely. |
| 1786 | */ |
| 1787 | static bool |
| 1788 | epshutdown(device_t self, int howto) |
| 1789 | { |
| 1790 | struct ep_softc *sc = device_private(self); |
| 1791 | int s = splnet(); |
| 1792 | |
| 1793 | if (sc->enabled) { |
| 1794 | epstop(&sc->sc_ethercom.ec_if, 0); |
| 1795 | ep_reset_cmd(sc, ELINK_COMMAND, GLOBAL_RESET); |
| 1796 | epdisable(sc); |
| 1797 | sc->enabled = 0; |
| 1798 | } |
| 1799 | splx(s); |
| 1800 | |
| 1801 | return true; |
| 1802 | } |
| 1803 | |
| 1804 | /* |
| 1805 | * We get eeprom data from the id_port given an offset into the |
| 1806 | * eeprom. Basically; after the ID_sequence is sent to all of |
| 1807 | * the cards; they enter the ID_CMD state where they will accept |
| 1808 | * command requests. 0x80-0xbf loads the eeprom data. We then |
| 1809 | * read the port 16 times and with every read; the cards check |
| 1810 | * for contention (ie: if one card writes a 0 bit and another |
| 1811 | * writes a 1 bit then the host sees a 0. At the end of the cycle; |
| 1812 | * each card compares the data on the bus; if there is a difference |
| 1813 | * then that card goes into ID_WAIT state again). In the meantime; |
| 1814 | * one bit of data is returned in the AX register which is conveniently |
| 1815 | * returned to us by bus_space_read_2(). Hence; we read 16 times getting one |
| 1816 | * bit of data with each read. |
| 1817 | * |
| 1818 | * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT! |
| 1819 | */ |
| 1820 | u_int16_t |
| 1821 | epreadeeprom(bus_space_tag_t iot, bus_space_handle_t ioh, int offset) |
| 1822 | { |
| 1823 | u_int16_t data = 0; |
| 1824 | int i; |
| 1825 | |
| 1826 | bus_space_write_2(iot, ioh, 0, 0x80 + offset); |
| 1827 | delay(1000); |
| 1828 | for (i = 0; i < 16; i++) |
| 1829 | data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1); |
| 1830 | return (data); |
| 1831 | } |
| 1832 | |
| 1833 | static int |
| 1834 | epbusyeeprom(struct ep_softc *sc) |
| 1835 | { |
| 1836 | bus_space_tag_t iot = sc->sc_iot; |
| 1837 | bus_space_handle_t ioh = sc->sc_ioh; |
| 1838 | bus_size_t eecmd; |
| 1839 | int i = 100, j; |
| 1840 | uint16_t busybit; |
| 1841 | |
| 1842 | if (sc->bustype == ELINK_BUS_PCMCIA) { |
| 1843 | delay(1000); |
| 1844 | return 0; |
| 1845 | } |
| 1846 | |
| 1847 | if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) { |
| 1848 | eecmd = CORK_ASIC_EEPROM_COMMAND; |
| 1849 | busybit = CORK_EEPROM_BUSY; |
| 1850 | } else { |
| 1851 | eecmd = ELINK_W0_EEPROM_COMMAND; |
| 1852 | busybit = EEPROM_BUSY; |
| 1853 | } |
| 1854 | |
| 1855 | j = 0; /* bad GCC flow analysis */ |
| 1856 | while (i--) { |
| 1857 | j = bus_space_read_2(iot, ioh, eecmd); |
| 1858 | if (j & busybit) |
| 1859 | delay(100); |
| 1860 | else |
| 1861 | break; |
| 1862 | } |
| 1863 | if (i == 0) { |
| 1864 | aprint_normal("\n" ); |
| 1865 | aprint_error_dev(sc->sc_dev, "eeprom failed to come ready\n" ); |
| 1866 | return (1); |
| 1867 | } |
| 1868 | if (sc->ep_chipset != ELINK_CHIPSET_CORKSCREW && |
| 1869 | (j & EEPROM_TST_MODE) != 0) { |
| 1870 | /* XXX PnP mode? */ |
| 1871 | printf("\n%s: erase pencil mark!\n" , device_xname(sc->sc_dev)); |
| 1872 | return (1); |
| 1873 | } |
| 1874 | return (0); |
| 1875 | } |
| 1876 | |
| 1877 | u_int16_t |
| 1878 | ep_read_eeprom(struct ep_softc *sc, u_int16_t offset) |
| 1879 | { |
| 1880 | bus_size_t eecmd, eedata; |
| 1881 | u_int16_t readcmd; |
| 1882 | |
| 1883 | if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) { |
| 1884 | eecmd = CORK_ASIC_EEPROM_COMMAND; |
| 1885 | eedata = CORK_ASIC_EEPROM_DATA; |
| 1886 | } else { |
| 1887 | eecmd = ELINK_W0_EEPROM_COMMAND; |
| 1888 | eedata = ELINK_W0_EEPROM_DATA; |
| 1889 | } |
| 1890 | |
| 1891 | /* |
| 1892 | * RoadRunner has a larger EEPROM, so a different read command |
| 1893 | * is required. |
| 1894 | */ |
| 1895 | if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) |
| 1896 | readcmd = READ_EEPROM_RR; |
| 1897 | else |
| 1898 | readcmd = READ_EEPROM; |
| 1899 | |
| 1900 | if (epbusyeeprom(sc)) |
| 1901 | return (0); /* XXX why is eeprom busy? */ |
| 1902 | |
| 1903 | bus_space_write_2(sc->sc_iot, sc->sc_ioh, eecmd, readcmd | offset); |
| 1904 | |
| 1905 | if (epbusyeeprom(sc)) |
| 1906 | return (0); /* XXX why is eeprom busy? */ |
| 1907 | |
| 1908 | return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, eedata)); |
| 1909 | } |
| 1910 | |
| 1911 | void |
| 1912 | epmbuffill(void *v) |
| 1913 | { |
| 1914 | struct ep_softc *sc = v; |
| 1915 | struct mbuf *m; |
| 1916 | int s, i; |
| 1917 | |
| 1918 | s = splnet(); |
| 1919 | i = sc->last_mb; |
| 1920 | do { |
| 1921 | if (sc->mb[i] == 0) { |
| 1922 | MGET(m, M_DONTWAIT, MT_DATA); |
| 1923 | if (m == 0) |
| 1924 | break; |
| 1925 | sc->mb[i] = m; |
| 1926 | } |
| 1927 | i = (i + 1) % MAX_MBS; |
| 1928 | } while (i != sc->next_mb); |
| 1929 | sc->last_mb = i; |
| 1930 | /* If the queue was not filled, try again. */ |
| 1931 | if (sc->last_mb != sc->next_mb) |
| 1932 | callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); |
| 1933 | splx(s); |
| 1934 | } |
| 1935 | |
| 1936 | void |
| 1937 | epmbufempty(struct ep_softc *sc) |
| 1938 | { |
| 1939 | int s, i; |
| 1940 | |
| 1941 | s = splnet(); |
| 1942 | for (i = 0; i < MAX_MBS; i++) { |
| 1943 | if (sc->mb[i]) { |
| 1944 | m_freem(sc->mb[i]); |
| 1945 | sc->mb[i] = NULL; |
| 1946 | } |
| 1947 | } |
| 1948 | sc->last_mb = sc->next_mb = 0; |
| 1949 | callout_stop(&sc->sc_mbuf_callout); |
| 1950 | splx(s); |
| 1951 | } |
| 1952 | |
| 1953 | int |
| 1954 | epenable(struct ep_softc *sc) |
| 1955 | { |
| 1956 | |
| 1957 | if (sc->enabled == 0 && sc->enable != NULL) { |
| 1958 | if ((*sc->enable)(sc) != 0) { |
| 1959 | aprint_error_dev(sc->sc_dev, "device enable failed\n" ); |
| 1960 | return (EIO); |
| 1961 | } |
| 1962 | } |
| 1963 | |
| 1964 | sc->enabled = 1; |
| 1965 | return (0); |
| 1966 | } |
| 1967 | |
| 1968 | void |
| 1969 | epdisable(struct ep_softc *sc) |
| 1970 | { |
| 1971 | |
| 1972 | if (sc->enabled != 0 && sc->disable != NULL) { |
| 1973 | (*sc->disable)(sc); |
| 1974 | sc->enabled = 0; |
| 1975 | } |
| 1976 | } |
| 1977 | |
| 1978 | /* |
| 1979 | * ep_activate: |
| 1980 | * |
| 1981 | * Handle device activation/deactivation requests. |
| 1982 | */ |
| 1983 | int |
| 1984 | ep_activate(device_t self, enum devact act) |
| 1985 | { |
| 1986 | struct ep_softc *sc = device_private(self); |
| 1987 | |
| 1988 | switch (act) { |
| 1989 | case DVACT_DEACTIVATE: |
| 1990 | if_deactivate(&sc->sc_ethercom.ec_if); |
| 1991 | return 0; |
| 1992 | default: |
| 1993 | return EOPNOTSUPP; |
| 1994 | } |
| 1995 | } |
| 1996 | |
| 1997 | /* |
| 1998 | * ep_detach: |
| 1999 | * |
| 2000 | * Detach a elink3 interface. |
| 2001 | */ |
| 2002 | int |
| 2003 | ep_detach(device_t self, int flags) |
| 2004 | { |
| 2005 | struct ep_softc *sc = device_private(self); |
| 2006 | struct ifnet *ifp = &sc->sc_ethercom.ec_if; |
| 2007 | |
| 2008 | /* Succeed now if there's no work to do. */ |
| 2009 | if ((sc->sc_flags & ELINK_FLAGS_ATTACHED) == 0) |
| 2010 | return (0); |
| 2011 | |
| 2012 | epdisable(sc); |
| 2013 | |
| 2014 | callout_stop(&sc->sc_mii_callout); |
| 2015 | callout_stop(&sc->sc_mbuf_callout); |
| 2016 | |
| 2017 | if (sc->ep_flags & ELINK_FLAGS_MII) { |
| 2018 | /* Detach all PHYs */ |
| 2019 | mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); |
| 2020 | } |
| 2021 | |
| 2022 | /* Delete all remaining media. */ |
| 2023 | ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); |
| 2024 | |
| 2025 | rnd_detach_source(&sc->rnd_source); |
| 2026 | ether_ifdetach(ifp); |
| 2027 | if_detach(ifp); |
| 2028 | |
| 2029 | pmf_device_deregister(sc->sc_dev); |
| 2030 | |
| 2031 | return (0); |
| 2032 | } |
| 2033 | |
| 2034 | u_int32_t |
| 2035 | ep_mii_bitbang_read(device_t self) |
| 2036 | { |
| 2037 | struct ep_softc *sc = device_private(self); |
| 2038 | |
| 2039 | /* We're already in Window 4. */ |
| 2040 | return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, |
| 2041 | ELINK_W4_BOOM_PHYSMGMT)); |
| 2042 | } |
| 2043 | |
| 2044 | void |
| 2045 | ep_mii_bitbang_write(device_t self, u_int32_t val) |
| 2046 | { |
| 2047 | struct ep_softc *sc = device_private(self); |
| 2048 | |
| 2049 | /* We're already in Window 4. */ |
| 2050 | bus_space_write_2(sc->sc_iot, sc->sc_ioh, |
| 2051 | ELINK_W4_BOOM_PHYSMGMT, val); |
| 2052 | } |
| 2053 | |
| 2054 | int |
| 2055 | ep_mii_readreg(device_t self, int phy, int reg) |
| 2056 | { |
| 2057 | struct ep_softc *sc = device_private(self); |
| 2058 | int val; |
| 2059 | |
| 2060 | GO_WINDOW(4); |
| 2061 | |
| 2062 | val = mii_bitbang_readreg(self, &ep_mii_bitbang_ops, phy, reg); |
| 2063 | |
| 2064 | GO_WINDOW(1); |
| 2065 | |
| 2066 | return (val); |
| 2067 | } |
| 2068 | |
| 2069 | void |
| 2070 | ep_mii_writereg(device_t self, int phy, int reg, int val) |
| 2071 | { |
| 2072 | struct ep_softc *sc = device_private(self); |
| 2073 | |
| 2074 | GO_WINDOW(4); |
| 2075 | |
| 2076 | mii_bitbang_writereg(self, &ep_mii_bitbang_ops, phy, reg, val); |
| 2077 | |
| 2078 | GO_WINDOW(1); |
| 2079 | } |
| 2080 | |
| 2081 | void |
| 2082 | ep_statchg(struct ifnet *ifp) |
| 2083 | { |
| 2084 | struct ep_softc *sc = ifp->if_softc; |
| 2085 | bus_space_tag_t iot = sc->sc_iot; |
| 2086 | bus_space_handle_t ioh = sc->sc_ioh; |
| 2087 | int mctl; |
| 2088 | |
| 2089 | GO_WINDOW(3); |
| 2090 | mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); |
| 2091 | if (sc->sc_mii.mii_media_active & IFM_FDX) |
| 2092 | mctl |= MAC_CONTROL_FDX; |
| 2093 | else |
| 2094 | mctl &= ~MAC_CONTROL_FDX; |
| 2095 | bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); |
| 2096 | GO_WINDOW(1); /* back to operating window */ |
| 2097 | } |
| 2098 | |
| 2099 | void |
| 2100 | ep_power(int why, void *arg) |
| 2101 | { |
| 2102 | struct ep_softc *sc = arg; |
| 2103 | struct ifnet *ifp = &sc->sc_ethercom.ec_if; |
| 2104 | int s; |
| 2105 | |
| 2106 | s = splnet(); |
| 2107 | switch (why) { |
| 2108 | case PWR_SUSPEND: |
| 2109 | case PWR_STANDBY: |
| 2110 | epstop(ifp, 1); |
| 2111 | break; |
| 2112 | case PWR_RESUME: |
| 2113 | if (ifp->if_flags & IFF_UP) { |
| 2114 | (void)epinit(ifp); |
| 2115 | } |
| 2116 | break; |
| 2117 | case PWR_SOFTSUSPEND: |
| 2118 | case PWR_SOFTSTANDBY: |
| 2119 | case PWR_SOFTRESUME: |
| 2120 | break; |
| 2121 | } |
| 2122 | splx(s); |
| 2123 | } |
| 2124 | |