| 1 | /* $NetBSD: nouveau_subdev_gpio_nv10.c,v 1.1.1.1 2014/08/06 12:36:30 riastradh Exp $ */ |
| 2 | |
| 3 | /* |
| 4 | * Copyright (C) 2009 Francisco Jerez. |
| 5 | * All Rights Reserved. |
| 6 | * |
| 7 | * Permission is hereby granted, free of charge, to any person obtaining |
| 8 | * a copy of this software and associated documentation files (the |
| 9 | * "Software"), to deal in the Software without restriction, including |
| 10 | * without limitation the rights to use, copy, modify, merge, publish, |
| 11 | * distribute, sublicense, and/or sell copies of the Software, and to |
| 12 | * permit persons to whom the Software is furnished to do so, subject to |
| 13 | * the following conditions: |
| 14 | * |
| 15 | * The above copyright notice and this permission notice (including the |
| 16 | * next paragraph) shall be included in all copies or substantial |
| 17 | * portions of the Software. |
| 18 | * |
| 19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 20 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 21 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
| 22 | * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE |
| 23 | * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION |
| 24 | * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION |
| 25 | * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 26 | * |
| 27 | */ |
| 28 | |
| 29 | #include <sys/cdefs.h> |
| 30 | __KERNEL_RCSID(0, "$NetBSD: nouveau_subdev_gpio_nv10.c,v 1.1.1.1 2014/08/06 12:36:30 riastradh Exp $" ); |
| 31 | |
| 32 | #include "priv.h" |
| 33 | |
| 34 | struct nv10_gpio_priv { |
| 35 | struct nouveau_gpio base; |
| 36 | }; |
| 37 | |
| 38 | static int |
| 39 | nv10_gpio_sense(struct nouveau_gpio *gpio, int line) |
| 40 | { |
| 41 | if (line < 2) { |
| 42 | line = line * 16; |
| 43 | line = nv_rd32(gpio, 0x600818) >> line; |
| 44 | return !!(line & 0x0100); |
| 45 | } else |
| 46 | if (line < 10) { |
| 47 | line = (line - 2) * 4; |
| 48 | line = nv_rd32(gpio, 0x60081c) >> line; |
| 49 | return !!(line & 0x04); |
| 50 | } else |
| 51 | if (line < 14) { |
| 52 | line = (line - 10) * 4; |
| 53 | line = nv_rd32(gpio, 0x600850) >> line; |
| 54 | return !!(line & 0x04); |
| 55 | } |
| 56 | |
| 57 | return -EINVAL; |
| 58 | } |
| 59 | |
| 60 | static int |
| 61 | nv10_gpio_drive(struct nouveau_gpio *gpio, int line, int dir, int out) |
| 62 | { |
| 63 | u32 reg, mask, data; |
| 64 | |
| 65 | if (line < 2) { |
| 66 | line = line * 16; |
| 67 | reg = 0x600818; |
| 68 | mask = 0x00000011; |
| 69 | data = (dir << 4) | out; |
| 70 | } else |
| 71 | if (line < 10) { |
| 72 | line = (line - 2) * 4; |
| 73 | reg = 0x60081c; |
| 74 | mask = 0x00000003; |
| 75 | data = (dir << 1) | out; |
| 76 | } else |
| 77 | if (line < 14) { |
| 78 | line = (line - 10) * 4; |
| 79 | reg = 0x600850; |
| 80 | mask = 0x00000003; |
| 81 | data = (dir << 1) | out; |
| 82 | } else { |
| 83 | return -EINVAL; |
| 84 | } |
| 85 | |
| 86 | nv_mask(gpio, reg, mask << line, data << line); |
| 87 | return 0; |
| 88 | } |
| 89 | |
| 90 | static void |
| 91 | nv10_gpio_intr(struct nouveau_subdev *subdev) |
| 92 | { |
| 93 | struct nv10_gpio_priv *priv = (void *)subdev; |
| 94 | u32 intr = nv_rd32(priv, 0x001104); |
| 95 | u32 hi = (intr & 0x0000ffff) >> 0; |
| 96 | u32 lo = (intr & 0xffff0000) >> 16; |
| 97 | int i; |
| 98 | |
| 99 | for (i = 0; (hi | lo) && i < 32; i++) { |
| 100 | if ((hi | lo) & (1 << i)) |
| 101 | nouveau_event_trigger(priv->base.events, i); |
| 102 | } |
| 103 | |
| 104 | nv_wr32(priv, 0x001104, intr); |
| 105 | } |
| 106 | |
| 107 | static void |
| 108 | nv10_gpio_intr_enable(struct nouveau_event *event, int line) |
| 109 | { |
| 110 | nv_wr32(event->priv, 0x001104, 0x00010001 << line); |
| 111 | nv_mask(event->priv, 0x001144, 0x00010001 << line, 0x00010001 << line); |
| 112 | } |
| 113 | |
| 114 | static void |
| 115 | nv10_gpio_intr_disable(struct nouveau_event *event, int line) |
| 116 | { |
| 117 | nv_wr32(event->priv, 0x001104, 0x00010001 << line); |
| 118 | nv_mask(event->priv, 0x001144, 0x00010001 << line, 0x00000000); |
| 119 | } |
| 120 | |
| 121 | static int |
| 122 | nv10_gpio_ctor(struct nouveau_object *parent, struct nouveau_object *engine, |
| 123 | struct nouveau_oclass *oclass, void *data, u32 size, |
| 124 | struct nouveau_object **pobject) |
| 125 | { |
| 126 | struct nv10_gpio_priv *priv; |
| 127 | int ret; |
| 128 | |
| 129 | ret = nouveau_gpio_create(parent, engine, oclass, 16, &priv); |
| 130 | *pobject = nv_object(priv); |
| 131 | if (ret) |
| 132 | return ret; |
| 133 | |
| 134 | priv->base.drive = nv10_gpio_drive; |
| 135 | priv->base.sense = nv10_gpio_sense; |
| 136 | priv->base.events->priv = priv; |
| 137 | priv->base.events->enable = nv10_gpio_intr_enable; |
| 138 | priv->base.events->disable = nv10_gpio_intr_disable; |
| 139 | nv_subdev(priv)->intr = nv10_gpio_intr; |
| 140 | return 0; |
| 141 | } |
| 142 | |
| 143 | static void |
| 144 | nv10_gpio_dtor(struct nouveau_object *object) |
| 145 | { |
| 146 | struct nv10_gpio_priv *priv = (void *)object; |
| 147 | nouveau_gpio_destroy(&priv->base); |
| 148 | } |
| 149 | |
| 150 | static int |
| 151 | nv10_gpio_init(struct nouveau_object *object) |
| 152 | { |
| 153 | struct nv10_gpio_priv *priv = (void *)object; |
| 154 | int ret; |
| 155 | |
| 156 | ret = nouveau_gpio_init(&priv->base); |
| 157 | if (ret) |
| 158 | return ret; |
| 159 | |
| 160 | nv_wr32(priv, 0x001144, 0x00000000); |
| 161 | nv_wr32(priv, 0x001104, 0xffffffff); |
| 162 | return 0; |
| 163 | } |
| 164 | |
| 165 | static int |
| 166 | nv10_gpio_fini(struct nouveau_object *object, bool suspend) |
| 167 | { |
| 168 | struct nv10_gpio_priv *priv = (void *)object; |
| 169 | nv_wr32(priv, 0x001144, 0x00000000); |
| 170 | return nouveau_gpio_fini(&priv->base, suspend); |
| 171 | } |
| 172 | |
| 173 | struct nouveau_oclass |
| 174 | nv10_gpio_oclass = { |
| 175 | .handle = NV_SUBDEV(GPIO, 0x10), |
| 176 | .ofuncs = &(struct nouveau_ofuncs) { |
| 177 | .ctor = nv10_gpio_ctor, |
| 178 | .dtor = nv10_gpio_dtor, |
| 179 | .init = nv10_gpio_init, |
| 180 | .fini = nv10_gpio_fini, |
| 181 | }, |
| 182 | }; |
| 183 | |