| 1 | /* $NetBSD: nouveau_subdev_fb_nv50.c,v 1.3 2015/10/14 00:12:55 mrg Exp $ */ |
| 2 | |
| 3 | /* |
| 4 | * Copyright 2012 Red Hat Inc. |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 7 | * copy of this software and associated documentation files (the "Software"), |
| 8 | * to deal in the Software without restriction, including without limitation |
| 9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 10 | * and/or sell copies of the Software, and to permit persons to whom the |
| 11 | * Software is furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in |
| 14 | * all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 22 | * OTHER DEALINGS IN THE SOFTWARE. |
| 23 | * |
| 24 | * Authors: Ben Skeggs |
| 25 | */ |
| 26 | |
| 27 | #include <sys/cdefs.h> |
| 28 | __KERNEL_RCSID(0, "$NetBSD: nouveau_subdev_fb_nv50.c,v 1.3 2015/10/14 00:12:55 mrg Exp $" ); |
| 29 | |
| 30 | #include <core/client.h> |
| 31 | #include <core/enum.h> |
| 32 | #include <core/engctx.h> |
| 33 | #include <core/object.h> |
| 34 | |
| 35 | #include <subdev/bios.h> |
| 36 | |
| 37 | #include "nv50.h" |
| 38 | |
| 39 | int |
| 40 | nv50_fb_memtype[0x80] = { |
| 41 | 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
| 42 | 1, 1, 1, 1, 0, 0, 0, 0, 2, 2, 2, 2, 0, 0, 0, 0, |
| 43 | 1, 1, 1, 1, 1, 1, 1, 0, 2, 2, 2, 2, 2, 2, 2, 0, |
| 44 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
| 45 | 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 0, 0, |
| 46 | 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
| 47 | 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 2, 2, 2, 2, |
| 48 | 1, 0, 2, 0, 1, 0, 2, 0, 1, 1, 2, 2, 1, 1, 0, 0 |
| 49 | }; |
| 50 | |
| 51 | bool |
| 52 | nv50_fb_memtype_valid(struct nouveau_fb *pfb, u32 memtype) |
| 53 | { |
| 54 | return nv50_fb_memtype[(memtype & 0xff00) >> 8] != 0; |
| 55 | } |
| 56 | |
| 57 | static const struct nouveau_enum vm_dispatch_subclients[] = { |
| 58 | { 0x00000000, "GRCTX" , NULL }, |
| 59 | { 0x00000001, "NOTIFY" , NULL }, |
| 60 | { 0x00000002, "QUERY" , NULL }, |
| 61 | { 0x00000003, "COND" , NULL }, |
| 62 | { 0x00000004, "M2M_IN" , NULL }, |
| 63 | { 0x00000005, "M2M_OUT" , NULL }, |
| 64 | { 0x00000006, "M2M_NOTIFY" , NULL }, |
| 65 | {} |
| 66 | }; |
| 67 | |
| 68 | static const struct nouveau_enum vm_ccache_subclients[] = { |
| 69 | { 0x00000000, "CB" , NULL }, |
| 70 | { 0x00000001, "TIC" , NULL }, |
| 71 | { 0x00000002, "TSC" , NULL }, |
| 72 | {} |
| 73 | }; |
| 74 | |
| 75 | static const struct nouveau_enum vm_prop_subclients[] = { |
| 76 | { 0x00000000, "RT0" , NULL }, |
| 77 | { 0x00000001, "RT1" , NULL }, |
| 78 | { 0x00000002, "RT2" , NULL }, |
| 79 | { 0x00000003, "RT3" , NULL }, |
| 80 | { 0x00000004, "RT4" , NULL }, |
| 81 | { 0x00000005, "RT5" , NULL }, |
| 82 | { 0x00000006, "RT6" , NULL }, |
| 83 | { 0x00000007, "RT7" , NULL }, |
| 84 | { 0x00000008, "ZETA" , NULL }, |
| 85 | { 0x00000009, "LOCAL" , NULL }, |
| 86 | { 0x0000000a, "GLOBAL" , NULL }, |
| 87 | { 0x0000000b, "STACK" , NULL }, |
| 88 | { 0x0000000c, "DST2D" , NULL }, |
| 89 | {} |
| 90 | }; |
| 91 | |
| 92 | static const struct nouveau_enum vm_pfifo_subclients[] = { |
| 93 | { 0x00000000, "PUSHBUF" , NULL }, |
| 94 | { 0x00000001, "SEMAPHORE" , NULL }, |
| 95 | {} |
| 96 | }; |
| 97 | |
| 98 | static const struct nouveau_enum vm_bar_subclients[] = { |
| 99 | { 0x00000000, "FB" , NULL }, |
| 100 | { 0x00000001, "IN" , NULL }, |
| 101 | {} |
| 102 | }; |
| 103 | |
| 104 | static const struct nouveau_enum vm_client[] = { |
| 105 | { 0x00000000, "STRMOUT" , NULL }, |
| 106 | { 0x00000003, "DISPATCH" , vm_dispatch_subclients }, |
| 107 | { 0x00000004, "PFIFO_WRITE" , NULL }, |
| 108 | { 0x00000005, "CCACHE" , vm_ccache_subclients }, |
| 109 | { 0x00000006, "PPPP" , NULL }, |
| 110 | { 0x00000007, "CLIPID" , NULL }, |
| 111 | { 0x00000008, "PFIFO_READ" , NULL }, |
| 112 | { 0x00000009, "VFETCH" , NULL }, |
| 113 | { 0x0000000a, "TEXTURE" , NULL }, |
| 114 | { 0x0000000b, "PROP" , vm_prop_subclients }, |
| 115 | { 0x0000000c, "PVP" , NULL }, |
| 116 | { 0x0000000d, "PBSP" , NULL }, |
| 117 | { 0x0000000e, "PCRYPT" , NULL }, |
| 118 | { 0x0000000f, "PCOUNTER" , NULL }, |
| 119 | { 0x00000011, "PDAEMON" , NULL }, |
| 120 | {} |
| 121 | }; |
| 122 | |
| 123 | static const struct nouveau_enum vm_engine[] = { |
| 124 | { 0x00000000, "PGRAPH" , NULL, NVDEV_ENGINE_GR }, |
| 125 | { 0x00000001, "PVP" , NULL, NVDEV_ENGINE_VP }, |
| 126 | { 0x00000004, "PEEPHOLE" , NULL }, |
| 127 | { 0x00000005, "PFIFO" , vm_pfifo_subclients, NVDEV_ENGINE_FIFO }, |
| 128 | { 0x00000006, "BAR" , vm_bar_subclients }, |
| 129 | { 0x00000008, "PPPP" , NULL, NVDEV_ENGINE_PPP }, |
| 130 | { 0x00000008, "PMPEG" , NULL, NVDEV_ENGINE_MPEG }, |
| 131 | { 0x00000009, "PBSP" , NULL, NVDEV_ENGINE_BSP }, |
| 132 | { 0x0000000a, "PCRYPT" , NULL, NVDEV_ENGINE_CRYPT }, |
| 133 | { 0x0000000b, "PCOUNTER" , NULL }, |
| 134 | { 0x0000000c, "SEMAPHORE_BG" , NULL }, |
| 135 | { 0x0000000d, "PCOPY" , NULL, NVDEV_ENGINE_COPY0 }, |
| 136 | { 0x0000000e, "PDAEMON" , NULL }, |
| 137 | {} |
| 138 | }; |
| 139 | |
| 140 | static const struct nouveau_enum vm_fault[] = { |
| 141 | { 0x00000000, "PT_NOT_PRESENT" , NULL }, |
| 142 | { 0x00000001, "PT_TOO_SHORT" , NULL }, |
| 143 | { 0x00000002, "PAGE_NOT_PRESENT" , NULL }, |
| 144 | { 0x00000003, "PAGE_SYSTEM_ONLY" , NULL }, |
| 145 | { 0x00000004, "PAGE_READ_ONLY" , NULL }, |
| 146 | { 0x00000006, "NULL_DMAOBJ" , NULL }, |
| 147 | { 0x00000007, "WRONG_MEMTYPE" , NULL }, |
| 148 | { 0x0000000b, "VRAM_LIMIT" , NULL }, |
| 149 | { 0x0000000f, "DMAOBJ_LIMIT" , NULL }, |
| 150 | {} |
| 151 | }; |
| 152 | |
| 153 | static void |
| 154 | nv50_fb_intr(struct nouveau_subdev *subdev) |
| 155 | { |
| 156 | struct nouveau_device *device = nv_device(subdev); |
| 157 | struct nouveau_engine *engine; |
| 158 | struct nv50_fb_priv *priv = (void *)subdev; |
| 159 | const struct nouveau_enum *en, *cl; |
| 160 | struct nouveau_object *engctx = NULL; |
| 161 | u32 trap[6], idx, chan; |
| 162 | u8 st0, st1, st2, st3; |
| 163 | int i; |
| 164 | |
| 165 | idx = nv_rd32(priv, 0x100c90); |
| 166 | if (!(idx & 0x80000000)) |
| 167 | return; |
| 168 | idx &= 0x00ffffff; |
| 169 | |
| 170 | for (i = 0; i < 6; i++) { |
| 171 | nv_wr32(priv, 0x100c90, idx | i << 24); |
| 172 | trap[i] = nv_rd32(priv, 0x100c94); |
| 173 | } |
| 174 | nv_wr32(priv, 0x100c90, idx | 0x80000000); |
| 175 | |
| 176 | /* decode status bits into something more useful */ |
| 177 | if (device->chipset < 0xa3 || |
| 178 | device->chipset == 0xaa || device->chipset == 0xac) { |
| 179 | st0 = (trap[0] & 0x0000000f) >> 0; |
| 180 | st1 = (trap[0] & 0x000000f0) >> 4; |
| 181 | st2 = (trap[0] & 0x00000f00) >> 8; |
| 182 | st3 = (trap[0] & 0x0000f000) >> 12; |
| 183 | } else { |
| 184 | st0 = (trap[0] & 0x000000ff) >> 0; |
| 185 | st1 = (trap[0] & 0x0000ff00) >> 8; |
| 186 | st2 = (trap[0] & 0x00ff0000) >> 16; |
| 187 | st3 = (trap[0] & 0xff000000) >> 24; |
| 188 | } |
| 189 | chan = (trap[2] << 16) | trap[1]; |
| 190 | |
| 191 | en = nouveau_enum_find(vm_engine, st0); |
| 192 | |
| 193 | if (en && en->data2) { |
| 194 | const struct nouveau_enum *orig_en = en; |
| 195 | while (en->name && en->value == st0 && en->data2) { |
| 196 | engine = nouveau_engine(subdev, en->data2); |
| 197 | if (engine) { |
| 198 | engctx = nouveau_engctx_get(engine, chan); |
| 199 | if (engctx) |
| 200 | break; |
| 201 | } |
| 202 | en++; |
| 203 | } |
| 204 | if (!engctx) |
| 205 | en = orig_en; |
| 206 | } |
| 207 | |
| 208 | nv_error(priv, "trapped %s at 0x%02x%04x%04x on channel 0x%08x [%s] " , |
| 209 | (trap[5] & 0x00000100) ? "read" : "write" , |
| 210 | trap[5] & 0xff, trap[4] & 0xffff, trap[3] & 0xffff, chan, |
| 211 | nouveau_client_name(engctx)); |
| 212 | |
| 213 | nouveau_engctx_put(engctx); |
| 214 | |
| 215 | if (en) |
| 216 | pr_cont("%s/" , en->name); |
| 217 | else |
| 218 | pr_cont("%02x/" , st0); |
| 219 | |
| 220 | cl = nouveau_enum_find(vm_client, st2); |
| 221 | if (cl) |
| 222 | pr_cont("%s/" , cl->name); |
| 223 | else |
| 224 | pr_cont("%02x/" , st2); |
| 225 | |
| 226 | if (cl && cl->data) cl = nouveau_enum_find(cl->data, st3); |
| 227 | else if (en && en->data) cl = nouveau_enum_find(en->data, st3); |
| 228 | else cl = NULL; |
| 229 | if (cl) |
| 230 | pr_cont("%s" , cl->name); |
| 231 | else |
| 232 | pr_cont("%02x" , st3); |
| 233 | |
| 234 | pr_cont(" reason: " ); |
| 235 | en = nouveau_enum_find(vm_fault, st1); |
| 236 | if (en) |
| 237 | pr_cont("%s\n" , en->name); |
| 238 | else |
| 239 | pr_cont("0x%08x\n" , st1); |
| 240 | } |
| 241 | |
| 242 | int |
| 243 | nv50_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine, |
| 244 | struct nouveau_oclass *oclass, void *data, u32 size, |
| 245 | struct nouveau_object **pobject) |
| 246 | { |
| 247 | struct nouveau_device *device = nv_device(parent); |
| 248 | struct nv50_fb_priv *priv; |
| 249 | int ret; |
| 250 | |
| 251 | ret = nouveau_fb_create(parent, engine, oclass, &priv); |
| 252 | *pobject = nv_object(priv); |
| 253 | if (ret) |
| 254 | return ret; |
| 255 | |
| 256 | #ifdef __NetBSD__ |
| 257 | { |
| 258 | const bus_dma_tag_t dmat = pci_dma64_available(&device->pdev->pd_pa) ? |
| 259 | device->pdev->pd_pa.pa_dmat64 : device->pdev->pd_pa.pa_dmat; |
| 260 | int nsegs; |
| 261 | |
| 262 | priv->r100c08_map = NULL; /* paranoia */ |
| 263 | priv->r100c08_kva = NULL; |
| 264 | |
| 265 | /* XXX errno NetBSD->Linux */ |
| 266 | ret = -bus_dmamem_alloc(dmat, PAGE_SIZE, PAGE_SIZE, 0, |
| 267 | &priv->r100c08_seg, 1, &nsegs, BUS_DMA_WAITOK); |
| 268 | if (ret) { |
| 269 | fail0: nouveau_fb_destroy(&priv->base); |
| 270 | return ret; |
| 271 | } |
| 272 | KASSERT(nsegs == 1); |
| 273 | |
| 274 | /* XXX errno NetBSD->Linux */ |
| 275 | ret = -bus_dmamap_create(dmat, PAGE_SIZE, 1, PAGE_SIZE, 0, |
| 276 | BUS_DMA_WAITOK, &priv->r100c08_map); |
| 277 | if (ret) { |
| 278 | fail1: bus_dmamem_free(dmat, &priv->r100c08_seg, 1); |
| 279 | goto fail0; |
| 280 | } |
| 281 | |
| 282 | /* XXX errno NetBSD->Linux */ |
| 283 | ret = -bus_dmamem_map(dmat, &priv->r100c08_seg, 1, PAGE_SIZE, |
| 284 | &priv->r100c08_kva, BUS_DMA_WAITOK); |
| 285 | if (ret) { |
| 286 | fail2: bus_dmamap_destroy(dmat, priv->r100c08_map); |
| 287 | goto fail1; |
| 288 | } |
| 289 | (void)memset(priv->r100c08_kva, 0, PAGE_SIZE); |
| 290 | |
| 291 | /* XXX errno NetBSD->Linux */ |
| 292 | ret = -bus_dmamap_load(dmat, priv->r100c08_map, priv->r100c08_kva, |
| 293 | PAGE_SIZE, NULL, BUS_DMA_WAITOK); |
| 294 | if (ret) { |
| 295 | fail3: __unused bus_dmamem_unmap(dmat, priv->r100c08_kva, PAGE_SIZE); |
| 296 | goto fail2; |
| 297 | } |
| 298 | |
| 299 | priv->r100c08 = priv->r100c08_map->dm_segs[0].ds_addr; |
| 300 | } |
| 301 | #else |
| 302 | priv->r100c08_page = alloc_page(GFP_KERNEL | __GFP_ZERO); |
| 303 | if (priv->r100c08_page) { |
| 304 | priv->r100c08 = nv_device_map_page(device, priv->r100c08_page); |
| 305 | if (!priv->r100c08) |
| 306 | nv_warn(priv, "failed 0x100c08 page map\n" ); |
| 307 | } else { |
| 308 | nv_warn(priv, "failed 0x100c08 page alloc\n" ); |
| 309 | } |
| 310 | #endif |
| 311 | |
| 312 | nv_subdev(priv)->intr = nv50_fb_intr; |
| 313 | return 0; |
| 314 | } |
| 315 | |
| 316 | void |
| 317 | nv50_fb_dtor(struct nouveau_object *object) |
| 318 | { |
| 319 | struct nouveau_device *device = nv_device(object); |
| 320 | struct nv50_fb_priv *priv = (void *)object; |
| 321 | |
| 322 | #ifdef __NetBSD__ |
| 323 | if (priv->r100c08_map) { |
| 324 | const bus_dma_tag_t dmat = pci_dma64_available(&device->pdev->pd_pa) ? |
| 325 | device->pdev->pd_pa.pa_dmat64 : device->pdev->pd_pa.pa_dmat; |
| 326 | |
| 327 | bus_dmamap_unload(dmat, priv->r100c08_map); |
| 328 | bus_dmamem_unmap(dmat, priv->r100c08_kva, PAGE_SIZE); |
| 329 | bus_dmamap_destroy(dmat, priv->r100c08_map); |
| 330 | bus_dmamem_free(dmat, &priv->r100c08_seg, 1); |
| 331 | } |
| 332 | #else |
| 333 | if (priv->r100c08_page) { |
| 334 | nv_device_unmap_page(device, priv->r100c08); |
| 335 | __free_page(priv->r100c08_page); |
| 336 | } |
| 337 | #endif |
| 338 | |
| 339 | nouveau_fb_destroy(&priv->base); |
| 340 | } |
| 341 | |
| 342 | int |
| 343 | nv50_fb_init(struct nouveau_object *object) |
| 344 | { |
| 345 | struct nv50_fb_impl *impl = (void *)object->oclass; |
| 346 | struct nv50_fb_priv *priv = (void *)object; |
| 347 | int ret; |
| 348 | |
| 349 | ret = nouveau_fb_init(&priv->base); |
| 350 | if (ret) |
| 351 | return ret; |
| 352 | |
| 353 | /* Not a clue what this is exactly. Without pointing it at a |
| 354 | * scratch page, VRAM->GART blits with M2MF (as in DDX DFS) |
| 355 | * cause IOMMU "read from address 0" errors (rh#561267) |
| 356 | */ |
| 357 | nv_wr32(priv, 0x100c08, priv->r100c08 >> 8); |
| 358 | |
| 359 | /* This is needed to get meaningful information from 100c90 |
| 360 | * on traps. No idea what these values mean exactly. */ |
| 361 | nv_wr32(priv, 0x100c90, impl->trap); |
| 362 | return 0; |
| 363 | } |
| 364 | |
| 365 | struct nouveau_oclass * |
| 366 | nv50_fb_oclass = &(struct nv50_fb_impl) { |
| 367 | .base.base.handle = NV_SUBDEV(FB, 0x50), |
| 368 | .base.base.ofuncs = &(struct nouveau_ofuncs) { |
| 369 | .ctor = nv50_fb_ctor, |
| 370 | .dtor = nv50_fb_dtor, |
| 371 | .init = nv50_fb_init, |
| 372 | .fini = _nouveau_fb_fini, |
| 373 | }, |
| 374 | .base.memtype = nv50_fb_memtype_valid, |
| 375 | .base.ram = &nv50_ram_oclass, |
| 376 | .trap = 0x000707ff, |
| 377 | }.base.base; |
| 378 | |