| 1 | /* $NetBSD: wdc_isa.c,v 1.59 2012/07/31 15:50:35 bouyer Exp $ */ |
| 2 | |
| 3 | /*- |
| 4 | * Copyright (c) 1998, 2003 The NetBSD Foundation, Inc. |
| 5 | * All rights reserved. |
| 6 | * |
| 7 | * This code is derived from software contributed to The NetBSD Foundation |
| 8 | * by Charles M. Hannum and by Onno van der Linden. |
| 9 | * |
| 10 | * Redistribution and use in source and binary forms, with or without |
| 11 | * modification, are permitted provided that the following conditions |
| 12 | * are met: |
| 13 | * 1. Redistributions of source code must retain the above copyright |
| 14 | * notice, this list of conditions and the following disclaimer. |
| 15 | * 2. Redistributions in binary form must reproduce the above copyright |
| 16 | * notice, this list of conditions and the following disclaimer in the |
| 17 | * documentation and/or other materials provided with the distribution. |
| 18 | * |
| 19 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS |
| 20 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
| 21 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 22 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS |
| 23 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 24 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 25 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 26 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 27 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 28 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 29 | * POSSIBILITY OF SUCH DAMAGE. |
| 30 | */ |
| 31 | |
| 32 | #include <sys/cdefs.h> |
| 33 | __KERNEL_RCSID(0, "$NetBSD: wdc_isa.c,v 1.59 2012/07/31 15:50:35 bouyer Exp $" ); |
| 34 | |
| 35 | #include <sys/param.h> |
| 36 | #include <sys/systm.h> |
| 37 | #include <sys/device.h> |
| 38 | #include <sys/malloc.h> |
| 39 | |
| 40 | #include <sys/bus.h> |
| 41 | #include <sys/intr.h> |
| 42 | |
| 43 | #include <dev/isa/isavar.h> |
| 44 | #include <dev/isa/isadmavar.h> |
| 45 | |
| 46 | #include <dev/ic/wdcreg.h> |
| 47 | #include <dev/ata/atavar.h> |
| 48 | #include <dev/ic/wdcvar.h> |
| 49 | |
| 50 | #define WDC_ISA_REG_NPORTS 8 |
| 51 | #define WDC_ISA_AUXREG_OFFSET 0x206 |
| 52 | #define WDC_ISA_AUXREG_NPORTS 1 /* XXX "fdc" owns ports 0x3f7/0x377 */ |
| 53 | |
| 54 | /* options passed via the 'flags' config keyword */ |
| 55 | #define WDC_OPTIONS_32 0x01 /* try to use 32bit data I/O */ |
| 56 | #define WDC_OPTIONS_ATA_NOSTREAM 0x04 |
| 57 | #define WDC_OPTIONS_ATAPI_NOSTREAM 0x08 |
| 58 | |
| 59 | struct wdc_isa_softc { |
| 60 | struct wdc_softc sc_wdcdev; |
| 61 | struct ata_channel *wdc_chanlist[1]; |
| 62 | struct ata_channel ata_channel; |
| 63 | struct ata_queue wdc_chqueue; |
| 64 | struct wdc_regs wdc_regs; |
| 65 | isa_chipset_tag_t sc_ic; |
| 66 | void *sc_ih; |
| 67 | int sc_drq; |
| 68 | }; |
| 69 | |
| 70 | static int wdc_isa_probe(device_t , cfdata_t, void *); |
| 71 | static void wdc_isa_attach(device_t, device_t, void *); |
| 72 | static int wdc_isa_detach(device_t, int); |
| 73 | |
| 74 | CFATTACH_DECL3_NEW(wdc_isa, sizeof(struct wdc_isa_softc), |
| 75 | wdc_isa_probe, wdc_isa_attach, wdc_isa_detach, NULL, NULL, |
| 76 | wdc_childdetached, DVF_DETACH_SHUTDOWN); |
| 77 | |
| 78 | #if 0 |
| 79 | static void wdc_isa_dma_setup(struct wdc_isa_softc *); |
| 80 | static int wdc_isa_dma_init(void*, int, int, void *, size_t, int); |
| 81 | static void wdc_isa_dma_start(void*, int, int); |
| 82 | static int wdc_isa_dma_finish(void*, int, int, int); |
| 83 | #endif |
| 84 | |
| 85 | static int |
| 86 | wdc_isa_probe(device_t parent, cfdata_t match, void *aux) |
| 87 | { |
| 88 | struct ata_channel ch; |
| 89 | struct isa_attach_args *ia = aux; |
| 90 | struct wdc_softc wdc; |
| 91 | struct wdc_regs wdr; |
| 92 | int result = 0, i; |
| 93 | |
| 94 | if (ia->ia_nio < 1) |
| 95 | return (0); |
| 96 | if (ia->ia_nirq < 1) |
| 97 | return (0); |
| 98 | |
| 99 | if (ISA_DIRECT_CONFIG(ia)) |
| 100 | return (0); |
| 101 | |
| 102 | if (ia->ia_io[0].ir_addr == ISA_UNKNOWN_PORT) |
| 103 | return (0); |
| 104 | if (ia->ia_irq[0].ir_irq == ISA_UNKNOWN_IRQ) |
| 105 | return (0); |
| 106 | if (ia->ia_ndrq > 0 && ia->ia_drq[0].ir_drq == ISA_UNKNOWN_DRQ) |
| 107 | ia->ia_ndrq = 0; |
| 108 | |
| 109 | memset(&wdc, 0, sizeof(wdc)); |
| 110 | memset(&ch, 0, sizeof(ch)); |
| 111 | ch.ch_atac = &wdc.sc_atac; |
| 112 | wdc.regs = &wdr; |
| 113 | |
| 114 | wdr.cmd_iot = ia->ia_iot; |
| 115 | |
| 116 | if (bus_space_map(wdr.cmd_iot, ia->ia_io[0].ir_addr, |
| 117 | WDC_ISA_REG_NPORTS, 0, &wdr.cmd_baseioh)) |
| 118 | goto out; |
| 119 | |
| 120 | for (i = 0; i < WDC_ISA_REG_NPORTS; i++) { |
| 121 | if (bus_space_subregion(wdr.cmd_iot, wdr.cmd_baseioh, i, |
| 122 | i == 0 ? 4 : 1, &wdr.cmd_iohs[i]) != 0) |
| 123 | goto outunmap; |
| 124 | } |
| 125 | wdc_init_shadow_regs(&ch); |
| 126 | |
| 127 | wdr.ctl_iot = ia->ia_iot; |
| 128 | if (bus_space_map(wdr.ctl_iot, ia->ia_io[0].ir_addr + |
| 129 | WDC_ISA_AUXREG_OFFSET, WDC_ISA_AUXREG_NPORTS, 0, &wdr.ctl_ioh)) |
| 130 | goto outunmap; |
| 131 | |
| 132 | result = wdcprobe(&ch); |
| 133 | if (result) { |
| 134 | ia->ia_nio = 1; |
| 135 | ia->ia_io[0].ir_size = WDC_ISA_REG_NPORTS; |
| 136 | |
| 137 | ia->ia_nirq = 1; |
| 138 | |
| 139 | ia->ia_niomem = 0; |
| 140 | } |
| 141 | |
| 142 | bus_space_unmap(wdr.ctl_iot, wdr.ctl_ioh, WDC_ISA_AUXREG_NPORTS); |
| 143 | outunmap: |
| 144 | bus_space_unmap(wdr.cmd_iot, wdr.cmd_baseioh, WDC_ISA_REG_NPORTS); |
| 145 | out: |
| 146 | return (result); |
| 147 | } |
| 148 | |
| 149 | static int |
| 150 | wdc_isa_detach(device_t self, int flags) |
| 151 | { |
| 152 | struct wdc_isa_softc *sc = device_private(self); |
| 153 | struct wdc_regs *wdr = &sc->wdc_regs; |
| 154 | int rc; |
| 155 | |
| 156 | if ((rc = wdcdetach(self, flags)) != 0) |
| 157 | return rc; |
| 158 | |
| 159 | isa_intr_disestablish(sc->sc_ic, sc->sc_ih); |
| 160 | |
| 161 | bus_space_unmap(wdr->ctl_iot, wdr->ctl_ioh, WDC_ISA_AUXREG_NPORTS); |
| 162 | bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh, WDC_ISA_REG_NPORTS); |
| 163 | |
| 164 | return 0; |
| 165 | } |
| 166 | |
| 167 | static void |
| 168 | wdc_isa_attach(device_t parent, device_t self, void *aux) |
| 169 | { |
| 170 | struct wdc_isa_softc *sc = device_private(self); |
| 171 | struct wdc_regs *wdr; |
| 172 | struct isa_attach_args *ia = aux; |
| 173 | int wdc_cf_flags = device_cfdata(self)->cf_flags; |
| 174 | int i; |
| 175 | |
| 176 | sc->sc_wdcdev.sc_atac.atac_dev = self; |
| 177 | sc->sc_wdcdev.regs = wdr = &sc->wdc_regs; |
| 178 | wdr->cmd_iot = ia->ia_iot; |
| 179 | wdr->ctl_iot = ia->ia_iot; |
| 180 | sc->sc_ic = ia->ia_ic; |
| 181 | if (bus_space_map(wdr->cmd_iot, ia->ia_io[0].ir_addr, |
| 182 | WDC_ISA_REG_NPORTS, 0, &wdr->cmd_baseioh) || |
| 183 | bus_space_map(wdr->ctl_iot, |
| 184 | ia->ia_io[0].ir_addr + WDC_ISA_AUXREG_OFFSET, |
| 185 | WDC_ISA_AUXREG_NPORTS, 0, &wdr->ctl_ioh)) { |
| 186 | aprint_error(": couldn't map registers\n" ); |
| 187 | return; |
| 188 | } |
| 189 | |
| 190 | for (i = 0; i < WDC_ISA_REG_NPORTS; i++) { |
| 191 | if (bus_space_subregion(wdr->cmd_iot, |
| 192 | wdr->cmd_baseioh, i, i == 0 ? 4 : 1, |
| 193 | &wdr->cmd_iohs[i]) != 0) { |
| 194 | aprint_error(": couldn't subregion registers\n" ); |
| 195 | return; |
| 196 | } |
| 197 | } |
| 198 | |
| 199 | wdr->data32iot = wdr->cmd_iot; |
| 200 | wdr->data32ioh = wdr->cmd_iohs[0]; |
| 201 | |
| 202 | #if 0 |
| 203 | if (ia->ia_ndrq > 0 && ia->ia_drq[0].ir_drq != ISA_UNKNOWN_DRQ) { |
| 204 | sc->sc_drq = ia->ia_drq[0].ir_drq; |
| 205 | |
| 206 | sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA; |
| 207 | sc->sc_wdcdev.dma_arg = sc; |
| 208 | sc->sc_wdcdev.dma_init = wdc_isa_dma_init; |
| 209 | sc->sc_wdcdev.dma_start = wdc_isa_dma_start; |
| 210 | sc->sc_wdcdev.dma_finish = wdc_isa_dma_finish; |
| 211 | wdc_isa_dma_setup(sc); |
| 212 | } |
| 213 | #endif |
| 214 | sc->sc_wdcdev.cap |= WDC_CAPABILITY_PREATA; |
| 215 | sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16; |
| 216 | if (wdc_cf_flags & WDC_OPTIONS_32) |
| 217 | sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA32; |
| 218 | if (wdc_cf_flags & WDC_OPTIONS_ATA_NOSTREAM) |
| 219 | sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_ATA_NOSTREAM; |
| 220 | if (wdc_cf_flags & WDC_OPTIONS_ATAPI_NOSTREAM) |
| 221 | sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_ATAPI_NOSTREAM; |
| 222 | |
| 223 | sc->sc_wdcdev.sc_atac.atac_pio_cap = 0; |
| 224 | sc->wdc_chanlist[0] = &sc->ata_channel; |
| 225 | sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanlist; |
| 226 | sc->sc_wdcdev.sc_atac.atac_nchannels = 1; |
| 227 | sc->sc_wdcdev.wdc_maxdrives = 2; |
| 228 | sc->ata_channel.ch_channel = 0; |
| 229 | sc->ata_channel.ch_atac = &sc->sc_wdcdev.sc_atac; |
| 230 | sc->ata_channel.ch_queue = &sc->wdc_chqueue; |
| 231 | wdc_init_shadow_regs(&sc->ata_channel); |
| 232 | |
| 233 | aprint_normal("\n" ); |
| 234 | |
| 235 | sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq[0].ir_irq, |
| 236 | IST_EDGE, IPL_BIO, wdcintr, &sc->ata_channel); |
| 237 | |
| 238 | wdcattach(&sc->ata_channel); |
| 239 | } |
| 240 | |
| 241 | #if 0 |
| 242 | static void |
| 243 | wdc_isa_dma_setup(struct wdc_isa_softc *sc) |
| 244 | { |
| 245 | bus_size_t maxsize; |
| 246 | |
| 247 | if ((maxsize = isa_dmamaxsize(sc->sc_ic, sc->sc_drq)) < MAXPHYS) { |
| 248 | aprint_error_dev(sc_wdcdev.sc_atac.atac_dev, |
| 249 | "max DMA size %lu is less than required %d\n" , |
| 250 | (u_long)maxsize, MAXPHYS); |
| 251 | sc->sc_wdcdev.sc_atac.atac_cap &= ~ATAC_CAP_DMA; |
| 252 | return; |
| 253 | } |
| 254 | |
| 255 | if (isa_drq_alloc(sc->sc_ic, sc->sc_drq) != 0) { |
| 256 | aprint_error_dev(sc_wdcdev.sc_atac.atac_dev, |
| 257 | "can't reserve drq %d\n" , sc->sc_drq); |
| 258 | sc->sc_wdcdev.sc_atac.atac_cap &= ~ATAC_CAP_DMA; |
| 259 | return; |
| 260 | } |
| 261 | |
| 262 | if (isa_dmamap_create(sc->sc_ic, sc->sc_drq, |
| 263 | MAXPHYS, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) { |
| 264 | aprint_error_dev(sc_wdcdev.sc_atac.atac_dev, |
| 265 | "can't create map for drq %d\n" , sc->sc_drq); |
| 266 | sc->sc_wdcdev.sc_atac.atac_cap &= ~ATAC_CAP_DMA; |
| 267 | } |
| 268 | } |
| 269 | |
| 270 | static int |
| 271 | wdc_isa_dma_init(void *v, int channel, int drive, void *databuf, |
| 272 | size_t datalen, int read) |
| 273 | { |
| 274 | struct wdc_isa_softc *sc = v; |
| 275 | |
| 276 | isa_dmastart(sc->sc_ic, sc->sc_drq, databuf, datalen, NULL, |
| 277 | (read ? DMAMODE_READ : DMAMODE_WRITE) | DMAMODE_DEMAND, |
| 278 | BUS_DMA_NOWAIT); |
| 279 | return 0; |
| 280 | } |
| 281 | |
| 282 | static void |
| 283 | wdc_isa_dma_start(void *v, int channel, int drive) |
| 284 | { |
| 285 | /* nothing to do */ |
| 286 | } |
| 287 | |
| 288 | static int |
| 289 | wdc_isa_dma_finish(void *v, int channel, int drive, int read) |
| 290 | { |
| 291 | struct wdc_isa_softc *sc = v; |
| 292 | |
| 293 | isa_dmadone(sc->sc_ic, sc->sc_drq); |
| 294 | return 0; |
| 295 | } |
| 296 | #endif |
| 297 | |