| 1 | /* $NetBSD: isa_machdep.c,v 1.34 2016/10/15 16:46:14 jdolecek Exp $ */ |
| 2 | |
| 3 | /*- |
| 4 | * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc. |
| 5 | * All rights reserved. |
| 6 | * |
| 7 | * This code is derived from software contributed to The NetBSD Foundation |
| 8 | * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace |
| 9 | * Simulation Facility, NASA Ames Research Center. |
| 10 | * |
| 11 | * Redistribution and use in source and binary forms, with or without |
| 12 | * modification, are permitted provided that the following conditions |
| 13 | * are met: |
| 14 | * 1. Redistributions of source code must retain the above copyright |
| 15 | * notice, this list of conditions and the following disclaimer. |
| 16 | * 2. Redistributions in binary form must reproduce the above copyright |
| 17 | * notice, this list of conditions and the following disclaimer in the |
| 18 | * documentation and/or other materials provided with the distribution. |
| 19 | * |
| 20 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS |
| 21 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
| 22 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 23 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS |
| 24 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 25 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 26 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 27 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 28 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 29 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 30 | * POSSIBILITY OF SUCH DAMAGE. |
| 31 | */ |
| 32 | |
| 33 | /*- |
| 34 | * Copyright (c) 1991 The Regents of the University of California. |
| 35 | * All rights reserved. |
| 36 | * |
| 37 | * This code is derived from software contributed to Berkeley by |
| 38 | * William Jolitz. |
| 39 | * |
| 40 | * Redistribution and use in source and binary forms, with or without |
| 41 | * modification, are permitted provided that the following conditions |
| 42 | * are met: |
| 43 | * 1. Redistributions of source code must retain the above copyright |
| 44 | * notice, this list of conditions and the following disclaimer. |
| 45 | * 2. Redistributions in binary form must reproduce the above copyright |
| 46 | * notice, this list of conditions and the following disclaimer in the |
| 47 | * documentation and/or other materials provided with the distribution. |
| 48 | * 3. Neither the name of the University nor the names of its contributors |
| 49 | * may be used to endorse or promote products derived from this software |
| 50 | * without specific prior written permission. |
| 51 | * |
| 52 | * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND |
| 53 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 54 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 55 | * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE |
| 56 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| 57 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| 58 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 59 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
| 60 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
| 61 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 62 | * SUCH DAMAGE. |
| 63 | * |
| 64 | * @(#)isa.c 7.2 (Berkeley) 5/13/91 |
| 65 | */ |
| 66 | |
| 67 | #include <sys/cdefs.h> |
| 68 | __KERNEL_RCSID(0, "$NetBSD: isa_machdep.c,v 1.34 2016/10/15 16:46:14 jdolecek Exp $" ); |
| 69 | |
| 70 | #include <sys/param.h> |
| 71 | #include <sys/systm.h> |
| 72 | #include <sys/kernel.h> |
| 73 | #include <sys/syslog.h> |
| 74 | #include <sys/device.h> |
| 75 | #include <sys/proc.h> |
| 76 | #include <sys/mbuf.h> |
| 77 | #include <sys/bus.h> |
| 78 | #include <sys/cpu.h> |
| 79 | |
| 80 | #include <machine/bus_private.h> |
| 81 | #include <machine/pio.h> |
| 82 | #include <machine/cpufunc.h> |
| 83 | #include <machine/autoconf.h> |
| 84 | #include <machine/bootinfo.h> |
| 85 | |
| 86 | #include <dev/isa/isareg.h> |
| 87 | #include <dev/isa/isavar.h> |
| 88 | |
| 89 | #include <uvm/uvm_extern.h> |
| 90 | |
| 91 | #include "acpica.h" |
| 92 | #include "opt_acpi.h" |
| 93 | #include "ioapic.h" |
| 94 | |
| 95 | #if NIOAPIC > 0 |
| 96 | #include <machine/i82093var.h> |
| 97 | #include <machine/mpbiosvar.h> |
| 98 | #endif |
| 99 | |
| 100 | static int _isa_dma_may_bounce(bus_dma_tag_t, bus_dmamap_t, int, int *); |
| 101 | |
| 102 | struct x86_bus_dma_tag isa_bus_dma_tag = { |
| 103 | ._tag_needs_free = 0, |
| 104 | ._bounce_thresh = ISA_DMA_BOUNCE_THRESHOLD, |
| 105 | ._bounce_alloc_lo = 0, |
| 106 | ._bounce_alloc_hi = ISA_DMA_BOUNCE_THRESHOLD, |
| 107 | ._may_bounce = _isa_dma_may_bounce, |
| 108 | }; |
| 109 | |
| 110 | #define IDTVEC(name) __CONCAT(X,name) |
| 111 | typedef void (vector)(void); |
| 112 | extern vector *IDTVEC(intr)[]; |
| 113 | |
| 114 | #define LEGAL_IRQ(x) ((x) >= 0 && (x) < NUM_LEGACY_IRQS && (x) != 2) |
| 115 | |
| 116 | int |
| 117 | isa_intr_alloc(isa_chipset_tag_t ic, int mask, int type, int *irq) |
| 118 | { |
| 119 | int i, tmp, bestirq, count; |
| 120 | struct intrhand **p, *q; |
| 121 | struct intrsource *isp; |
| 122 | struct cpu_info *ci; |
| 123 | |
| 124 | if (type == IST_NONE) |
| 125 | panic("intr_alloc: bogus type" ); |
| 126 | |
| 127 | ci = &cpu_info_primary; |
| 128 | |
| 129 | bestirq = -1; |
| 130 | count = -1; |
| 131 | |
| 132 | /* some interrupts should never be dynamically allocated */ |
| 133 | mask &= 0xdef8; |
| 134 | |
| 135 | /* |
| 136 | * XXX some interrupts will be used later (6 for fdc, 12 for pms). |
| 137 | * the right answer is to do "breadth-first" searching of devices. |
| 138 | */ |
| 139 | mask &= 0xefbf; |
| 140 | |
| 141 | mutex_enter(&cpu_lock); |
| 142 | |
| 143 | for (i = 0; i < NUM_LEGACY_IRQS; i++) { |
| 144 | if (LEGAL_IRQ(i) == 0 || (mask & (1<<i)) == 0) |
| 145 | continue; |
| 146 | isp = ci->ci_isources[i]; |
| 147 | if (isp == NULL) { |
| 148 | /* if nothing's using the irq, just return it */ |
| 149 | *irq = i; |
| 150 | mutex_exit(&cpu_lock); |
| 151 | return 0; |
| 152 | } |
| 153 | |
| 154 | switch(isp->is_type) { |
| 155 | case IST_EDGE: |
| 156 | case IST_LEVEL: |
| 157 | if (type != isp->is_type) |
| 158 | continue; |
| 159 | /* |
| 160 | * if the irq is shareable, count the number of other |
| 161 | * handlers, and if it's smaller than the last irq like |
| 162 | * this, remember it |
| 163 | * |
| 164 | * XXX We should probably also consider the |
| 165 | * interrupt level and stick IPL_TTY with other |
| 166 | * IPL_TTY, etc. |
| 167 | */ |
| 168 | for (p = &isp->is_handlers, tmp = 0; (q = *p) != NULL; |
| 169 | p = &q->ih_next, tmp++) |
| 170 | ; |
| 171 | if ((bestirq == -1) || (count > tmp)) { |
| 172 | bestirq = i; |
| 173 | count = tmp; |
| 174 | } |
| 175 | break; |
| 176 | case IST_PULSE: |
| 177 | /* this just isn't shareable */ |
| 178 | continue; |
| 179 | } |
| 180 | } |
| 181 | |
| 182 | mutex_exit(&cpu_lock); |
| 183 | |
| 184 | if (bestirq == -1) |
| 185 | return 1; |
| 186 | |
| 187 | *irq = bestirq; |
| 188 | |
| 189 | return 0; |
| 190 | } |
| 191 | |
| 192 | const struct evcnt * |
| 193 | isa_intr_evcnt(isa_chipset_tag_t ic, int irq) |
| 194 | { |
| 195 | /* XXX for now, no evcnt parent reported */ |
| 196 | return NULL; |
| 197 | } |
| 198 | |
| 199 | void * |
| 200 | isa_intr_establish(isa_chipset_tag_t ic, int irq, int type, int level, |
| 201 | int (*ih_fun)(void *), void *ih_arg) |
| 202 | { |
| 203 | return isa_intr_establish_xname(ic, irq, type, level, |
| 204 | ih_fun, ih_arg, "unknown" ); |
| 205 | } |
| 206 | |
| 207 | void * |
| 208 | isa_intr_establish_xname(isa_chipset_tag_t ic, int irq, int type, int level, |
| 209 | int (*ih_fun)(void *), void *ih_arg, const char *xname) |
| 210 | { |
| 211 | struct pic *pic; |
| 212 | int pin; |
| 213 | #if NIOAPIC > 0 |
| 214 | intr_handle_t mpih; |
| 215 | struct ioapic_softc *ioapic; |
| 216 | #endif |
| 217 | |
| 218 | pin = irq; |
| 219 | pic = &i8259_pic; |
| 220 | |
| 221 | #if NIOAPIC > 0 |
| 222 | if (mp_busses != NULL) { |
| 223 | if (intr_find_mpmapping(mp_isa_bus, irq, &mpih) == 0 || |
| 224 | intr_find_mpmapping(mp_eisa_bus, irq, &mpih) == 0) { |
| 225 | if (!APIC_IRQ_ISLEGACY(mpih)) { |
| 226 | pin = APIC_IRQ_PIN(mpih); |
| 227 | ioapic = ioapic_find(APIC_IRQ_APIC(mpih)); |
| 228 | if (ioapic == NULL) { |
| 229 | printf("isa_intr_establish: " |
| 230 | "unknown apic %d\n" , |
| 231 | APIC_IRQ_APIC(mpih)); |
| 232 | return NULL; |
| 233 | } |
| 234 | pic = &ioapic->sc_pic; |
| 235 | } |
| 236 | } else |
| 237 | printf("isa_intr_establish: no MP mapping found\n" ); |
| 238 | } |
| 239 | #endif |
| 240 | return intr_establish_xname(irq, pic, pin, type, level, ih_fun, ih_arg, |
| 241 | false, xname); |
| 242 | } |
| 243 | |
| 244 | /* Deregister an interrupt handler. */ |
| 245 | void |
| 246 | isa_intr_disestablish(isa_chipset_tag_t ic, void *arg) |
| 247 | { |
| 248 | struct intrhand *ih = arg; |
| 249 | |
| 250 | if (!LEGAL_IRQ(ih->ih_pin)) |
| 251 | panic("intr_disestablish: bogus irq" ); |
| 252 | |
| 253 | intr_disestablish(ih); |
| 254 | } |
| 255 | |
| 256 | void |
| 257 | isa_attach_hook(device_t parent, device_t self, struct isabus_attach_args *iba) |
| 258 | { |
| 259 | extern struct x86_isa_chipset x86_isa_chipset; |
| 260 | extern int isa_has_been_seen; |
| 261 | |
| 262 | /* |
| 263 | * Notify others that might need to know that the ISA bus |
| 264 | * has now been attached. |
| 265 | */ |
| 266 | if (isa_has_been_seen) |
| 267 | panic("isaattach: ISA bus already seen!" ); |
| 268 | isa_has_been_seen = 1; |
| 269 | |
| 270 | /* |
| 271 | * Since we can only have one ISA bus, we just use a single |
| 272 | * statically allocated ISA chipset structure. Pass it up |
| 273 | * now. |
| 274 | */ |
| 275 | iba->iba_ic = &x86_isa_chipset; |
| 276 | } |
| 277 | |
| 278 | void |
| 279 | isa_detach_hook(isa_chipset_tag_t ic, device_t self) |
| 280 | { |
| 281 | extern int isa_has_been_seen; |
| 282 | |
| 283 | isa_has_been_seen = 0; |
| 284 | } |
| 285 | |
| 286 | int |
| 287 | isa_mem_alloc(bus_space_tag_t t, bus_size_t size, bus_size_t align, |
| 288 | bus_addr_t boundary, int flags, bus_addr_t *addrp, bus_space_handle_t *bshp) |
| 289 | { |
| 290 | /* Allocate physical address space in the ISA hole. */ |
| 291 | return bus_space_alloc(t, IOM_BEGIN, IOM_END - 1, size, align, |
| 292 | boundary, flags, addrp, bshp); |
| 293 | } |
| 294 | |
| 295 | void |
| 296 | isa_mem_free(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t size) |
| 297 | { |
| 298 | bus_space_free(t, bsh, size); |
| 299 | } |
| 300 | |
| 301 | /* |
| 302 | * ISA only has 24-bits of address space. This means |
| 303 | * we can't DMA to pages over 16M. In order to DMA to |
| 304 | * arbitrary buffers, we use "bounce buffers" - pages |
| 305 | * in memory below the 16M boundary. On DMA reads, |
| 306 | * DMA happens to the bounce buffers, and is copied into |
| 307 | * the caller's buffer. On writes, data is copied into |
| 308 | * but bounce buffer, and the DMA happens from those |
| 309 | * pages. To software using the DMA mapping interface, |
| 310 | * this looks simply like a data cache. |
| 311 | * |
| 312 | * If we have more than 16M of RAM in the system, we may |
| 313 | * need bounce buffers. We check and remember that here. |
| 314 | * |
| 315 | * There are exceptions, however. VLB devices can do |
| 316 | * 32-bit DMA, and indicate that here. |
| 317 | * |
| 318 | * ...or, there is an opposite case. The most segments |
| 319 | * a transfer will require is (maxxfer / PAGE_SIZE) + 1. If |
| 320 | * the caller can't handle that many segments (e.g. the |
| 321 | * ISA DMA controller), we may have to bounce it as well. |
| 322 | */ |
| 323 | static int |
| 324 | _isa_dma_may_bounce(bus_dma_tag_t t, bus_dmamap_t map, int flags, |
| 325 | int *cookieflagsp) |
| 326 | { |
| 327 | if ((flags & ISABUS_DMA_32BIT) != 0) |
| 328 | map->_dm_bounce_thresh = 0; |
| 329 | |
| 330 | if (((map->_dm_size / PAGE_SIZE) + 1) > map->_dm_segcnt) |
| 331 | *cookieflagsp |= X86_DMA_MIGHT_NEED_BOUNCE; |
| 332 | return 0; |
| 333 | } |
| 334 | |
| 335 | device_t |
| 336 | device_isa_register(device_t dev, void *aux) |
| 337 | { |
| 338 | /* |
| 339 | * Handle network interfaces here, the attachment information is |
| 340 | * not available driver-independently later. |
| 341 | * |
| 342 | * For disks, there is nothing useful available at attach time. |
| 343 | */ |
| 344 | if (device_class(dev) == DV_IFNET) { |
| 345 | struct btinfo_netif *bin = lookup_bootinfo(BTINFO_NETIF); |
| 346 | if (bin == NULL) |
| 347 | return NULL; |
| 348 | |
| 349 | /* |
| 350 | * We don't check the driver name against the device name |
| 351 | * passed by the boot ROM. The ROM should stay usable if |
| 352 | * the driver becomes obsolete. The physical attachment |
| 353 | * information (checked below) must be sufficient to |
| 354 | * identify the device. |
| 355 | */ |
| 356 | if (bin->bus == BI_BUS_ISA && |
| 357 | device_is_a(device_parent(dev), "isa" )) { |
| 358 | struct isa_attach_args *iaa = aux; |
| 359 | |
| 360 | /* Compare IO base address */ |
| 361 | /* XXXJRT What about multiple IO addrs? */ |
| 362 | if (iaa->ia_nio > 0 && |
| 363 | bin->addr.iobase == iaa->ia_io[0].ir_addr) |
| 364 | return dev; |
| 365 | } |
| 366 | } |
| 367 | #if NACPICA > 0 |
| 368 | #if notyet |
| 369 | if (device_is_a(dev, "isa" ) && acpi_active) { |
| 370 | if (!(AcpiGbl_FADT.BootFlags & ACPI_FADT_LEGACY_DEVICES)) |
| 371 | prop_dictionary_set_bool(device_properties(dev), |
| 372 | "no-legacy-devices" , true); |
| 373 | } |
| 374 | #endif |
| 375 | #endif /* NACPICA > 0 */ |
| 376 | return NULL; |
| 377 | } |
| 378 | |