| 1 | /* $NetBSD: mvsatavar.h,v 1.2 2010/07/13 12:53:42 kiyohara Exp $ */ |
| 2 | /* |
| 3 | * Copyright (c) 2008 KIYOHARA Takashi |
| 4 | * All rights reserved. |
| 5 | * |
| 6 | * Redistribution and use in source and binary forms, with or without |
| 7 | * modification, are permitted provided that the following conditions |
| 8 | * are met: |
| 9 | * 1. Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * 2. Redistributions in binary form must reproduce the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer in the |
| 13 | * documentation and/or other materials provided with the distribution. |
| 14 | * |
| 15 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| 16 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 17 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 18 | * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, |
| 19 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 20 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| 21 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 22 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
| 23 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
| 24 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 25 | * POSSIBILITY OF SUCH DAMAGE. |
| 26 | */ |
| 27 | |
| 28 | #ifndef _MVSATAVAR_H_ |
| 29 | #define _MVSATAVAR_H_ |
| 30 | |
| 31 | struct mvsata_product { |
| 32 | int vendor; |
| 33 | int model; |
| 34 | int hc; |
| 35 | int port; |
| 36 | int generation; |
| 37 | int flags; |
| 38 | }; |
| 39 | |
| 40 | #define MVSATA_EDMAQ_LEN 32 /* keep compatibility to gen1 */ |
| 41 | #define MVSATA_EDMAQ_INC(i) ((i) = ((i) + 1) % MVSATA_EDMAQ_LEN) |
| 42 | #define MVSATA_HC_MAX 2 |
| 43 | #define MVSATA_PORT_MAX 4 |
| 44 | #define MVSATA_CHANNEL_MAX (MVSATA_HC_MAX * MVSATA_PORT_MAX) |
| 45 | |
| 46 | |
| 47 | struct mvsata_port; |
| 48 | |
| 49 | union mvsata_crqb { |
| 50 | struct crqb crqb; |
| 51 | struct crqb_gen2e crqb_gen2e; |
| 52 | }; |
| 53 | |
| 54 | struct _fix_phy_param { |
| 55 | uint32_t pre_amps; /* Pre/SignalAmps */ |
| 56 | |
| 57 | void (*_fix_phy)(struct mvsata_port *); |
| 58 | }; |
| 59 | |
| 60 | struct mvsata_port { |
| 61 | struct ata_channel port_ata_channel; |
| 62 | |
| 63 | int port; |
| 64 | struct mvsata_hc *port_hc; |
| 65 | |
| 66 | enum { |
| 67 | nodma, |
| 68 | dma, |
| 69 | queued, |
| 70 | ncq, |
| 71 | } port_edmamode; |
| 72 | |
| 73 | int port_quetagidx; /* Host Queue Tag valiable */ |
| 74 | |
| 75 | int port_prev_erqqop; /* previous Req Queue Out-Pointer */ |
| 76 | bus_dma_tag_t port_dmat; |
| 77 | union mvsata_crqb *port_crqb; /* EDMA Command Request Block */ |
| 78 | bus_dmamap_t port_crqb_dmamap; |
| 79 | struct crpb *port_crpb; /* EDMA Command Response Block */ |
| 80 | bus_dmamap_t port_crpb_dmamap; |
| 81 | struct eprd *port_eprd; /* EDMA Phy Region Description Table */ |
| 82 | bus_dmamap_t port_eprd_dmamap; |
| 83 | struct { |
| 84 | struct ata_xfer *xfer; /* queued xfer */ |
| 85 | bus_dmamap_t data_dmamap; /* DMA data buffer */ |
| 86 | bus_size_t eprd_offset; /* offset of ePRD buffer */ |
| 87 | struct eprd *eprd; /* ePRD buffer */ |
| 88 | } port_reqtbl[MVSATA_EDMAQ_LEN]; |
| 89 | |
| 90 | bus_space_tag_t port_iot; |
| 91 | bus_space_handle_t port_ioh; |
| 92 | bus_space_handle_t port_sata_scontrol; /* SATA Interface control reg */ |
| 93 | bus_space_handle_t port_sata_serror; /* SATA Interface error reg */ |
| 94 | bus_space_handle_t port_sata_sstatus; /* SATA Interface status reg */ |
| 95 | struct ata_queue port_ata_queue; |
| 96 | |
| 97 | struct _fix_phy_param _fix_phy_param; |
| 98 | }; |
| 99 | |
| 100 | struct mvsata_hc { |
| 101 | int hc; |
| 102 | struct mvsata_softc *hc_sc; |
| 103 | |
| 104 | bus_space_tag_t hc_iot; /* Tag for SATAHC Arbiter */ |
| 105 | bus_space_handle_t hc_ioh; /* Handle for SATAHC Arbiter */ |
| 106 | |
| 107 | struct mvsata_port *hc_ports[MVSATA_CHANNEL_MAX]; |
| 108 | }; |
| 109 | |
| 110 | struct mvsata_softc { |
| 111 | struct wdc_softc sc_wdcdev; /* common wdc definitions */ |
| 112 | |
| 113 | int sc_model; |
| 114 | int sc_rev; |
| 115 | enum { |
| 116 | gen_unknown = 0, |
| 117 | gen1, |
| 118 | gen2, |
| 119 | gen2e |
| 120 | } sc_gen; /* Generation for LSI */ |
| 121 | int sc_hc; /* number of host controller */ |
| 122 | int sc_port; /* number of port/host */ |
| 123 | |
| 124 | bus_space_tag_t sc_iot; |
| 125 | bus_space_handle_t sc_ioh; |
| 126 | bus_dma_tag_t sc_dmat; |
| 127 | |
| 128 | struct wdc_regs *sc_wdc_regs; |
| 129 | struct ata_channel *sc_ata_channels[MVSATA_CHANNEL_MAX]; |
| 130 | struct mvsata_hc sc_hcs[MVSATA_HC_MAX]; |
| 131 | |
| 132 | int sc_flags; |
| 133 | #define MVSATA_FLAGS_PCIE (1 << 0) |
| 134 | |
| 135 | void (*sc_edma_setup_crqb)(struct mvsata_port *, int, int, |
| 136 | struct ata_bio *); |
| 137 | void (*sc_enable_intr)(struct mvsata_port *, int); |
| 138 | }; |
| 139 | |
| 140 | int mvsata_attach(struct mvsata_softc *, struct mvsata_product *, |
| 141 | int (*mvsata_sreset)(struct mvsata_softc *), |
| 142 | int (*mvsata_misc_reset)(struct mvsata_softc *), int); |
| 143 | int mvsata_intr(struct mvsata_hc *); |
| 144 | int mvsata_error(struct mvsata_port *); |
| 145 | |
| 146 | #endif /* _MVSATAVAR_H_ */ |
| 147 | |