| 1 | /* $NetBSD: cpufunc.h,v 1.19 2016/01/05 10:20:22 hannken Exp $ */ |
| 2 | |
| 3 | /*- |
| 4 | * Copyright (c) 1998, 2007 The NetBSD Foundation, Inc. |
| 5 | * All rights reserved. |
| 6 | * |
| 7 | * This code is derived from software contributed to The NetBSD Foundation |
| 8 | * by Charles M. Hannum, and by Andrew Doran. |
| 9 | * |
| 10 | * Redistribution and use in source and binary forms, with or without |
| 11 | * modification, are permitted provided that the following conditions |
| 12 | * are met: |
| 13 | * 1. Redistributions of source code must retain the above copyright |
| 14 | * notice, this list of conditions and the following disclaimer. |
| 15 | * 2. Redistributions in binary form must reproduce the above copyright |
| 16 | * notice, this list of conditions and the following disclaimer in the |
| 17 | * documentation and/or other materials provided with the distribution. |
| 18 | * |
| 19 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS |
| 20 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
| 21 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 22 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS |
| 23 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 24 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 25 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 26 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 27 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 28 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 29 | * POSSIBILITY OF SUCH DAMAGE. |
| 30 | */ |
| 31 | |
| 32 | #ifndef _X86_CPUFUNC_H_ |
| 33 | #define _X86_CPUFUNC_H_ |
| 34 | |
| 35 | /* |
| 36 | * Functions to provide access to x86-specific instructions. |
| 37 | */ |
| 38 | |
| 39 | #include <sys/cdefs.h> |
| 40 | #include <sys/types.h> |
| 41 | |
| 42 | #include <machine/segments.h> |
| 43 | #include <machine/specialreg.h> |
| 44 | |
| 45 | #ifdef _KERNEL |
| 46 | |
| 47 | void x86_pause(void); |
| 48 | void x86_lfence(void); |
| 49 | void x86_sfence(void); |
| 50 | void x86_mfence(void); |
| 51 | void x86_flush(void); |
| 52 | #ifndef XEN |
| 53 | void x86_patch(bool); |
| 54 | #endif |
| 55 | void invlpg(vaddr_t); |
| 56 | void lidt(struct region_descriptor *); |
| 57 | void lldt(u_short); |
| 58 | void ltr(u_short); |
| 59 | void lcr0(u_long); |
| 60 | u_long rcr0(void); |
| 61 | void lcr2(vaddr_t); |
| 62 | vaddr_t rcr2(void); |
| 63 | void lcr3(vaddr_t); |
| 64 | vaddr_t rcr3(void); |
| 65 | void lcr4(vaddr_t); |
| 66 | vaddr_t rcr4(void); |
| 67 | void lcr8(vaddr_t); |
| 68 | vaddr_t rcr8(void); |
| 69 | void tlbflush(void); |
| 70 | void tlbflushg(void); |
| 71 | void dr0(void *, uint32_t, uint32_t, uint32_t); |
| 72 | vaddr_t rdr6(void); |
| 73 | void ldr6(vaddr_t); |
| 74 | void wbinvd(void); |
| 75 | void breakpoint(void); |
| 76 | void x86_hlt(void); |
| 77 | void x86_stihlt(void); |
| 78 | u_int x86_getss(void); |
| 79 | |
| 80 | /* fpu save, restore etc */ |
| 81 | union savefpu; |
| 82 | void fldcw(const uint16_t *); |
| 83 | void fnclex(void); |
| 84 | void fninit(void); |
| 85 | void fnsave(union savefpu *); |
| 86 | void fnstcw(uint16_t *); |
| 87 | uint16_t fngetsw(void); |
| 88 | void fnstsw(uint16_t *); |
| 89 | void frstor(const union savefpu *); |
| 90 | void fwait(void); |
| 91 | void clts(void); |
| 92 | void stts(void); |
| 93 | void fxsave(union savefpu *); |
| 94 | void fxrstor(const union savefpu *); |
| 95 | void x86_ldmxcsr(const uint32_t *); |
| 96 | void x86_stmxcsr(uint32_t *); |
| 97 | |
| 98 | void fldummy(void); |
| 99 | void fp_divide_by_0(void); |
| 100 | |
| 101 | /* Extended processor state functions (for AVX registers etc) */ |
| 102 | |
| 103 | uint64_t rdxcr(uint32_t); /* xgetbv */ |
| 104 | void wrxcr(uint32_t, uint64_t); /* xsetgv */ |
| 105 | |
| 106 | void xrstor(const union savefpu *, uint64_t); |
| 107 | void xsave(union savefpu *, uint64_t); |
| 108 | void xsaveopt(union savefpu *, uint64_t); |
| 109 | |
| 110 | void x86_monitor(const void *, uint32_t, uint32_t); |
| 111 | void x86_mwait(uint32_t, uint32_t); |
| 112 | /* x86_cpuid2() writes four 32bit values, %eax, %ebx, %ecx and %edx */ |
| 113 | #define x86_cpuid(a,b) x86_cpuid2((a),0,(b)) |
| 114 | void x86_cpuid2(uint32_t, uint32_t, uint32_t *); |
| 115 | |
| 116 | /* Use read_psl, write_psl when saving and restoring interrupt state. */ |
| 117 | void x86_disable_intr(void); |
| 118 | void x86_enable_intr(void); |
| 119 | u_long x86_read_psl(void); |
| 120 | void x86_write_psl(u_long); |
| 121 | |
| 122 | /* Use read_flags, write_flags to adjust other members of %eflags. */ |
| 123 | u_long x86_read_flags(void); |
| 124 | void x86_write_flags(u_long); |
| 125 | |
| 126 | void x86_reset(void); |
| 127 | |
| 128 | /* |
| 129 | * Some of the undocumented AMD64 MSRs need a 'passcode' to access. |
| 130 | * |
| 131 | * See LinuxBIOSv2: src/cpu/amd/model_fxx/model_fxx_init.c |
| 132 | */ |
| 133 | |
| 134 | #define OPTERON_MSR_PASSCODE 0x9c5a203aU |
| 135 | |
| 136 | uint64_t rdmsr(u_int); |
| 137 | uint64_t rdmsr_locked(u_int); |
| 138 | int rdmsr_safe(u_int, uint64_t *); |
| 139 | uint64_t rdtsc(void); |
| 140 | uint64_t rdpmc(u_int); |
| 141 | void wrmsr(u_int, uint64_t); |
| 142 | void wrmsr_locked(u_int, uint64_t); |
| 143 | void setfs(int); |
| 144 | void setusergs(int); |
| 145 | |
| 146 | #endif /* _KERNEL */ |
| 147 | |
| 148 | #endif /* !_X86_CPUFUNC_H_ */ |
| 149 | |