| 1 | /* $NetBSD: agp.c,v 1.83 2014/07/25 08:10:38 dholland Exp $ */ |
| 2 | |
| 3 | /*- |
| 4 | * Copyright (c) 2000 Doug Rabson |
| 5 | * All rights reserved. |
| 6 | * |
| 7 | * Redistribution and use in source and binary forms, with or without |
| 8 | * modification, are permitted provided that the following conditions |
| 9 | * are met: |
| 10 | * 1. Redistributions of source code must retain the above copyright |
| 11 | * notice, this list of conditions and the following disclaimer. |
| 12 | * 2. Redistributions in binary form must reproduce the above copyright |
| 13 | * notice, this list of conditions and the following disclaimer in the |
| 14 | * documentation and/or other materials provided with the distribution. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
| 17 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 18 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
| 20 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| 21 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| 22 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 23 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
| 24 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
| 25 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 26 | * SUCH DAMAGE. |
| 27 | * |
| 28 | * $FreeBSD: src/sys/pci/agp.c,v 1.12 2001/05/19 01:28:07 alfred Exp $ |
| 29 | */ |
| 30 | |
| 31 | /* |
| 32 | * Copyright (c) 2001 Wasabi Systems, Inc. |
| 33 | * All rights reserved. |
| 34 | * |
| 35 | * Written by Frank van der Linden for Wasabi Systems, Inc. |
| 36 | * |
| 37 | * Redistribution and use in source and binary forms, with or without |
| 38 | * modification, are permitted provided that the following conditions |
| 39 | * are met: |
| 40 | * 1. Redistributions of source code must retain the above copyright |
| 41 | * notice, this list of conditions and the following disclaimer. |
| 42 | * 2. Redistributions in binary form must reproduce the above copyright |
| 43 | * notice, this list of conditions and the following disclaimer in the |
| 44 | * documentation and/or other materials provided with the distribution. |
| 45 | * 3. All advertising materials mentioning features or use of this software |
| 46 | * must display the following acknowledgement: |
| 47 | * This product includes software developed for the NetBSD Project by |
| 48 | * Wasabi Systems, Inc. |
| 49 | * 4. The name of Wasabi Systems, Inc. may not be used to endorse |
| 50 | * or promote products derived from this software without specific prior |
| 51 | * written permission. |
| 52 | * |
| 53 | * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND |
| 54 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
| 55 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 56 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC |
| 57 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 58 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 59 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 60 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 61 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 62 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 63 | * POSSIBILITY OF SUCH DAMAGE. |
| 64 | */ |
| 65 | |
| 66 | |
| 67 | #include <sys/cdefs.h> |
| 68 | __KERNEL_RCSID(0, "$NetBSD: agp.c,v 1.83 2014/07/25 08:10:38 dholland Exp $" ); |
| 69 | |
| 70 | #include <sys/param.h> |
| 71 | #include <sys/systm.h> |
| 72 | #include <sys/malloc.h> |
| 73 | #include <sys/kernel.h> |
| 74 | #include <sys/device.h> |
| 75 | #include <sys/conf.h> |
| 76 | #include <sys/ioctl.h> |
| 77 | #include <sys/fcntl.h> |
| 78 | #include <sys/agpio.h> |
| 79 | #include <sys/proc.h> |
| 80 | #include <sys/mutex.h> |
| 81 | |
| 82 | #include <dev/pci/pcireg.h> |
| 83 | #include <dev/pci/pcivar.h> |
| 84 | #include <dev/pci/agpvar.h> |
| 85 | #include <dev/pci/agpreg.h> |
| 86 | #include <dev/pci/pcidevs.h> |
| 87 | |
| 88 | #include <sys/bus.h> |
| 89 | |
| 90 | MALLOC_DEFINE(M_AGP, "AGP" , "AGP memory" ); |
| 91 | |
| 92 | /* Helper functions for implementing chipset mini drivers. */ |
| 93 | /* XXXfvdl get rid of this one. */ |
| 94 | |
| 95 | extern struct cfdriver agp_cd; |
| 96 | |
| 97 | static int agp_info_user(struct agp_softc *, agp_info *); |
| 98 | static int agp_setup_user(struct agp_softc *, agp_setup *); |
| 99 | static int agp_allocate_user(struct agp_softc *, agp_allocate *); |
| 100 | static int agp_deallocate_user(struct agp_softc *, int); |
| 101 | static int agp_bind_user(struct agp_softc *, agp_bind *); |
| 102 | static int agp_unbind_user(struct agp_softc *, agp_unbind *); |
| 103 | static int agp_generic_enable_v2(struct agp_softc *, |
| 104 | const struct pci_attach_args *, int, u_int32_t); |
| 105 | static int agp_generic_enable_v3(struct agp_softc *, |
| 106 | const struct pci_attach_args *, int, u_int32_t); |
| 107 | static int agpdev_match(const struct pci_attach_args *); |
| 108 | static bool agp_resume(device_t, const pmf_qual_t *); |
| 109 | |
| 110 | #include "agp_ali.h" |
| 111 | #include "agp_amd.h" |
| 112 | #include "agp_i810.h" |
| 113 | #include "agp_intel.h" |
| 114 | #include "agp_sis.h" |
| 115 | #include "agp_via.h" |
| 116 | #include "agp_amd64.h" |
| 117 | |
| 118 | const struct agp_product { |
| 119 | uint32_t ap_vendor; |
| 120 | uint32_t ap_product; |
| 121 | int (*ap_match)(const struct pci_attach_args *); |
| 122 | int (*ap_attach)(device_t, device_t, void *); |
| 123 | } agp_products[] = { |
| 124 | #if NAGP_AMD64 > 0 |
| 125 | { PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1689, |
| 126 | agp_amd64_match, agp_amd64_attach }, |
| 127 | #endif |
| 128 | |
| 129 | #if NAGP_ALI > 0 |
| 130 | { PCI_VENDOR_ALI, -1, |
| 131 | NULL, agp_ali_attach }, |
| 132 | #endif |
| 133 | |
| 134 | #if NAGP_AMD64 > 0 |
| 135 | { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AGP8151_DEV, |
| 136 | agp_amd64_match, agp_amd64_attach }, |
| 137 | #endif |
| 138 | |
| 139 | #if NAGP_AMD > 0 |
| 140 | { PCI_VENDOR_AMD, -1, |
| 141 | agp_amd_match, agp_amd_attach }, |
| 142 | #endif |
| 143 | |
| 144 | #if NAGP_I810 > 0 |
| 145 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810_MCH, |
| 146 | NULL, agp_i810_attach }, |
| 147 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810_DC100_MCH, |
| 148 | NULL, agp_i810_attach }, |
| 149 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810E_MCH, |
| 150 | NULL, agp_i810_attach }, |
| 151 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82815_FULL_HUB, |
| 152 | NULL, agp_i810_attach }, |
| 153 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82840_HB, |
| 154 | NULL, agp_i810_attach }, |
| 155 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82830MP_IO_1, |
| 156 | NULL, agp_i810_attach }, |
| 157 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82845G_DRAM, |
| 158 | NULL, agp_i810_attach }, |
| 159 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82855GM_MCH, |
| 160 | NULL, agp_i810_attach }, |
| 161 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82865_HB, |
| 162 | NULL, agp_i810_attach }, |
| 163 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915G_HB, |
| 164 | NULL, agp_i810_attach }, |
| 165 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915GM_HB, |
| 166 | NULL, agp_i810_attach }, |
| 167 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945P_MCH, |
| 168 | NULL, agp_i810_attach }, |
| 169 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GM_HB, |
| 170 | NULL, agp_i810_attach }, |
| 171 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GME_HB, |
| 172 | NULL, agp_i810_attach }, |
| 173 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965Q_HB, |
| 174 | NULL, agp_i810_attach }, |
| 175 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965PM_HB, |
| 176 | NULL, agp_i810_attach }, |
| 177 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965G_HB, |
| 178 | NULL, agp_i810_attach }, |
| 179 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q35_HB, |
| 180 | NULL, agp_i810_attach }, |
| 181 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G33_HB, |
| 182 | NULL, agp_i810_attach }, |
| 183 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q33_HB, |
| 184 | NULL, agp_i810_attach }, |
| 185 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G35_HB, |
| 186 | NULL, agp_i810_attach }, |
| 187 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82946GZ_HB, |
| 188 | NULL, agp_i810_attach }, |
| 189 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82GM45_HB, |
| 190 | NULL, agp_i810_attach }, |
| 191 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82IGD_E_HB, |
| 192 | NULL, agp_i810_attach }, |
| 193 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q45_HB, |
| 194 | NULL, agp_i810_attach }, |
| 195 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G45_HB, |
| 196 | NULL, agp_i810_attach }, |
| 197 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G41_HB, |
| 198 | NULL, agp_i810_attach }, |
| 199 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7221_HB, |
| 200 | NULL, agp_i810_attach }, |
| 201 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965GME_HB, |
| 202 | NULL, agp_i810_attach }, |
| 203 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82B43_HB, |
| 204 | NULL, agp_i810_attach }, |
| 205 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_D_HB, |
| 206 | NULL, agp_i810_attach }, |
| 207 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_M_HB, |
| 208 | NULL, agp_i810_attach }, |
| 209 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_MA_HB, |
| 210 | NULL, agp_i810_attach }, |
| 211 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_MC2_HB, |
| 212 | NULL, agp_i810_attach }, |
| 213 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PINEVIEW_HB, |
| 214 | NULL, agp_i810_attach }, |
| 215 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PINEVIEW_M_HB, |
| 216 | NULL, agp_i810_attach }, |
| 217 | #endif |
| 218 | |
| 219 | #if NAGP_INTEL > 0 |
| 220 | { PCI_VENDOR_INTEL, -1, |
| 221 | NULL, agp_intel_attach }, |
| 222 | #endif |
| 223 | |
| 224 | #if NAGP_AMD64 > 0 |
| 225 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_PCHB, |
| 226 | agp_amd64_match, agp_amd64_attach }, |
| 227 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_250_PCHB, |
| 228 | agp_amd64_match, agp_amd64_attach }, |
| 229 | #endif |
| 230 | |
| 231 | #if NAGP_AMD64 > 0 |
| 232 | { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_755, |
| 233 | agp_amd64_match, agp_amd64_attach }, |
| 234 | { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_760, |
| 235 | agp_amd64_match, agp_amd64_attach }, |
| 236 | #endif |
| 237 | |
| 238 | #if NAGP_SIS > 0 |
| 239 | { PCI_VENDOR_SIS, -1, |
| 240 | NULL, agp_sis_attach }, |
| 241 | #endif |
| 242 | |
| 243 | #if NAGP_AMD64 > 0 |
| 244 | { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8M800_0, |
| 245 | agp_amd64_match, agp_amd64_attach }, |
| 246 | { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8T890_0, |
| 247 | agp_amd64_match, agp_amd64_attach }, |
| 248 | { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8HTB_0, |
| 249 | agp_amd64_match, agp_amd64_attach }, |
| 250 | { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8HTB, |
| 251 | agp_amd64_match, agp_amd64_attach }, |
| 252 | #endif |
| 253 | |
| 254 | #if NAGP_VIA > 0 |
| 255 | { PCI_VENDOR_VIATECH, -1, |
| 256 | NULL, agp_via_attach }, |
| 257 | #endif |
| 258 | |
| 259 | { 0, 0, |
| 260 | NULL, NULL }, |
| 261 | }; |
| 262 | |
| 263 | static const struct agp_product * |
| 264 | agp_lookup(const struct pci_attach_args *pa) |
| 265 | { |
| 266 | const struct agp_product *ap; |
| 267 | |
| 268 | /* First find the vendor. */ |
| 269 | for (ap = agp_products; ap->ap_attach != NULL; ap++) { |
| 270 | if (PCI_VENDOR(pa->pa_id) == ap->ap_vendor) |
| 271 | break; |
| 272 | } |
| 273 | |
| 274 | if (ap->ap_attach == NULL) |
| 275 | return (NULL); |
| 276 | |
| 277 | /* Now find the product within the vendor's domain. */ |
| 278 | for (; ap->ap_attach != NULL; ap++) { |
| 279 | if (PCI_VENDOR(pa->pa_id) != ap->ap_vendor) { |
| 280 | /* Ran out of this vendor's section of the table. */ |
| 281 | return (NULL); |
| 282 | } |
| 283 | if (ap->ap_product == PCI_PRODUCT(pa->pa_id)) { |
| 284 | /* Exact match. */ |
| 285 | break; |
| 286 | } |
| 287 | if (ap->ap_product == (uint32_t) -1) { |
| 288 | /* Wildcard match. */ |
| 289 | break; |
| 290 | } |
| 291 | } |
| 292 | |
| 293 | if (ap->ap_attach == NULL) |
| 294 | return (NULL); |
| 295 | |
| 296 | /* Now let the product-specific driver filter the match. */ |
| 297 | if (ap->ap_match != NULL && (*ap->ap_match)(pa) == 0) |
| 298 | return (NULL); |
| 299 | |
| 300 | return (ap); |
| 301 | } |
| 302 | |
| 303 | static int |
| 304 | agpmatch(device_t parent, cfdata_t match, void *aux) |
| 305 | { |
| 306 | struct agpbus_attach_args *apa = aux; |
| 307 | struct pci_attach_args *pa = &apa->apa_pci_args; |
| 308 | |
| 309 | if (agp_lookup(pa) == NULL) |
| 310 | return (0); |
| 311 | |
| 312 | return (1); |
| 313 | } |
| 314 | |
| 315 | static const int agp_max[][2] = { |
| 316 | {0, 0}, |
| 317 | {32, 4}, |
| 318 | {64, 28}, |
| 319 | {128, 96}, |
| 320 | {256, 204}, |
| 321 | {512, 440}, |
| 322 | {1024, 942}, |
| 323 | {2048, 1920}, |
| 324 | {4096, 3932} |
| 325 | }; |
| 326 | #define agp_max_size (sizeof(agp_max) / sizeof(agp_max[0])) |
| 327 | |
| 328 | static void |
| 329 | agpattach(device_t parent, device_t self, void *aux) |
| 330 | { |
| 331 | struct agpbus_attach_args *apa = aux; |
| 332 | struct pci_attach_args *pa = &apa->apa_pci_args; |
| 333 | struct agp_softc *sc = device_private(self); |
| 334 | const struct agp_product *ap; |
| 335 | int memsize, i, ret; |
| 336 | |
| 337 | ap = agp_lookup(pa); |
| 338 | KASSERT(ap != NULL); |
| 339 | |
| 340 | aprint_naive(": AGP controller\n" ); |
| 341 | |
| 342 | sc->as_dev = self; |
| 343 | sc->as_dmat = pa->pa_dmat; |
| 344 | sc->as_pc = pa->pa_pc; |
| 345 | sc->as_tag = pa->pa_tag; |
| 346 | sc->as_id = pa->pa_id; |
| 347 | |
| 348 | /* |
| 349 | * Work out an upper bound for agp memory allocation. This |
| 350 | * uses a heuristic table from the Linux driver. |
| 351 | */ |
| 352 | memsize = physmem >> (20 - PAGE_SHIFT); /* memsize is in MB */ |
| 353 | for (i = 0; i < agp_max_size; i++) { |
| 354 | if (memsize <= agp_max[i][0]) |
| 355 | break; |
| 356 | } |
| 357 | if (i == agp_max_size) |
| 358 | i = agp_max_size - 1; |
| 359 | sc->as_maxmem = agp_max[i][1] << 20U; |
| 360 | |
| 361 | /* |
| 362 | * The mutex is used to prevent re-entry to |
| 363 | * agp_generic_bind_memory() since that function can sleep. |
| 364 | */ |
| 365 | mutex_init(&sc->as_mtx, MUTEX_DEFAULT, IPL_NONE); |
| 366 | |
| 367 | TAILQ_INIT(&sc->as_memory); |
| 368 | |
| 369 | ret = (*ap->ap_attach)(parent, self, pa); |
| 370 | if (ret == 0) |
| 371 | aprint_normal(": aperture at 0x%lx, size 0x%lx\n" , |
| 372 | (unsigned long)sc->as_apaddr, |
| 373 | (unsigned long)AGP_GET_APERTURE(sc)); |
| 374 | else |
| 375 | sc->as_chipc = NULL; |
| 376 | |
| 377 | if (!pmf_device_register(self, NULL, agp_resume)) |
| 378 | aprint_error_dev(self, "couldn't establish power handler\n" ); |
| 379 | } |
| 380 | |
| 381 | CFATTACH_DECL_NEW(agp, sizeof(struct agp_softc), |
| 382 | agpmatch, agpattach, NULL, NULL); |
| 383 | |
| 384 | int |
| 385 | agp_map_aperture(struct pci_attach_args *pa, struct agp_softc *sc, int reg) |
| 386 | { |
| 387 | /* |
| 388 | * Find the aperture. Don't map it (yet), this would |
| 389 | * eat KVA. |
| 390 | */ |
| 391 | if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg, |
| 392 | PCI_MAPREG_TYPE_MEM, &sc->as_apaddr, &sc->as_apsize, |
| 393 | &sc->as_apflags) != 0) |
| 394 | return ENXIO; |
| 395 | |
| 396 | sc->as_apt = pa->pa_memt; |
| 397 | |
| 398 | return 0; |
| 399 | } |
| 400 | |
| 401 | struct agp_gatt * |
| 402 | agp_alloc_gatt(struct agp_softc *sc) |
| 403 | { |
| 404 | u_int32_t apsize = AGP_GET_APERTURE(sc); |
| 405 | u_int32_t entries = apsize >> AGP_PAGE_SHIFT; |
| 406 | struct agp_gatt *gatt; |
| 407 | void *virtual; |
| 408 | int dummyseg; |
| 409 | |
| 410 | gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT); |
| 411 | if (!gatt) |
| 412 | return NULL; |
| 413 | gatt->ag_entries = entries; |
| 414 | |
| 415 | if (agp_alloc_dmamem(sc->as_dmat, entries * sizeof(u_int32_t), |
| 416 | 0, &gatt->ag_dmamap, &virtual, &gatt->ag_physical, |
| 417 | &gatt->ag_dmaseg, 1, &dummyseg) != 0) { |
| 418 | free(gatt, M_AGP); |
| 419 | return NULL; |
| 420 | } |
| 421 | gatt->ag_virtual = (uint32_t *)virtual; |
| 422 | |
| 423 | gatt->ag_size = entries * sizeof(u_int32_t); |
| 424 | memset(gatt->ag_virtual, 0, gatt->ag_size); |
| 425 | agp_flush_cache(); |
| 426 | |
| 427 | return gatt; |
| 428 | } |
| 429 | |
| 430 | void |
| 431 | agp_free_gatt(struct agp_softc *sc, struct agp_gatt *gatt) |
| 432 | { |
| 433 | agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap, |
| 434 | (void *)gatt->ag_virtual, &gatt->ag_dmaseg, 1); |
| 435 | free(gatt, M_AGP); |
| 436 | } |
| 437 | |
| 438 | |
| 439 | int |
| 440 | agp_generic_detach(struct agp_softc *sc) |
| 441 | { |
| 442 | mutex_destroy(&sc->as_mtx); |
| 443 | agp_flush_cache(); |
| 444 | return 0; |
| 445 | } |
| 446 | |
| 447 | static int |
| 448 | agpdev_match(const struct pci_attach_args *pa) |
| 449 | { |
| 450 | if (PCI_CLASS(pa->pa_class) == PCI_CLASS_DISPLAY && |
| 451 | PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_DISPLAY_VGA) |
| 452 | if (pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_AGP, |
| 453 | NULL, NULL)) |
| 454 | return 1; |
| 455 | |
| 456 | return 0; |
| 457 | } |
| 458 | |
| 459 | int |
| 460 | agp_generic_enable(struct agp_softc *sc, u_int32_t mode) |
| 461 | { |
| 462 | struct pci_attach_args pa; |
| 463 | pcireg_t tstatus, mstatus; |
| 464 | int capoff; |
| 465 | |
| 466 | if (pci_find_device(&pa, agpdev_match) == 0 || |
| 467 | pci_get_capability(pa.pa_pc, pa.pa_tag, PCI_CAP_AGP, |
| 468 | &capoff, NULL) == 0) { |
| 469 | aprint_error_dev(sc->as_dev, "can't find display\n" ); |
| 470 | return ENXIO; |
| 471 | } |
| 472 | |
| 473 | tstatus = pci_conf_read(sc->as_pc, sc->as_tag, |
| 474 | sc->as_capoff + AGP_STATUS); |
| 475 | mstatus = pci_conf_read(pa.pa_pc, pa.pa_tag, |
| 476 | capoff + AGP_STATUS); |
| 477 | |
| 478 | if (AGP_MODE_GET_MODE_3(mode) && |
| 479 | AGP_MODE_GET_MODE_3(tstatus) && |
| 480 | AGP_MODE_GET_MODE_3(mstatus)) |
| 481 | return agp_generic_enable_v3(sc, &pa, capoff, mode); |
| 482 | else |
| 483 | return agp_generic_enable_v2(sc, &pa, capoff, mode); |
| 484 | } |
| 485 | |
| 486 | static int |
| 487 | agp_generic_enable_v2(struct agp_softc *sc, const struct pci_attach_args *pa, |
| 488 | int capoff, u_int32_t mode) |
| 489 | { |
| 490 | pcireg_t tstatus, mstatus; |
| 491 | pcireg_t command; |
| 492 | int rq, sba, fw, rate; |
| 493 | |
| 494 | tstatus = pci_conf_read(sc->as_pc, sc->as_tag, |
| 495 | sc->as_capoff + AGP_STATUS); |
| 496 | mstatus = pci_conf_read(pa->pa_pc, pa->pa_tag, |
| 497 | capoff + AGP_STATUS); |
| 498 | |
| 499 | /* Set RQ to the min of mode, tstatus and mstatus */ |
| 500 | rq = AGP_MODE_GET_RQ(mode); |
| 501 | if (AGP_MODE_GET_RQ(tstatus) < rq) |
| 502 | rq = AGP_MODE_GET_RQ(tstatus); |
| 503 | if (AGP_MODE_GET_RQ(mstatus) < rq) |
| 504 | rq = AGP_MODE_GET_RQ(mstatus); |
| 505 | |
| 506 | /* Set SBA if all three can deal with SBA */ |
| 507 | sba = (AGP_MODE_GET_SBA(tstatus) |
| 508 | & AGP_MODE_GET_SBA(mstatus) |
| 509 | & AGP_MODE_GET_SBA(mode)); |
| 510 | |
| 511 | /* Similar for FW */ |
| 512 | fw = (AGP_MODE_GET_FW(tstatus) |
| 513 | & AGP_MODE_GET_FW(mstatus) |
| 514 | & AGP_MODE_GET_FW(mode)); |
| 515 | |
| 516 | /* Figure out the max rate */ |
| 517 | rate = (AGP_MODE_GET_RATE(tstatus) |
| 518 | & AGP_MODE_GET_RATE(mstatus) |
| 519 | & AGP_MODE_GET_RATE(mode)); |
| 520 | if (rate & AGP_MODE_V2_RATE_4x) |
| 521 | rate = AGP_MODE_V2_RATE_4x; |
| 522 | else if (rate & AGP_MODE_V2_RATE_2x) |
| 523 | rate = AGP_MODE_V2_RATE_2x; |
| 524 | else |
| 525 | rate = AGP_MODE_V2_RATE_1x; |
| 526 | |
| 527 | /* Construct the new mode word and tell the hardware */ |
| 528 | command = AGP_MODE_SET_RQ(0, rq); |
| 529 | command = AGP_MODE_SET_SBA(command, sba); |
| 530 | command = AGP_MODE_SET_FW(command, fw); |
| 531 | command = AGP_MODE_SET_RATE(command, rate); |
| 532 | command = AGP_MODE_SET_AGP(command, 1); |
| 533 | pci_conf_write(sc->as_pc, sc->as_tag, |
| 534 | sc->as_capoff + AGP_COMMAND, command); |
| 535 | pci_conf_write(pa->pa_pc, pa->pa_tag, capoff + AGP_COMMAND, command); |
| 536 | |
| 537 | return 0; |
| 538 | } |
| 539 | |
| 540 | static int |
| 541 | agp_generic_enable_v3(struct agp_softc *sc, const struct pci_attach_args *pa, |
| 542 | int capoff, u_int32_t mode) |
| 543 | { |
| 544 | pcireg_t tstatus, mstatus; |
| 545 | pcireg_t command; |
| 546 | int rq, sba, fw, rate, arqsz, cal; |
| 547 | |
| 548 | tstatus = pci_conf_read(sc->as_pc, sc->as_tag, |
| 549 | sc->as_capoff + AGP_STATUS); |
| 550 | mstatus = pci_conf_read(pa->pa_pc, pa->pa_tag, |
| 551 | capoff + AGP_STATUS); |
| 552 | |
| 553 | /* Set RQ to the min of mode, tstatus and mstatus */ |
| 554 | rq = AGP_MODE_GET_RQ(mode); |
| 555 | if (AGP_MODE_GET_RQ(tstatus) < rq) |
| 556 | rq = AGP_MODE_GET_RQ(tstatus); |
| 557 | if (AGP_MODE_GET_RQ(mstatus) < rq) |
| 558 | rq = AGP_MODE_GET_RQ(mstatus); |
| 559 | |
| 560 | /* |
| 561 | * ARQSZ - Set the value to the maximum one. |
| 562 | * Don't allow the mode register to override values. |
| 563 | */ |
| 564 | arqsz = AGP_MODE_GET_ARQSZ(mode); |
| 565 | if (AGP_MODE_GET_ARQSZ(tstatus) > arqsz) |
| 566 | arqsz = AGP_MODE_GET_ARQSZ(tstatus); |
| 567 | if (AGP_MODE_GET_ARQSZ(mstatus) > arqsz) |
| 568 | arqsz = AGP_MODE_GET_ARQSZ(mstatus); |
| 569 | |
| 570 | /* Calibration cycle - don't allow override by mode register */ |
| 571 | cal = AGP_MODE_GET_CAL(tstatus); |
| 572 | if (AGP_MODE_GET_CAL(mstatus) < cal) |
| 573 | cal = AGP_MODE_GET_CAL(mstatus); |
| 574 | |
| 575 | /* SBA must be supported for AGP v3. */ |
| 576 | sba = 1; |
| 577 | |
| 578 | /* Set FW if all three support it. */ |
| 579 | fw = (AGP_MODE_GET_FW(tstatus) |
| 580 | & AGP_MODE_GET_FW(mstatus) |
| 581 | & AGP_MODE_GET_FW(mode)); |
| 582 | |
| 583 | /* Figure out the max rate */ |
| 584 | rate = (AGP_MODE_GET_RATE(tstatus) |
| 585 | & AGP_MODE_GET_RATE(mstatus) |
| 586 | & AGP_MODE_GET_RATE(mode)); |
| 587 | if (rate & AGP_MODE_V3_RATE_8x) |
| 588 | rate = AGP_MODE_V3_RATE_8x; |
| 589 | else |
| 590 | rate = AGP_MODE_V3_RATE_4x; |
| 591 | |
| 592 | /* Construct the new mode word and tell the hardware */ |
| 593 | command = AGP_MODE_SET_RQ(0, rq); |
| 594 | command = AGP_MODE_SET_ARQSZ(command, arqsz); |
| 595 | command = AGP_MODE_SET_CAL(command, cal); |
| 596 | command = AGP_MODE_SET_SBA(command, sba); |
| 597 | command = AGP_MODE_SET_FW(command, fw); |
| 598 | command = AGP_MODE_SET_RATE(command, rate); |
| 599 | command = AGP_MODE_SET_AGP(command, 1); |
| 600 | pci_conf_write(sc->as_pc, sc->as_tag, |
| 601 | sc->as_capoff + AGP_COMMAND, command); |
| 602 | pci_conf_write(pa->pa_pc, pa->pa_tag, capoff + AGP_COMMAND, command); |
| 603 | |
| 604 | return 0; |
| 605 | } |
| 606 | |
| 607 | struct agp_memory * |
| 608 | agp_generic_alloc_memory(struct agp_softc *sc, int type, vsize_t size) |
| 609 | { |
| 610 | struct agp_memory *mem; |
| 611 | |
| 612 | if ((size & (AGP_PAGE_SIZE - 1)) != 0) |
| 613 | return 0; |
| 614 | |
| 615 | if (sc->as_allocated + size > sc->as_maxmem) |
| 616 | return 0; |
| 617 | |
| 618 | if (type != 0) { |
| 619 | printf("agp_generic_alloc_memory: unsupported type %d\n" , |
| 620 | type); |
| 621 | return 0; |
| 622 | } |
| 623 | |
| 624 | mem = malloc(sizeof *mem, M_AGP, M_WAITOK); |
| 625 | if (mem == NULL) |
| 626 | return NULL; |
| 627 | |
| 628 | if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1, |
| 629 | size, 0, BUS_DMA_NOWAIT, &mem->am_dmamap) != 0) { |
| 630 | free(mem, M_AGP); |
| 631 | return NULL; |
| 632 | } |
| 633 | |
| 634 | mem->am_id = sc->as_nextid++; |
| 635 | mem->am_size = size; |
| 636 | mem->am_type = 0; |
| 637 | mem->am_physical = 0; |
| 638 | mem->am_offset = 0; |
| 639 | mem->am_is_bound = 0; |
| 640 | TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); |
| 641 | sc->as_allocated += size; |
| 642 | |
| 643 | return mem; |
| 644 | } |
| 645 | |
| 646 | int |
| 647 | agp_generic_free_memory(struct agp_softc *sc, struct agp_memory *mem) |
| 648 | { |
| 649 | if (mem->am_is_bound) |
| 650 | return EBUSY; |
| 651 | |
| 652 | sc->as_allocated -= mem->am_size; |
| 653 | TAILQ_REMOVE(&sc->as_memory, mem, am_link); |
| 654 | bus_dmamap_destroy(sc->as_dmat, mem->am_dmamap); |
| 655 | free(mem, M_AGP); |
| 656 | return 0; |
| 657 | } |
| 658 | |
| 659 | int |
| 660 | agp_generic_bind_memory(struct agp_softc *sc, struct agp_memory *mem, |
| 661 | off_t offset) |
| 662 | { |
| 663 | |
| 664 | return agp_generic_bind_memory_bounded(sc, mem, offset, |
| 665 | 0, AGP_GET_APERTURE(sc)); |
| 666 | } |
| 667 | |
| 668 | int |
| 669 | agp_generic_bind_memory_bounded(struct agp_softc *sc, struct agp_memory *mem, |
| 670 | off_t offset, off_t start, off_t end) |
| 671 | { |
| 672 | off_t i, k; |
| 673 | bus_size_t done, j; |
| 674 | int error; |
| 675 | bus_dma_segment_t *segs, *seg; |
| 676 | bus_addr_t pa; |
| 677 | int contigpages, nseg; |
| 678 | |
| 679 | mutex_enter(&sc->as_mtx); |
| 680 | |
| 681 | if (mem->am_is_bound) { |
| 682 | aprint_error_dev(sc->as_dev, "memory already bound\n" ); |
| 683 | mutex_exit(&sc->as_mtx); |
| 684 | return EINVAL; |
| 685 | } |
| 686 | |
| 687 | if (offset < start |
| 688 | || (offset & (AGP_PAGE_SIZE - 1)) != 0 |
| 689 | || offset > end |
| 690 | || mem->am_size > (end - offset)) { |
| 691 | aprint_error_dev(sc->as_dev, |
| 692 | "binding memory at bad offset %#lx\n" , |
| 693 | (unsigned long) offset); |
| 694 | mutex_exit(&sc->as_mtx); |
| 695 | return EINVAL; |
| 696 | } |
| 697 | |
| 698 | /* |
| 699 | * XXXfvdl |
| 700 | * The memory here needs to be directly accessable from the |
| 701 | * AGP video card, so it should be allocated using bus_dma. |
| 702 | * However, it need not be contiguous, since individual pages |
| 703 | * are translated using the GATT. |
| 704 | * |
| 705 | * Using a large chunk of contiguous memory may get in the way |
| 706 | * of other subsystems that may need one, so we try to be friendly |
| 707 | * and ask for allocation in chunks of a minimum of 8 pages |
| 708 | * of contiguous memory on average, falling back to 4, 2 and 1 |
| 709 | * if really needed. Larger chunks are preferred, since allocating |
| 710 | * a bus_dma_segment per page would be overkill. |
| 711 | */ |
| 712 | |
| 713 | for (contigpages = 8; contigpages > 0; contigpages >>= 1) { |
| 714 | nseg = (mem->am_size / (contigpages * PAGE_SIZE)) + 1; |
| 715 | segs = malloc(nseg * sizeof *segs, M_AGP, M_WAITOK); |
| 716 | if (segs == NULL) { |
| 717 | mutex_exit(&sc->as_mtx); |
| 718 | return ENOMEM; |
| 719 | } |
| 720 | if (bus_dmamem_alloc(sc->as_dmat, mem->am_size, PAGE_SIZE, 0, |
| 721 | segs, nseg, &mem->am_nseg, |
| 722 | contigpages > 1 ? |
| 723 | BUS_DMA_NOWAIT : BUS_DMA_WAITOK) != 0) { |
| 724 | free(segs, M_AGP); |
| 725 | continue; |
| 726 | } |
| 727 | if (bus_dmamem_map(sc->as_dmat, segs, mem->am_nseg, |
| 728 | mem->am_size, &mem->am_virtual, BUS_DMA_WAITOK) != 0) { |
| 729 | bus_dmamem_free(sc->as_dmat, segs, mem->am_nseg); |
| 730 | free(segs, M_AGP); |
| 731 | continue; |
| 732 | } |
| 733 | if (bus_dmamap_load(sc->as_dmat, mem->am_dmamap, |
| 734 | mem->am_virtual, mem->am_size, NULL, BUS_DMA_WAITOK) != 0) { |
| 735 | bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, |
| 736 | mem->am_size); |
| 737 | bus_dmamem_free(sc->as_dmat, segs, mem->am_nseg); |
| 738 | free(segs, M_AGP); |
| 739 | continue; |
| 740 | } |
| 741 | mem->am_dmaseg = segs; |
| 742 | break; |
| 743 | } |
| 744 | |
| 745 | if (contigpages == 0) { |
| 746 | mutex_exit(&sc->as_mtx); |
| 747 | return ENOMEM; |
| 748 | } |
| 749 | |
| 750 | |
| 751 | /* |
| 752 | * Bind the individual pages and flush the chipset's |
| 753 | * TLB. |
| 754 | */ |
| 755 | done = 0; |
| 756 | for (i = 0; i < mem->am_dmamap->dm_nsegs; i++) { |
| 757 | seg = &mem->am_dmamap->dm_segs[i]; |
| 758 | /* |
| 759 | * Install entries in the GATT, making sure that if |
| 760 | * AGP_PAGE_SIZE < PAGE_SIZE and mem->am_size is not |
| 761 | * aligned to PAGE_SIZE, we don't modify too many GATT |
| 762 | * entries. |
| 763 | */ |
| 764 | for (j = 0; j < seg->ds_len && (done + j) < mem->am_size; |
| 765 | j += AGP_PAGE_SIZE) { |
| 766 | pa = seg->ds_addr + j; |
| 767 | AGP_DPF(("binding offset %#lx to pa %#lx\n" , |
| 768 | (unsigned long)(offset + done + j), |
| 769 | (unsigned long)pa)); |
| 770 | error = AGP_BIND_PAGE(sc, offset + done + j, pa); |
| 771 | if (error) { |
| 772 | /* |
| 773 | * Bail out. Reverse all the mappings |
| 774 | * and unwire the pages. |
| 775 | */ |
| 776 | for (k = 0; k < done + j; k += AGP_PAGE_SIZE) |
| 777 | AGP_UNBIND_PAGE(sc, offset + k); |
| 778 | |
| 779 | bus_dmamap_unload(sc->as_dmat, mem->am_dmamap); |
| 780 | bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, |
| 781 | mem->am_size); |
| 782 | bus_dmamem_free(sc->as_dmat, mem->am_dmaseg, |
| 783 | mem->am_nseg); |
| 784 | free(mem->am_dmaseg, M_AGP); |
| 785 | mutex_exit(&sc->as_mtx); |
| 786 | return error; |
| 787 | } |
| 788 | } |
| 789 | done += seg->ds_len; |
| 790 | } |
| 791 | |
| 792 | /* |
| 793 | * Flush the CPU cache since we are providing a new mapping |
| 794 | * for these pages. |
| 795 | */ |
| 796 | agp_flush_cache(); |
| 797 | |
| 798 | /* |
| 799 | * Make sure the chipset gets the new mappings. |
| 800 | */ |
| 801 | AGP_FLUSH_TLB(sc); |
| 802 | |
| 803 | mem->am_offset = offset; |
| 804 | mem->am_is_bound = 1; |
| 805 | |
| 806 | mutex_exit(&sc->as_mtx); |
| 807 | |
| 808 | return 0; |
| 809 | } |
| 810 | |
| 811 | int |
| 812 | agp_generic_unbind_memory(struct agp_softc *sc, struct agp_memory *mem) |
| 813 | { |
| 814 | int i; |
| 815 | |
| 816 | mutex_enter(&sc->as_mtx); |
| 817 | |
| 818 | if (!mem->am_is_bound) { |
| 819 | aprint_error_dev(sc->as_dev, "memory is not bound\n" ); |
| 820 | mutex_exit(&sc->as_mtx); |
| 821 | return EINVAL; |
| 822 | } |
| 823 | |
| 824 | |
| 825 | /* |
| 826 | * Unbind the individual pages and flush the chipset's |
| 827 | * TLB. Unwire the pages so they can be swapped. |
| 828 | */ |
| 829 | for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) |
| 830 | AGP_UNBIND_PAGE(sc, mem->am_offset + i); |
| 831 | |
| 832 | agp_flush_cache(); |
| 833 | AGP_FLUSH_TLB(sc); |
| 834 | |
| 835 | bus_dmamap_unload(sc->as_dmat, mem->am_dmamap); |
| 836 | bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, mem->am_size); |
| 837 | bus_dmamem_free(sc->as_dmat, mem->am_dmaseg, mem->am_nseg); |
| 838 | |
| 839 | free(mem->am_dmaseg, M_AGP); |
| 840 | |
| 841 | mem->am_offset = 0; |
| 842 | mem->am_is_bound = 0; |
| 843 | |
| 844 | mutex_exit(&sc->as_mtx); |
| 845 | |
| 846 | return 0; |
| 847 | } |
| 848 | |
| 849 | /* Helper functions for implementing user/kernel api */ |
| 850 | |
| 851 | static int |
| 852 | agp_acquire_helper(struct agp_softc *sc, enum agp_acquire_state state) |
| 853 | { |
| 854 | if (sc->as_state != AGP_ACQUIRE_FREE) |
| 855 | return EBUSY; |
| 856 | sc->as_state = state; |
| 857 | |
| 858 | return 0; |
| 859 | } |
| 860 | |
| 861 | static int |
| 862 | agp_release_helper(struct agp_softc *sc, enum agp_acquire_state state) |
| 863 | { |
| 864 | |
| 865 | if (sc->as_state == AGP_ACQUIRE_FREE) |
| 866 | return 0; |
| 867 | |
| 868 | if (sc->as_state != state) |
| 869 | return EBUSY; |
| 870 | |
| 871 | sc->as_state = AGP_ACQUIRE_FREE; |
| 872 | return 0; |
| 873 | } |
| 874 | |
| 875 | static struct agp_memory * |
| 876 | agp_find_memory(struct agp_softc *sc, int id) |
| 877 | { |
| 878 | struct agp_memory *mem; |
| 879 | |
| 880 | AGP_DPF(("searching for memory block %d\n" , id)); |
| 881 | TAILQ_FOREACH(mem, &sc->as_memory, am_link) { |
| 882 | AGP_DPF(("considering memory block %d\n" , mem->am_id)); |
| 883 | if (mem->am_id == id) |
| 884 | return mem; |
| 885 | } |
| 886 | return 0; |
| 887 | } |
| 888 | |
| 889 | /* Implementation of the userland ioctl api */ |
| 890 | |
| 891 | static int |
| 892 | agp_info_user(struct agp_softc *sc, agp_info *info) |
| 893 | { |
| 894 | memset(info, 0, sizeof *info); |
| 895 | info->bridge_id = sc->as_id; |
| 896 | if (sc->as_capoff != 0) |
| 897 | info->agp_mode = pci_conf_read(sc->as_pc, sc->as_tag, |
| 898 | sc->as_capoff + AGP_STATUS); |
| 899 | else |
| 900 | info->agp_mode = 0; /* i810 doesn't have real AGP */ |
| 901 | info->aper_base = sc->as_apaddr; |
| 902 | info->aper_size = AGP_GET_APERTURE(sc) >> 20; |
| 903 | info->pg_total = info->pg_system = sc->as_maxmem >> AGP_PAGE_SHIFT; |
| 904 | info->pg_used = sc->as_allocated >> AGP_PAGE_SHIFT; |
| 905 | |
| 906 | return 0; |
| 907 | } |
| 908 | |
| 909 | static int |
| 910 | agp_setup_user(struct agp_softc *sc, agp_setup *setup) |
| 911 | { |
| 912 | return AGP_ENABLE(sc, setup->agp_mode); |
| 913 | } |
| 914 | |
| 915 | static int |
| 916 | agp_allocate_user(struct agp_softc *sc, agp_allocate *alloc) |
| 917 | { |
| 918 | struct agp_memory *mem; |
| 919 | |
| 920 | mem = AGP_ALLOC_MEMORY(sc, |
| 921 | alloc->type, |
| 922 | alloc->pg_count << AGP_PAGE_SHIFT); |
| 923 | if (mem) { |
| 924 | alloc->key = mem->am_id; |
| 925 | alloc->physical = mem->am_physical; |
| 926 | return 0; |
| 927 | } else { |
| 928 | return ENOMEM; |
| 929 | } |
| 930 | } |
| 931 | |
| 932 | static int |
| 933 | agp_deallocate_user(struct agp_softc *sc, int id) |
| 934 | { |
| 935 | struct agp_memory *mem = agp_find_memory(sc, id); |
| 936 | |
| 937 | if (mem) { |
| 938 | AGP_FREE_MEMORY(sc, mem); |
| 939 | return 0; |
| 940 | } else { |
| 941 | return ENOENT; |
| 942 | } |
| 943 | } |
| 944 | |
| 945 | static int |
| 946 | agp_bind_user(struct agp_softc *sc, agp_bind *bind) |
| 947 | { |
| 948 | struct agp_memory *mem = agp_find_memory(sc, bind->key); |
| 949 | |
| 950 | if (!mem) |
| 951 | return ENOENT; |
| 952 | |
| 953 | return AGP_BIND_MEMORY(sc, mem, bind->pg_start << AGP_PAGE_SHIFT); |
| 954 | } |
| 955 | |
| 956 | static int |
| 957 | agp_unbind_user(struct agp_softc *sc, agp_unbind *unbind) |
| 958 | { |
| 959 | struct agp_memory *mem = agp_find_memory(sc, unbind->key); |
| 960 | |
| 961 | if (!mem) |
| 962 | return ENOENT; |
| 963 | |
| 964 | return AGP_UNBIND_MEMORY(sc, mem); |
| 965 | } |
| 966 | |
| 967 | static int |
| 968 | agpopen(dev_t dev, int oflags, int devtype, struct lwp *l) |
| 969 | { |
| 970 | struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); |
| 971 | |
| 972 | if (sc == NULL) |
| 973 | return ENXIO; |
| 974 | |
| 975 | if (sc->as_chipc == NULL) |
| 976 | return ENXIO; |
| 977 | |
| 978 | if (!sc->as_isopen) |
| 979 | sc->as_isopen = 1; |
| 980 | else |
| 981 | return EBUSY; |
| 982 | |
| 983 | return 0; |
| 984 | } |
| 985 | |
| 986 | static int |
| 987 | agpclose(dev_t dev, int fflag, int devtype, struct lwp *l) |
| 988 | { |
| 989 | struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); |
| 990 | struct agp_memory *mem; |
| 991 | |
| 992 | if (sc == NULL) |
| 993 | return ENODEV; |
| 994 | |
| 995 | /* |
| 996 | * Clear the GATT and force release on last close |
| 997 | */ |
| 998 | if (sc->as_state == AGP_ACQUIRE_USER) { |
| 999 | while ((mem = TAILQ_FIRST(&sc->as_memory))) { |
| 1000 | if (mem->am_is_bound) { |
| 1001 | printf("agpclose: mem %d is bound\n" , |
| 1002 | mem->am_id); |
| 1003 | AGP_UNBIND_MEMORY(sc, mem); |
| 1004 | } |
| 1005 | /* |
| 1006 | * XXX it is not documented, but if the protocol allows |
| 1007 | * allocate->acquire->bind, it would be possible that |
| 1008 | * memory ranges are allocated by the kernel here, |
| 1009 | * which we shouldn't free. We'd have to keep track of |
| 1010 | * the memory range's owner. |
| 1011 | * The kernel API is unsed yet, so we get away with |
| 1012 | * freeing all. |
| 1013 | */ |
| 1014 | AGP_FREE_MEMORY(sc, mem); |
| 1015 | } |
| 1016 | agp_release_helper(sc, AGP_ACQUIRE_USER); |
| 1017 | } |
| 1018 | sc->as_isopen = 0; |
| 1019 | |
| 1020 | return 0; |
| 1021 | } |
| 1022 | |
| 1023 | static int |
| 1024 | agpioctl(dev_t dev, u_long cmd, void *data, int fflag, struct lwp *l) |
| 1025 | { |
| 1026 | struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); |
| 1027 | |
| 1028 | if (sc == NULL) |
| 1029 | return ENODEV; |
| 1030 | |
| 1031 | if ((fflag & FWRITE) == 0 && cmd != AGPIOC_INFO) |
| 1032 | return EPERM; |
| 1033 | |
| 1034 | switch (cmd) { |
| 1035 | case AGPIOC_INFO: |
| 1036 | return agp_info_user(sc, (agp_info *) data); |
| 1037 | |
| 1038 | case AGPIOC_ACQUIRE: |
| 1039 | return agp_acquire_helper(sc, AGP_ACQUIRE_USER); |
| 1040 | |
| 1041 | case AGPIOC_RELEASE: |
| 1042 | return agp_release_helper(sc, AGP_ACQUIRE_USER); |
| 1043 | |
| 1044 | case AGPIOC_SETUP: |
| 1045 | return agp_setup_user(sc, (agp_setup *)data); |
| 1046 | |
| 1047 | #ifdef __x86_64__ |
| 1048 | { |
| 1049 | /* |
| 1050 | * Handle paddr_t change from 32 bit for non PAE kernels |
| 1051 | * to 64 bit. |
| 1052 | */ |
| 1053 | #define AGPIOC_OALLOCATE _IOWR(AGPIOC_BASE, 6, agp_oallocate) |
| 1054 | |
| 1055 | typedef struct _agp_oallocate { |
| 1056 | int key; /* tag of allocation */ |
| 1057 | size_t pg_count; /* number of pages */ |
| 1058 | uint32_t type; /* 0 == normal, other devspec */ |
| 1059 | u_long physical; /* device specific (some devices |
| 1060 | * need a phys address of the |
| 1061 | * actual page behind the gatt |
| 1062 | * table) */ |
| 1063 | } agp_oallocate; |
| 1064 | |
| 1065 | case AGPIOC_OALLOCATE: { |
| 1066 | int ret; |
| 1067 | agp_allocate aga; |
| 1068 | agp_oallocate *oaga = data; |
| 1069 | |
| 1070 | aga.type = oaga->type; |
| 1071 | aga.pg_count = oaga->pg_count; |
| 1072 | |
| 1073 | if ((ret = agp_allocate_user(sc, &aga)) == 0) { |
| 1074 | oaga->key = aga.key; |
| 1075 | oaga->physical = (u_long)aga.physical; |
| 1076 | } |
| 1077 | |
| 1078 | return ret; |
| 1079 | } |
| 1080 | } |
| 1081 | #endif |
| 1082 | case AGPIOC_ALLOCATE: |
| 1083 | return agp_allocate_user(sc, (agp_allocate *)data); |
| 1084 | |
| 1085 | case AGPIOC_DEALLOCATE: |
| 1086 | return agp_deallocate_user(sc, *(int *) data); |
| 1087 | |
| 1088 | case AGPIOC_BIND: |
| 1089 | return agp_bind_user(sc, (agp_bind *)data); |
| 1090 | |
| 1091 | case AGPIOC_UNBIND: |
| 1092 | return agp_unbind_user(sc, (agp_unbind *)data); |
| 1093 | |
| 1094 | } |
| 1095 | |
| 1096 | return EINVAL; |
| 1097 | } |
| 1098 | |
| 1099 | static paddr_t |
| 1100 | agpmmap(dev_t dev, off_t offset, int prot) |
| 1101 | { |
| 1102 | struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); |
| 1103 | |
| 1104 | if (sc == NULL) |
| 1105 | return ENODEV; |
| 1106 | |
| 1107 | if (offset > AGP_GET_APERTURE(sc)) |
| 1108 | return -1; |
| 1109 | |
| 1110 | return (bus_space_mmap(sc->as_apt, sc->as_apaddr, offset, prot, |
| 1111 | BUS_SPACE_MAP_LINEAR)); |
| 1112 | } |
| 1113 | |
| 1114 | const struct cdevsw agp_cdevsw = { |
| 1115 | .d_open = agpopen, |
| 1116 | .d_close = agpclose, |
| 1117 | .d_read = noread, |
| 1118 | .d_write = nowrite, |
| 1119 | .d_ioctl = agpioctl, |
| 1120 | .d_stop = nostop, |
| 1121 | .d_tty = notty, |
| 1122 | .d_poll = nopoll, |
| 1123 | .d_mmap = agpmmap, |
| 1124 | .d_kqfilter = nokqfilter, |
| 1125 | .d_discard = nodiscard, |
| 1126 | .d_flag = D_OTHER |
| 1127 | }; |
| 1128 | |
| 1129 | /* Implementation of the kernel api */ |
| 1130 | |
| 1131 | void * |
| 1132 | agp_find_device(int unit) |
| 1133 | { |
| 1134 | return device_lookup_private(&agp_cd, unit); |
| 1135 | } |
| 1136 | |
| 1137 | enum agp_acquire_state |
| 1138 | agp_state(void *devcookie) |
| 1139 | { |
| 1140 | struct agp_softc *sc = devcookie; |
| 1141 | |
| 1142 | return sc->as_state; |
| 1143 | } |
| 1144 | |
| 1145 | void |
| 1146 | agp_get_info(void *devcookie, struct agp_info *info) |
| 1147 | { |
| 1148 | struct agp_softc *sc = devcookie; |
| 1149 | |
| 1150 | info->ai_mode = pci_conf_read(sc->as_pc, sc->as_tag, |
| 1151 | sc->as_capoff + AGP_STATUS); |
| 1152 | info->ai_aperture_base = sc->as_apaddr; |
| 1153 | info->ai_aperture_size = sc->as_apsize; /* XXXfvdl inconsistent */ |
| 1154 | info->ai_memory_allowed = sc->as_maxmem; |
| 1155 | info->ai_memory_used = sc->as_allocated; |
| 1156 | } |
| 1157 | |
| 1158 | int |
| 1159 | agp_acquire(void *dev) |
| 1160 | { |
| 1161 | return agp_acquire_helper(dev, AGP_ACQUIRE_KERNEL); |
| 1162 | } |
| 1163 | |
| 1164 | int |
| 1165 | agp_release(void *dev) |
| 1166 | { |
| 1167 | return agp_release_helper(dev, AGP_ACQUIRE_KERNEL); |
| 1168 | } |
| 1169 | |
| 1170 | int |
| 1171 | agp_enable(void *dev, u_int32_t mode) |
| 1172 | { |
| 1173 | struct agp_softc *sc = dev; |
| 1174 | |
| 1175 | return AGP_ENABLE(sc, mode); |
| 1176 | } |
| 1177 | |
| 1178 | void * |
| 1179 | agp_alloc_memory(void *dev, int type, vsize_t bytes) |
| 1180 | { |
| 1181 | struct agp_softc *sc = dev; |
| 1182 | |
| 1183 | return (void *)AGP_ALLOC_MEMORY(sc, type, bytes); |
| 1184 | } |
| 1185 | |
| 1186 | void |
| 1187 | agp_free_memory(void *dev, void *handle) |
| 1188 | { |
| 1189 | struct agp_softc *sc = dev; |
| 1190 | struct agp_memory *mem = handle; |
| 1191 | |
| 1192 | AGP_FREE_MEMORY(sc, mem); |
| 1193 | } |
| 1194 | |
| 1195 | int |
| 1196 | agp_bind_memory(void *dev, void *handle, off_t offset) |
| 1197 | { |
| 1198 | struct agp_softc *sc = dev; |
| 1199 | struct agp_memory *mem = handle; |
| 1200 | |
| 1201 | return AGP_BIND_MEMORY(sc, mem, offset); |
| 1202 | } |
| 1203 | |
| 1204 | int |
| 1205 | agp_unbind_memory(void *dev, void *handle) |
| 1206 | { |
| 1207 | struct agp_softc *sc = dev; |
| 1208 | struct agp_memory *mem = handle; |
| 1209 | |
| 1210 | return AGP_UNBIND_MEMORY(sc, mem); |
| 1211 | } |
| 1212 | |
| 1213 | void |
| 1214 | agp_memory_info(void *dev, void *handle, struct agp_memory_info *mi) |
| 1215 | { |
| 1216 | struct agp_memory *mem = handle; |
| 1217 | |
| 1218 | mi->ami_size = mem->am_size; |
| 1219 | mi->ami_physical = mem->am_physical; |
| 1220 | mi->ami_offset = mem->am_offset; |
| 1221 | mi->ami_is_bound = mem->am_is_bound; |
| 1222 | } |
| 1223 | |
| 1224 | int |
| 1225 | agp_alloc_dmamem(bus_dma_tag_t tag, size_t size, int flags, |
| 1226 | bus_dmamap_t *mapp, void **vaddr, bus_addr_t *baddr, |
| 1227 | bus_dma_segment_t *seg, int nseg, int *rseg) |
| 1228 | |
| 1229 | { |
| 1230 | int error, level = 0; |
| 1231 | |
| 1232 | if ((error = bus_dmamem_alloc(tag, size, PAGE_SIZE, 0, |
| 1233 | seg, nseg, rseg, BUS_DMA_NOWAIT)) != 0) |
| 1234 | goto out; |
| 1235 | level++; |
| 1236 | |
| 1237 | if ((error = bus_dmamem_map(tag, seg, *rseg, size, vaddr, |
| 1238 | BUS_DMA_NOWAIT | flags)) != 0) |
| 1239 | goto out; |
| 1240 | level++; |
| 1241 | |
| 1242 | if ((error = bus_dmamap_create(tag, size, *rseg, size, 0, |
| 1243 | BUS_DMA_NOWAIT, mapp)) != 0) |
| 1244 | goto out; |
| 1245 | level++; |
| 1246 | |
| 1247 | if ((error = bus_dmamap_load(tag, *mapp, *vaddr, size, NULL, |
| 1248 | BUS_DMA_NOWAIT)) != 0) |
| 1249 | goto out; |
| 1250 | |
| 1251 | *baddr = (*mapp)->dm_segs[0].ds_addr; |
| 1252 | |
| 1253 | return 0; |
| 1254 | out: |
| 1255 | switch (level) { |
| 1256 | case 3: |
| 1257 | bus_dmamap_destroy(tag, *mapp); |
| 1258 | /* FALLTHROUGH */ |
| 1259 | case 2: |
| 1260 | bus_dmamem_unmap(tag, *vaddr, size); |
| 1261 | /* FALLTHROUGH */ |
| 1262 | case 1: |
| 1263 | bus_dmamem_free(tag, seg, *rseg); |
| 1264 | break; |
| 1265 | default: |
| 1266 | break; |
| 1267 | } |
| 1268 | |
| 1269 | return error; |
| 1270 | } |
| 1271 | |
| 1272 | void |
| 1273 | agp_free_dmamem(bus_dma_tag_t tag, size_t size, bus_dmamap_t map, |
| 1274 | void *vaddr, bus_dma_segment_t *seg, int nseg) |
| 1275 | { |
| 1276 | bus_dmamap_unload(tag, map); |
| 1277 | bus_dmamap_destroy(tag, map); |
| 1278 | bus_dmamem_unmap(tag, vaddr, size); |
| 1279 | bus_dmamem_free(tag, seg, nseg); |
| 1280 | } |
| 1281 | |
| 1282 | static bool |
| 1283 | agp_resume(device_t dv, const pmf_qual_t *qual) |
| 1284 | { |
| 1285 | agp_flush_cache(); |
| 1286 | |
| 1287 | return true; |
| 1288 | } |
| 1289 | |