| 1 | /* $NetBSD: ninjaata32var.h,v 1.5 2011/02/21 02:32:00 itohy Exp $ */ |
| 2 | |
| 3 | /* |
| 4 | * Copyright (c) 2006 ITOH Yasufumi. |
| 5 | * All rights reserved. |
| 6 | * |
| 7 | * Redistribution and use in source and binary forms, with or without |
| 8 | * modification, are permitted provided that the following conditions |
| 9 | * are met: |
| 10 | * 1. Redistributions of source code must retain the above copyright |
| 11 | * notice, this list of conditions and the following disclaimer. |
| 12 | * 2. Redistributions in binary form must reproduce the above copyright |
| 13 | * notice, this list of conditions and the following disclaimer in the |
| 14 | * documentation and/or other materials provided with the distribution. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' |
| 17 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, |
| 18 | * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 19 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS |
| 20 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 21 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 22 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 23 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 24 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 25 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF |
| 26 | * THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
| 28 | |
| 29 | #ifndef _NJATA32VAR_H_ |
| 30 | #define _NJATA32VAR_H_ |
| 31 | |
| 32 | #define NJATA32NAME(sc) (device_xname(sc->sc_wdcdev.sc_atac.atac_dev)) |
| 33 | |
| 34 | /* ??? */ |
| 35 | #define NJATA32_MAX_XFER (64 * 1024) |
| 36 | |
| 37 | /* |
| 38 | * DMA page |
| 39 | */ |
| 40 | /* # device */ |
| 41 | #define NJATA32_NUM_DEV 2 |
| 42 | /* # scatter/gather table entries */ |
| 43 | #define NJATA32_NUM_SG NJATA32_SGT_MAXENTRY |
| 44 | |
| 45 | struct njata32_dma_page { |
| 46 | /* |
| 47 | * scatter/gather transfer table |
| 48 | */ |
| 49 | struct njata32_sgtable dp_sg[NJATA32_NUM_DEV][NJATA32_NUM_SG]; |
| 50 | }; |
| 51 | |
| 52 | #define NJATA32_NCHAN 1 /* only one channel */ |
| 53 | |
| 54 | struct njata32_softc { |
| 55 | struct wdc_softc sc_wdcdev; /* common wdc definitions */ |
| 56 | |
| 57 | unsigned sc_flags; |
| 58 | #define NJATA32_IO_MAPPED 0x00000001 |
| 59 | #define NJATA32_MEM_MAPPED 0x00000002 |
| 60 | #define NJATA32_CMDPG_MAPPED 0x00000004 |
| 61 | |
| 62 | unsigned sc_devflags; |
| 63 | |
| 64 | /* interrupt handle */ |
| 65 | void *sc_ih; |
| 66 | |
| 67 | struct ninjaata32_channel { /* per-channel data */ |
| 68 | struct ata_channel ch_ata_channel; /* generic part */ |
| 69 | } sc_ch[NJATA32_NCHAN]; |
| 70 | |
| 71 | struct ata_channel *sc_wdc_chanarray[NJATA32_NCHAN]; |
| 72 | struct ata_queue sc_wdc_chqueue; |
| 73 | struct wdc_regs sc_wdc_regs; |
| 74 | #define NJATA32_REGT(sc) (sc)->sc_wdc_regs.cmd_iot |
| 75 | #define NJATA32_REGH(sc) (sc)->sc_wdc_regs.cmd_baseioh |
| 76 | |
| 77 | /* for DMA */ |
| 78 | bus_dma_tag_t sc_dmat; |
| 79 | struct njata32_dma_page *sc_sgtpg; /* scatter/gather table page */ |
| 80 | #if 0 |
| 81 | bus_addr_t sc_sgt_dma; |
| 82 | #endif |
| 83 | bus_dma_segment_t sc_sgt_seg; |
| 84 | bus_dmamap_t sc_dmamap_sgt; |
| 85 | int sc_sgt_nsegs; |
| 86 | |
| 87 | int sc_piobm_nsegs; |
| 88 | |
| 89 | uint8_t sc_timing_pio; |
| 90 | #if 0 /* ATA DMA is currently unused */ |
| 91 | uint8_t sc_timing_dma; |
| 92 | #endif |
| 93 | |
| 94 | uint8_t sc_atawait; |
| 95 | |
| 96 | /* per-device structure */ |
| 97 | struct njata32_device { |
| 98 | /* DMA resource */ |
| 99 | struct njata32_sgtable *d_sgt; /* for host */ |
| 100 | bus_addr_t d_sgt_dma; /* for device */ |
| 101 | bus_dmamap_t d_dmamap_xfer; |
| 102 | unsigned d_flags; |
| 103 | #define NJATA32_DEV_DMA_MAPPED 0x0001 |
| 104 | #define NJATA32_DEV_DMA_READ 0x0002 |
| 105 | #define NJATA32_DEV_DMA_ATAPI 0x0004 |
| 106 | #define NJATA32_DEV_XFER_INTR 0x0100 /* only for sc_devflags */ |
| 107 | #define NJATA32_DEV_GOT_XFER_INTR 0x0200 /* only for sc_devflags */ |
| 108 | #define NJATA32_DEV_DMA_STARTED 0x8000 /* for diag */ |
| 109 | } sc_dev[NJATA32_NUM_DEV]; |
| 110 | }; |
| 111 | |
| 112 | #ifdef _KERNEL |
| 113 | void njata32_attach(struct njata32_softc *); |
| 114 | int njata32_detach(struct njata32_softc *, int); |
| 115 | int njata32_intr(void *); |
| 116 | #endif |
| 117 | |
| 118 | #endif /* _NJATA32VAR_H_ */ |
| 119 | |