| 1 | #ifndef __NVKM_FBRAM_FUC_H__ |
| 2 | #define __NVKM_FBRAM_FUC_H__ |
| 3 | |
| 4 | #include <subdev/pwr.h> |
| 5 | |
| 6 | struct ramfuc { |
| 7 | struct nouveau_memx *memx; |
| 8 | struct nouveau_fb *pfb; |
| 9 | int sequence; |
| 10 | }; |
| 11 | |
| 12 | struct ramfuc_reg { |
| 13 | int sequence; |
| 14 | bool force; |
| 15 | u32 addr[2]; |
| 16 | u32 data; |
| 17 | }; |
| 18 | |
| 19 | static inline struct ramfuc_reg |
| 20 | ramfuc_reg2(u32 addr1, u32 addr2) |
| 21 | { |
| 22 | return (struct ramfuc_reg) { |
| 23 | .sequence = 0, |
| 24 | .addr = { addr1, addr2 }, |
| 25 | .data = 0xdeadbeef, |
| 26 | }; |
| 27 | } |
| 28 | |
| 29 | static inline struct ramfuc_reg |
| 30 | ramfuc_reg(u32 addr) |
| 31 | { |
| 32 | return ramfuc_reg2(addr, addr); |
| 33 | } |
| 34 | |
| 35 | static inline int |
| 36 | ramfuc_init(struct ramfuc *ram, struct nouveau_fb *pfb) |
| 37 | { |
| 38 | struct nouveau_pwr *ppwr = nouveau_pwr(pfb); |
| 39 | int ret; |
| 40 | |
| 41 | ret = nouveau_memx_init(ppwr, &ram->memx); |
| 42 | if (ret) |
| 43 | return ret; |
| 44 | |
| 45 | ram->sequence++; |
| 46 | ram->pfb = pfb; |
| 47 | return 0; |
| 48 | } |
| 49 | |
| 50 | static inline int |
| 51 | ramfuc_exec(struct ramfuc *ram, bool exec) |
| 52 | { |
| 53 | int ret = 0; |
| 54 | if (ram->pfb) { |
| 55 | ret = nouveau_memx_fini(&ram->memx, exec); |
| 56 | ram->pfb = NULL; |
| 57 | } |
| 58 | return ret; |
| 59 | } |
| 60 | |
| 61 | static inline u32 |
| 62 | ramfuc_rd32(struct ramfuc *ram, struct ramfuc_reg *reg) |
| 63 | { |
| 64 | if (reg->sequence != ram->sequence) |
| 65 | reg->data = nv_rd32(ram->pfb, reg->addr[0]); |
| 66 | return reg->data; |
| 67 | } |
| 68 | |
| 69 | static inline void |
| 70 | ramfuc_wr32(struct ramfuc *ram, struct ramfuc_reg *reg, u32 data) |
| 71 | { |
| 72 | reg->sequence = ram->sequence; |
| 73 | reg->data = data; |
| 74 | if (reg->addr[0] != reg->addr[1]) |
| 75 | nouveau_memx_wr32(ram->memx, reg->addr[1], reg->data); |
| 76 | nouveau_memx_wr32(ram->memx, reg->addr[0], reg->data); |
| 77 | } |
| 78 | |
| 79 | static inline void |
| 80 | ramfuc_nuke(struct ramfuc *ram, struct ramfuc_reg *reg) |
| 81 | { |
| 82 | reg->force = true; |
| 83 | } |
| 84 | |
| 85 | static inline u32 |
| 86 | ramfuc_mask(struct ramfuc *ram, struct ramfuc_reg *reg, u32 mask, u32 data) |
| 87 | { |
| 88 | u32 temp = ramfuc_rd32(ram, reg); |
| 89 | if (temp != ((temp & ~mask) | data) || reg->force) { |
| 90 | ramfuc_wr32(ram, reg, (temp & ~mask) | data); |
| 91 | reg->force = false; |
| 92 | } |
| 93 | return temp; |
| 94 | } |
| 95 | |
| 96 | static inline void |
| 97 | ramfuc_wait(struct ramfuc *ram, u32 addr, u32 mask, u32 data, u32 nsec) |
| 98 | { |
| 99 | nouveau_memx_wait(ram->memx, addr, mask, data, nsec); |
| 100 | } |
| 101 | |
| 102 | static inline void |
| 103 | ramfuc_nsec(struct ramfuc *ram, u32 nsec) |
| 104 | { |
| 105 | nouveau_memx_nsec(ram->memx, nsec); |
| 106 | } |
| 107 | |
| 108 | #define ram_init(s,p) ramfuc_init(&(s)->base, (p)) |
| 109 | #define ram_exec(s,e) ramfuc_exec(&(s)->base, (e)) |
| 110 | #define ram_have(s,r) ((s)->r_##r.addr != 0x000000) |
| 111 | #define ram_rd32(s,r) ramfuc_rd32(&(s)->base, &(s)->r_##r) |
| 112 | #define ram_wr32(s,r,d) ramfuc_wr32(&(s)->base, &(s)->r_##r, (d)) |
| 113 | #define ram_nuke(s,r) ramfuc_nuke(&(s)->base, &(s)->r_##r) |
| 114 | #define ram_mask(s,r,m,d) ramfuc_mask(&(s)->base, &(s)->r_##r, (m), (d)) |
| 115 | #define ram_wait(s,r,m,d,n) ramfuc_wait(&(s)->base, (r), (m), (d), (n)) |
| 116 | #define ram_nsec(s,n) ramfuc_nsec(&(s)->base, (n)) |
| 117 | |
| 118 | #endif |
| 119 | |