| 1 | /* |
| 2 | * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice shall be included in |
| 12 | * all copies or substantial portions of the Software. |
| 13 | * |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 17 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 20 | * DEALINGS IN THE SOFTWARE. |
| 21 | */ |
| 22 | |
| 23 | #include "priv.h" |
| 24 | |
| 25 | #include <subdev/fb.h> |
| 26 | #include <linux/mm.h> |
| 27 | |
| 28 | struct gk20a_mem { |
| 29 | struct nouveau_mem base; |
| 30 | void *cpuaddr; |
| 31 | dma_addr_t handle; |
| 32 | #if defined(__NetBSD__) |
| 33 | bus_dma_segment_t dmaseg; |
| 34 | bus_size_t dmasize; |
| 35 | #endif |
| 36 | }; |
| 37 | #define to_gk20a_mem(m) container_of(m, struct gk20a_mem, base) |
| 38 | |
| 39 | static void |
| 40 | gk20a_ram_put(struct nouveau_fb *pfb, struct nouveau_mem **pmem) |
| 41 | { |
| 42 | struct gk20a_mem *mem = to_gk20a_mem(*pmem); |
| 43 | |
| 44 | *pmem = NULL; |
| 45 | if (unlikely(mem == NULL)) |
| 46 | return; |
| 47 | |
| 48 | #if defined(__NetBSD__) |
| 49 | if (likely(mem->base.pages)) { |
| 50 | const bus_dma_tag_t dmat = nv_device(pfb)->platformdev->dmat; |
| 51 | bus_dmamap_unload(dmat, mem->base.pages); |
| 52 | bus_dmamem_unmap(dmat, mem->cpuaddr, mem->dmasize); |
| 53 | bus_dmamap_destroy(dmat, mem->base.pages); |
| 54 | bus_dmamem_free(dmat, &mem->dmaseg, 1); |
| 55 | } |
| 56 | #else |
| 57 | struct device *dev = nv_device_base(nv_device(pfb)); |
| 58 | if (likely(mem->cpuaddr)) |
| 59 | dma_free_coherent(dev, mem->base.size << PAGE_SHIFT, |
| 60 | mem->cpuaddr, mem->handle); |
| 61 | |
| 62 | kfree(mem->base.pages); |
| 63 | #endif |
| 64 | kfree(mem); |
| 65 | } |
| 66 | |
| 67 | static int |
| 68 | gk20a_ram_get(struct nouveau_fb *pfb, u64 size, u32 align, u32 ncmin, |
| 69 | u32 memtype, struct nouveau_mem **pmem) |
| 70 | { |
| 71 | #if !defined(__NetBSD__) |
| 72 | struct device *dev = nv_device_base(nv_device(pfb)); |
| 73 | int i; |
| 74 | #endif |
| 75 | struct gk20a_mem *mem; |
| 76 | u32 type = memtype & 0xff; |
| 77 | u32 npages, order; |
| 78 | |
| 79 | nv_debug(pfb, "%s: size: %llx align: %x, ncmin: %x\n" , __func__, |
| 80 | (unsigned long long)size, align, ncmin); |
| 81 | |
| 82 | npages = size >> PAGE_SHIFT; |
| 83 | if (npages == 0) |
| 84 | npages = 1; |
| 85 | |
| 86 | if (align == 0) |
| 87 | align = PAGE_SIZE; |
| 88 | align >>= PAGE_SHIFT; |
| 89 | |
| 90 | /* round alignment to the next power of 2, if needed */ |
| 91 | #if defined(__NetBSD__) |
| 92 | order = fls32(align); |
| 93 | #else |
| 94 | order = fls(align); |
| 95 | #endif |
| 96 | if ((align & (align - 1)) == 0) |
| 97 | order--; |
| 98 | align = BIT(order); |
| 99 | |
| 100 | /* ensure returned address is correctly aligned */ |
| 101 | npages = max(align, npages); |
| 102 | |
| 103 | mem = kzalloc(sizeof(*mem), GFP_KERNEL); |
| 104 | if (!mem) |
| 105 | return -ENOMEM; |
| 106 | |
| 107 | mem->base.size = npages; |
| 108 | mem->base.memtype = type; |
| 109 | |
| 110 | #if defined(__NetBSD__) |
| 111 | int ret, nsegs; |
| 112 | |
| 113 | if (align == 0) |
| 114 | align = PAGE_SIZE; |
| 115 | |
| 116 | const bus_dma_tag_t dmat = nv_device(pfb)->platformdev->dmat; |
| 117 | const bus_size_t dmasize = npages << PAGE_SHIFT; |
| 118 | |
| 119 | ret = -bus_dmamem_alloc(dmat, dmasize, align, 0, |
| 120 | &mem->dmaseg, 1, &nsegs, BUS_DMA_WAITOK); |
| 121 | if (ret) { |
| 122 | fail0: kfree(mem); |
| 123 | return ret; |
| 124 | } |
| 125 | KASSERT(nsegs == 1); |
| 126 | |
| 127 | ret = -bus_dmamap_create(dmat, dmasize, nsegs, dmasize, 0, |
| 128 | BUS_DMA_WAITOK, &mem->base.pages); |
| 129 | if (ret) { |
| 130 | fail1: bus_dmamem_free(dmat, &mem->dmaseg, nsegs); |
| 131 | goto fail0; |
| 132 | } |
| 133 | |
| 134 | ret = -bus_dmamem_map(dmat, &mem->dmaseg, nsegs, dmasize, |
| 135 | &mem->cpuaddr, BUS_DMA_WAITOK | BUS_DMA_COHERENT); |
| 136 | if (ret) { |
| 137 | fail2: bus_dmamap_destroy(dmat, mem->base.pages); |
| 138 | goto fail1; |
| 139 | } |
| 140 | memset(mem->cpuaddr, 0, dmasize); |
| 141 | |
| 142 | ret = -bus_dmamap_load(dmat, mem->base.pages, mem->cpuaddr, |
| 143 | dmasize, NULL, BUS_DMA_WAITOK); |
| 144 | if (ret) { |
| 145 | fail3: __unused bus_dmamem_unmap(dmat, mem->cpuaddr, dmasize); |
| 146 | goto fail2; |
| 147 | } |
| 148 | |
| 149 | nv_debug(pfb, "alloc size: 0x%x, align: 0x%x, paddr: %" PRIxPADDR |
| 150 | ", vaddr: %p\n" , npages << PAGE_SHIFT, align, |
| 151 | mem->base.pages->dm_segs[0].ds_addr, mem->cpuaddr); |
| 152 | |
| 153 | mem->dmasize = dmasize; |
| 154 | mem->base.offset = (u64)mem->base.pages->dm_segs[0].ds_addr; |
| 155 | *pmem = &mem->base; |
| 156 | #else |
| 157 | mem->base.pages = kzalloc(sizeof(dma_addr_t) * npages, GFP_KERNEL); |
| 158 | if (!mem->base.pages) { |
| 159 | kfree(mem); |
| 160 | return -ENOMEM; |
| 161 | } |
| 162 | |
| 163 | *pmem = &mem->base; |
| 164 | |
| 165 | mem->cpuaddr = dma_alloc_coherent(dev, npages << PAGE_SHIFT, |
| 166 | &mem->handle, GFP_KERNEL); |
| 167 | if (!mem->cpuaddr) { |
| 168 | nv_error(pfb, "%s: cannot allocate memory!\n" , __func__); |
| 169 | gk20a_ram_put(pfb, pmem); |
| 170 | return -ENOMEM; |
| 171 | } |
| 172 | |
| 173 | align <<= PAGE_SHIFT; |
| 174 | |
| 175 | /* alignment check */ |
| 176 | if (unlikely(mem->handle & (align - 1))) |
| 177 | nv_warn(pfb, "memory not aligned as requested: %pad (0x%x)\n" , |
| 178 | &mem->handle, align); |
| 179 | |
| 180 | nv_debug(pfb, "alloc size: 0x%x, align: 0x%x, paddr: %pad, vaddr: %p\n" , |
| 181 | npages << PAGE_SHIFT, align, &mem->handle, mem->cpuaddr); |
| 182 | |
| 183 | for (i = 0; i < npages; i++) |
| 184 | mem->base.pages[i] = mem->handle + (PAGE_SIZE * i); |
| 185 | |
| 186 | mem->base.offset = (u64)mem->base.pages[0]; |
| 187 | #endif |
| 188 | |
| 189 | return 0; |
| 190 | } |
| 191 | |
| 192 | static int |
| 193 | gk20a_ram_ctor(struct nouveau_object *parent, struct nouveau_object *engine, |
| 194 | struct nouveau_oclass *oclass, void *data, u32 datasize, |
| 195 | struct nouveau_object **pobject) |
| 196 | { |
| 197 | struct nouveau_ram *ram; |
| 198 | int ret; |
| 199 | |
| 200 | ret = nouveau_ram_create(parent, engine, oclass, &ram); |
| 201 | *pobject = nv_object(ram); |
| 202 | if (ret) |
| 203 | return ret; |
| 204 | ram->type = NV_MEM_TYPE_STOLEN; |
| 205 | ram->size = get_num_physpages() << PAGE_SHIFT; |
| 206 | |
| 207 | ram->get = gk20a_ram_get; |
| 208 | ram->put = gk20a_ram_put; |
| 209 | |
| 210 | return 0; |
| 211 | } |
| 212 | |
| 213 | struct nouveau_oclass |
| 214 | gk20a_ram_oclass = { |
| 215 | .ofuncs = &(struct nouveau_ofuncs) { |
| 216 | .ctor = gk20a_ram_ctor, |
| 217 | .dtor = _nouveau_ram_dtor, |
| 218 | .init = _nouveau_ram_init, |
| 219 | .fini = _nouveau_ram_fini, |
| 220 | }, |
| 221 | }; |
| 222 | |