| 1 | /* $NetBSD: nouveau_subdev_therm_nv50.c,v 1.1.1.1 2014/08/06 12:36:32 riastradh Exp $ */ |
| 2 | |
| 3 | /* |
| 4 | * Copyright 2012 Red Hat Inc. |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 7 | * copy of this software and associated documentation files (the "Software"), |
| 8 | * to deal in the Software without restriction, including without limitation |
| 9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 10 | * and/or sell copies of the Software, and to permit persons to whom the |
| 11 | * Software is furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in |
| 14 | * all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 22 | * OTHER DEALINGS IN THE SOFTWARE. |
| 23 | * |
| 24 | * Authors: Ben Skeggs |
| 25 | * Martin Peres |
| 26 | */ |
| 27 | |
| 28 | #include <sys/cdefs.h> |
| 29 | __KERNEL_RCSID(0, "$NetBSD: nouveau_subdev_therm_nv50.c,v 1.1.1.1 2014/08/06 12:36:32 riastradh Exp $" ); |
| 30 | |
| 31 | #include "priv.h" |
| 32 | |
| 33 | struct nv50_therm_priv { |
| 34 | struct nouveau_therm_priv base; |
| 35 | }; |
| 36 | |
| 37 | static int |
| 38 | pwm_info(struct nouveau_therm *therm, int *line, int *ctrl, int *indx) |
| 39 | { |
| 40 | if (*line == 0x04) { |
| 41 | *ctrl = 0x00e100; |
| 42 | *line = 4; |
| 43 | *indx = 0; |
| 44 | } else |
| 45 | if (*line == 0x09) { |
| 46 | *ctrl = 0x00e100; |
| 47 | *line = 9; |
| 48 | *indx = 1; |
| 49 | } else |
| 50 | if (*line == 0x10) { |
| 51 | *ctrl = 0x00e28c; |
| 52 | *line = 0; |
| 53 | *indx = 0; |
| 54 | } else { |
| 55 | nv_error(therm, "unknown pwm ctrl for gpio %d\n" , *line); |
| 56 | return -ENODEV; |
| 57 | } |
| 58 | |
| 59 | return 0; |
| 60 | } |
| 61 | |
| 62 | int |
| 63 | nv50_fan_pwm_ctrl(struct nouveau_therm *therm, int line, bool enable) |
| 64 | { |
| 65 | u32 data = enable ? 0x00000001 : 0x00000000; |
| 66 | int ctrl, id, ret = pwm_info(therm, &line, &ctrl, &id); |
| 67 | if (ret == 0) |
| 68 | nv_mask(therm, ctrl, 0x00010001 << line, data << line); |
| 69 | return ret; |
| 70 | } |
| 71 | |
| 72 | int |
| 73 | nv50_fan_pwm_get(struct nouveau_therm *therm, int line, u32 *divs, u32 *duty) |
| 74 | { |
| 75 | int ctrl, id, ret = pwm_info(therm, &line, &ctrl, &id); |
| 76 | if (ret) |
| 77 | return ret; |
| 78 | |
| 79 | if (nv_rd32(therm, ctrl) & (1 << line)) { |
| 80 | *divs = nv_rd32(therm, 0x00e114 + (id * 8)); |
| 81 | *duty = nv_rd32(therm, 0x00e118 + (id * 8)); |
| 82 | return 0; |
| 83 | } |
| 84 | |
| 85 | return -EINVAL; |
| 86 | } |
| 87 | |
| 88 | int |
| 89 | nv50_fan_pwm_set(struct nouveau_therm *therm, int line, u32 divs, u32 duty) |
| 90 | { |
| 91 | int ctrl, id, ret = pwm_info(therm, &line, &ctrl, &id); |
| 92 | if (ret) |
| 93 | return ret; |
| 94 | |
| 95 | nv_wr32(therm, 0x00e114 + (id * 8), divs); |
| 96 | nv_wr32(therm, 0x00e118 + (id * 8), duty | 0x80000000); |
| 97 | return 0; |
| 98 | } |
| 99 | |
| 100 | int |
| 101 | nv50_fan_pwm_clock(struct nouveau_therm *therm, int line) |
| 102 | { |
| 103 | int chipset = nv_device(therm)->chipset; |
| 104 | int crystal = nv_device(therm)->crystal; |
| 105 | int pwm_clock; |
| 106 | |
| 107 | /* determine the PWM source clock */ |
| 108 | if (chipset > 0x50 && chipset < 0x94) { |
| 109 | u8 pwm_div = nv_rd32(therm, 0x410c); |
| 110 | if (nv_rd32(therm, 0xc040) & 0x800000) { |
| 111 | /* Use the HOST clock (100 MHz) |
| 112 | * Where does this constant(2.4) comes from? */ |
| 113 | pwm_clock = (100000000 >> pwm_div) * 10 / 24; |
| 114 | } else { |
| 115 | /* Where does this constant(20) comes from? */ |
| 116 | pwm_clock = (crystal * 1000) >> pwm_div; |
| 117 | pwm_clock /= 20; |
| 118 | } |
| 119 | } else { |
| 120 | pwm_clock = (crystal * 1000) / 20; |
| 121 | } |
| 122 | |
| 123 | return pwm_clock; |
| 124 | } |
| 125 | |
| 126 | static void |
| 127 | nv50_sensor_setup(struct nouveau_therm *therm) |
| 128 | { |
| 129 | nv_mask(therm, 0x20010, 0x40000000, 0x0); |
| 130 | mdelay(20); /* wait for the temperature to stabilize */ |
| 131 | } |
| 132 | |
| 133 | static int |
| 134 | nv50_temp_get(struct nouveau_therm *therm) |
| 135 | { |
| 136 | struct nouveau_therm_priv *priv = (void *)therm; |
| 137 | struct nvbios_therm_sensor *sensor = &priv->bios_sensor; |
| 138 | int core_temp; |
| 139 | |
| 140 | core_temp = nv_rd32(therm, 0x20014) & 0x3fff; |
| 141 | |
| 142 | /* if the slope or the offset is unset, do no use the sensor */ |
| 143 | if (!sensor->slope_div || !sensor->slope_mult || |
| 144 | !sensor->offset_num || !sensor->offset_den) |
| 145 | return -ENODEV; |
| 146 | |
| 147 | core_temp = core_temp * sensor->slope_mult / sensor->slope_div; |
| 148 | core_temp = core_temp + sensor->offset_num / sensor->offset_den; |
| 149 | core_temp = core_temp + sensor->offset_constant - 8; |
| 150 | |
| 151 | /* reserve negative temperatures for errors */ |
| 152 | if (core_temp < 0) |
| 153 | core_temp = 0; |
| 154 | |
| 155 | return core_temp; |
| 156 | } |
| 157 | |
| 158 | static int |
| 159 | nv50_therm_ctor(struct nouveau_object *parent, |
| 160 | struct nouveau_object *engine, |
| 161 | struct nouveau_oclass *oclass, void *data, u32 size, |
| 162 | struct nouveau_object **pobject) |
| 163 | { |
| 164 | struct nv50_therm_priv *priv; |
| 165 | int ret; |
| 166 | |
| 167 | ret = nouveau_therm_create(parent, engine, oclass, &priv); |
| 168 | *pobject = nv_object(priv); |
| 169 | if (ret) |
| 170 | return ret; |
| 171 | |
| 172 | priv->base.base.pwm_ctrl = nv50_fan_pwm_ctrl; |
| 173 | priv->base.base.pwm_get = nv50_fan_pwm_get; |
| 174 | priv->base.base.pwm_set = nv50_fan_pwm_set; |
| 175 | priv->base.base.pwm_clock = nv50_fan_pwm_clock; |
| 176 | priv->base.base.temp_get = nv50_temp_get; |
| 177 | priv->base.sensor.program_alarms = nouveau_therm_program_alarms_polling; |
| 178 | nv_subdev(priv)->intr = nv40_therm_intr; |
| 179 | |
| 180 | return nouveau_therm_preinit(&priv->base.base); |
| 181 | } |
| 182 | |
| 183 | static int |
| 184 | nv50_therm_init(struct nouveau_object *object) |
| 185 | { |
| 186 | struct nouveau_therm *therm = (void *)object; |
| 187 | |
| 188 | nv50_sensor_setup(therm); |
| 189 | |
| 190 | return _nouveau_therm_init(object); |
| 191 | } |
| 192 | |
| 193 | struct nouveau_oclass |
| 194 | nv50_therm_oclass = { |
| 195 | .handle = NV_SUBDEV(THERM, 0x50), |
| 196 | .ofuncs = &(struct nouveau_ofuncs) { |
| 197 | .ctor = nv50_therm_ctor, |
| 198 | .dtor = _nouveau_therm_dtor, |
| 199 | .init = nv50_therm_init, |
| 200 | .fini = _nouveau_therm_fini, |
| 201 | }, |
| 202 | }; |
| 203 | |