| 1 | /* $NetBSD: ohci.c,v 1.264 2016/08/14 14:42:22 skrll Exp $ */ |
| 2 | |
| 3 | /* |
| 4 | * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc. |
| 5 | * All rights reserved. |
| 6 | * |
| 7 | * This code is derived from software contributed to The NetBSD Foundation |
| 8 | * by Lennart Augustsson (lennart@augustsson.net) at |
| 9 | * Carlstedt Research & Technology, Jared D. McNeill (jmcneill@invisible.ca) |
| 10 | * and Matthew R. Green (mrg@eterna.com.au). |
| 11 | * This code is derived from software contributed to The NetBSD Foundation |
| 12 | * by Charles M. Hannum. |
| 13 | * |
| 14 | * Redistribution and use in source and binary forms, with or without |
| 15 | * modification, are permitted provided that the following conditions |
| 16 | * are met: |
| 17 | * 1. Redistributions of source code must retain the above copyright |
| 18 | * notice, this list of conditions and the following disclaimer. |
| 19 | * 2. Redistributions in binary form must reproduce the above copyright |
| 20 | * notice, this list of conditions and the following disclaimer in the |
| 21 | * documentation and/or other materials provided with the distribution. |
| 22 | * |
| 23 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS |
| 24 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
| 25 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 26 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS |
| 27 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 28 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 29 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 30 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 31 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 32 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 33 | * POSSIBILITY OF SUCH DAMAGE. |
| 34 | */ |
| 35 | |
| 36 | /* |
| 37 | * USB Open Host Controller driver. |
| 38 | * |
| 39 | * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html |
| 40 | * USB spec: http://www.usb.org/developers/docs/ |
| 41 | */ |
| 42 | |
| 43 | #include <sys/cdefs.h> |
| 44 | __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.264 2016/08/14 14:42:22 skrll Exp $" ); |
| 45 | |
| 46 | #ifdef _KERNEL_OPT |
| 47 | #include "opt_usb.h" |
| 48 | #endif |
| 49 | |
| 50 | #include <sys/param.h> |
| 51 | |
| 52 | #include <sys/cpu.h> |
| 53 | #include <sys/device.h> |
| 54 | #include <sys/kernel.h> |
| 55 | #include <sys/kmem.h> |
| 56 | #include <sys/proc.h> |
| 57 | #include <sys/queue.h> |
| 58 | #include <sys/select.h> |
| 59 | #include <sys/sysctl.h> |
| 60 | #include <sys/systm.h> |
| 61 | |
| 62 | #include <machine/endian.h> |
| 63 | |
| 64 | #include <dev/usb/usb.h> |
| 65 | #include <dev/usb/usbdi.h> |
| 66 | #include <dev/usb/usbdivar.h> |
| 67 | #include <dev/usb/usb_mem.h> |
| 68 | #include <dev/usb/usb_quirks.h> |
| 69 | |
| 70 | #include <dev/usb/ohcireg.h> |
| 71 | #include <dev/usb/ohcivar.h> |
| 72 | #include <dev/usb/usbroothub.h> |
| 73 | #include <dev/usb/usbhist.h> |
| 74 | |
| 75 | #ifdef USB_DEBUG |
| 76 | #ifndef OHCI_DEBUG |
| 77 | #define ohcidebug 0 |
| 78 | #else |
| 79 | static int ohcidebug = 10; |
| 80 | |
| 81 | SYSCTL_SETUP(sysctl_hw_ohci_setup, "sysctl hw.ohci setup" ) |
| 82 | { |
| 83 | int err; |
| 84 | const struct sysctlnode *rnode; |
| 85 | const struct sysctlnode *cnode; |
| 86 | |
| 87 | err = sysctl_createv(clog, 0, NULL, &rnode, |
| 88 | CTLFLAG_PERMANENT, CTLTYPE_NODE, "ohci" , |
| 89 | SYSCTL_DESCR("ohci global controls" ), |
| 90 | NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); |
| 91 | |
| 92 | if (err) |
| 93 | goto fail; |
| 94 | |
| 95 | /* control debugging printfs */ |
| 96 | err = sysctl_createv(clog, 0, &rnode, &cnode, |
| 97 | CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, |
| 98 | "debug" , SYSCTL_DESCR("Enable debugging output" ), |
| 99 | NULL, 0, &ohcidebug, sizeof(ohcidebug), CTL_CREATE, CTL_EOL); |
| 100 | if (err) |
| 101 | goto fail; |
| 102 | |
| 103 | return; |
| 104 | fail: |
| 105 | aprint_error("%s: sysctl_createv failed (err = %d)\n" , __func__, err); |
| 106 | } |
| 107 | |
| 108 | #endif /* OHCI_DEBUG */ |
| 109 | #endif /* USB_DEBUG */ |
| 110 | |
| 111 | #define DPRINTF(FMT,A,B,C,D) USBHIST_LOG(ohcidebug,FMT,A,B,C,D) |
| 112 | #define DPRINTFN(N,FMT,A,B,C,D) USBHIST_LOGN(ohcidebug,N,FMT,A,B,C,D) |
| 113 | #define OHCIHIST_FUNC() USBHIST_FUNC() |
| 114 | #define OHCIHIST_CALLED(name) USBHIST_CALLED(ohcidebug) |
| 115 | |
| 116 | #if BYTE_ORDER == BIG_ENDIAN |
| 117 | #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN |
| 118 | #else |
| 119 | #define SWAP_ENDIAN OHCI_BIG_ENDIAN |
| 120 | #endif |
| 121 | |
| 122 | #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) |
| 123 | #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) |
| 124 | #define HTOO16(val) O16TOH(val) |
| 125 | #define HTOO32(val) O32TOH(val) |
| 126 | |
| 127 | struct ohci_pipe; |
| 128 | |
| 129 | Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); |
| 130 | Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); |
| 131 | |
| 132 | Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); |
| 133 | Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); |
| 134 | Static void ohci_free_std_locked(ohci_softc_t *, ohci_soft_td_t *); |
| 135 | |
| 136 | Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); |
| 137 | Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); |
| 138 | Static void ohci_free_sitd_locked(ohci_softc_t *, |
| 139 | ohci_soft_itd_t *); |
| 140 | |
| 141 | Static int ohci_alloc_std_chain(ohci_softc_t *, struct usbd_xfer *, |
| 142 | int, int); |
| 143 | Static void ohci_free_stds(ohci_softc_t *, struct ohci_xfer *); |
| 144 | |
| 145 | Static void ohci_reset_std_chain(ohci_softc_t *, struct usbd_xfer *, |
| 146 | int, int, ohci_soft_td_t *, ohci_soft_td_t **); |
| 147 | |
| 148 | Static usbd_status ohci_open(struct usbd_pipe *); |
| 149 | Static void ohci_poll(struct usbd_bus *); |
| 150 | Static void ohci_softintr(void *); |
| 151 | Static void ohci_rhsc(ohci_softc_t *, struct usbd_xfer *); |
| 152 | Static void ohci_rhsc_softint(void *); |
| 153 | |
| 154 | Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, |
| 155 | ohci_soft_ed_t *); |
| 156 | |
| 157 | Static void ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *, |
| 158 | ohci_soft_ed_t *); |
| 159 | Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); |
| 160 | Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); |
| 161 | Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); |
| 162 | Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); |
| 163 | Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); |
| 164 | Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); |
| 165 | |
| 166 | Static usbd_status ohci_setup_isoc(struct usbd_pipe *); |
| 167 | Static void ohci_device_isoc_enter(struct usbd_xfer *); |
| 168 | |
| 169 | Static struct usbd_xfer * |
| 170 | ohci_allocx(struct usbd_bus *, unsigned int); |
| 171 | Static void ohci_freex(struct usbd_bus *, struct usbd_xfer *); |
| 172 | Static void ohci_get_lock(struct usbd_bus *, kmutex_t **); |
| 173 | Static int ohci_roothub_ctrl(struct usbd_bus *, |
| 174 | usb_device_request_t *, void *, int); |
| 175 | |
| 176 | Static usbd_status ohci_root_intr_transfer(struct usbd_xfer *); |
| 177 | Static usbd_status ohci_root_intr_start(struct usbd_xfer *); |
| 178 | Static void ohci_root_intr_abort(struct usbd_xfer *); |
| 179 | Static void ohci_root_intr_close(struct usbd_pipe *); |
| 180 | Static void ohci_root_intr_done(struct usbd_xfer *); |
| 181 | |
| 182 | Static int ohci_device_ctrl_init(struct usbd_xfer *); |
| 183 | Static void ohci_device_ctrl_fini(struct usbd_xfer *); |
| 184 | Static usbd_status ohci_device_ctrl_transfer(struct usbd_xfer *); |
| 185 | Static usbd_status ohci_device_ctrl_start(struct usbd_xfer *); |
| 186 | Static void ohci_device_ctrl_abort(struct usbd_xfer *); |
| 187 | Static void ohci_device_ctrl_close(struct usbd_pipe *); |
| 188 | Static void ohci_device_ctrl_done(struct usbd_xfer *); |
| 189 | |
| 190 | Static int ohci_device_bulk_init(struct usbd_xfer *); |
| 191 | Static void ohci_device_bulk_fini(struct usbd_xfer *); |
| 192 | Static usbd_status ohci_device_bulk_transfer(struct usbd_xfer *); |
| 193 | Static usbd_status ohci_device_bulk_start(struct usbd_xfer *); |
| 194 | Static void ohci_device_bulk_abort(struct usbd_xfer *); |
| 195 | Static void ohci_device_bulk_close(struct usbd_pipe *); |
| 196 | Static void ohci_device_bulk_done(struct usbd_xfer *); |
| 197 | |
| 198 | Static int ohci_device_intr_init(struct usbd_xfer *); |
| 199 | Static void ohci_device_intr_fini(struct usbd_xfer *); |
| 200 | Static usbd_status ohci_device_intr_transfer(struct usbd_xfer *); |
| 201 | Static usbd_status ohci_device_intr_start(struct usbd_xfer *); |
| 202 | Static void ohci_device_intr_abort(struct usbd_xfer *); |
| 203 | Static void ohci_device_intr_close(struct usbd_pipe *); |
| 204 | Static void ohci_device_intr_done(struct usbd_xfer *); |
| 205 | |
| 206 | Static int ohci_device_isoc_init(struct usbd_xfer *); |
| 207 | Static void ohci_device_isoc_fini(struct usbd_xfer *); |
| 208 | Static usbd_status ohci_device_isoc_transfer(struct usbd_xfer *); |
| 209 | Static void ohci_device_isoc_abort(struct usbd_xfer *); |
| 210 | Static void ohci_device_isoc_close(struct usbd_pipe *); |
| 211 | Static void ohci_device_isoc_done(struct usbd_xfer *); |
| 212 | |
| 213 | Static usbd_status ohci_device_setintr(ohci_softc_t *, |
| 214 | struct ohci_pipe *, int); |
| 215 | |
| 216 | Static void ohci_timeout(void *); |
| 217 | Static void ohci_timeout_task(void *); |
| 218 | Static void ohci_rhsc_enable(void *); |
| 219 | |
| 220 | Static void ohci_close_pipe(struct usbd_pipe *, ohci_soft_ed_t *); |
| 221 | Static void ohci_abort_xfer(struct usbd_xfer *, usbd_status); |
| 222 | |
| 223 | Static void ohci_device_clear_toggle(struct usbd_pipe *); |
| 224 | Static void ohci_noop(struct usbd_pipe *); |
| 225 | |
| 226 | #ifdef OHCI_DEBUG |
| 227 | Static void ohci_dumpregs(ohci_softc_t *); |
| 228 | Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); |
| 229 | Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); |
| 230 | Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); |
| 231 | Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); |
| 232 | Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); |
| 233 | #endif |
| 234 | |
| 235 | #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ |
| 236 | BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) |
| 237 | #define OWRITE1(sc, r, x) \ |
| 238 | do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) |
| 239 | #define OWRITE2(sc, r, x) \ |
| 240 | do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) |
| 241 | #define OWRITE4(sc, r, x) \ |
| 242 | do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) |
| 243 | |
| 244 | static __inline uint32_t |
| 245 | OREAD4(ohci_softc_t *sc, bus_size_t r) |
| 246 | { |
| 247 | |
| 248 | OBARR(sc); |
| 249 | return bus_space_read_4(sc->iot, sc->ioh, r); |
| 250 | } |
| 251 | |
| 252 | /* Reverse the bits in a value 0 .. 31 */ |
| 253 | Static uint8_t revbits[OHCI_NO_INTRS] = |
| 254 | { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, |
| 255 | 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, |
| 256 | 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, |
| 257 | 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; |
| 258 | |
| 259 | struct ohci_pipe { |
| 260 | struct usbd_pipe pipe; |
| 261 | ohci_soft_ed_t *sed; |
| 262 | union { |
| 263 | ohci_soft_td_t *td; |
| 264 | ohci_soft_itd_t *itd; |
| 265 | } tail; |
| 266 | /* Info needed for different pipe kinds. */ |
| 267 | union { |
| 268 | /* Control pipe */ |
| 269 | struct { |
| 270 | usb_dma_t reqdma; |
| 271 | } ctrl; |
| 272 | /* Interrupt pipe */ |
| 273 | struct { |
| 274 | int nslots; |
| 275 | int pos; |
| 276 | } intr; |
| 277 | /* Isochronous pipe */ |
| 278 | struct isoc { |
| 279 | int next, inuse; |
| 280 | } isoc; |
| 281 | }; |
| 282 | }; |
| 283 | |
| 284 | Static const struct usbd_bus_methods ohci_bus_methods = { |
| 285 | .ubm_open = ohci_open, |
| 286 | .ubm_softint = ohci_softintr, |
| 287 | .ubm_dopoll = ohci_poll, |
| 288 | .ubm_allocx = ohci_allocx, |
| 289 | .ubm_freex = ohci_freex, |
| 290 | .ubm_getlock = ohci_get_lock, |
| 291 | .ubm_rhctrl = ohci_roothub_ctrl, |
| 292 | }; |
| 293 | |
| 294 | Static const struct usbd_pipe_methods ohci_root_intr_methods = { |
| 295 | .upm_transfer = ohci_root_intr_transfer, |
| 296 | .upm_start = ohci_root_intr_start, |
| 297 | .upm_abort = ohci_root_intr_abort, |
| 298 | .upm_close = ohci_root_intr_close, |
| 299 | .upm_cleartoggle = ohci_noop, |
| 300 | .upm_done = ohci_root_intr_done, |
| 301 | }; |
| 302 | |
| 303 | Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { |
| 304 | .upm_init = ohci_device_ctrl_init, |
| 305 | .upm_fini = ohci_device_ctrl_fini, |
| 306 | .upm_transfer = ohci_device_ctrl_transfer, |
| 307 | .upm_start = ohci_device_ctrl_start, |
| 308 | .upm_abort = ohci_device_ctrl_abort, |
| 309 | .upm_close = ohci_device_ctrl_close, |
| 310 | .upm_cleartoggle = ohci_noop, |
| 311 | .upm_done = ohci_device_ctrl_done, |
| 312 | }; |
| 313 | |
| 314 | Static const struct usbd_pipe_methods ohci_device_intr_methods = { |
| 315 | .upm_init = ohci_device_intr_init, |
| 316 | .upm_fini = ohci_device_intr_fini, |
| 317 | .upm_transfer = ohci_device_intr_transfer, |
| 318 | .upm_start = ohci_device_intr_start, |
| 319 | .upm_abort = ohci_device_intr_abort, |
| 320 | .upm_close = ohci_device_intr_close, |
| 321 | .upm_cleartoggle = ohci_device_clear_toggle, |
| 322 | .upm_done = ohci_device_intr_done, |
| 323 | }; |
| 324 | |
| 325 | Static const struct usbd_pipe_methods ohci_device_bulk_methods = { |
| 326 | .upm_init = ohci_device_bulk_init, |
| 327 | .upm_fini = ohci_device_bulk_fini, |
| 328 | .upm_transfer = ohci_device_bulk_transfer, |
| 329 | .upm_start = ohci_device_bulk_start, |
| 330 | .upm_abort = ohci_device_bulk_abort, |
| 331 | .upm_close = ohci_device_bulk_close, |
| 332 | .upm_cleartoggle = ohci_device_clear_toggle, |
| 333 | .upm_done = ohci_device_bulk_done, |
| 334 | }; |
| 335 | |
| 336 | Static const struct usbd_pipe_methods ohci_device_isoc_methods = { |
| 337 | .upm_init = ohci_device_isoc_init, |
| 338 | .upm_fini = ohci_device_isoc_fini, |
| 339 | .upm_transfer = ohci_device_isoc_transfer, |
| 340 | .upm_abort = ohci_device_isoc_abort, |
| 341 | .upm_close = ohci_device_isoc_close, |
| 342 | .upm_cleartoggle = ohci_noop, |
| 343 | .upm_done = ohci_device_isoc_done, |
| 344 | }; |
| 345 | |
| 346 | int |
| 347 | ohci_activate(device_t self, enum devact act) |
| 348 | { |
| 349 | struct ohci_softc *sc = device_private(self); |
| 350 | |
| 351 | switch (act) { |
| 352 | case DVACT_DEACTIVATE: |
| 353 | sc->sc_dying = 1; |
| 354 | return 0; |
| 355 | default: |
| 356 | return EOPNOTSUPP; |
| 357 | } |
| 358 | } |
| 359 | |
| 360 | void |
| 361 | ohci_childdet(device_t self, device_t child) |
| 362 | { |
| 363 | struct ohci_softc *sc = device_private(self); |
| 364 | |
| 365 | KASSERT(sc->sc_child == child); |
| 366 | sc->sc_child = NULL; |
| 367 | } |
| 368 | |
| 369 | int |
| 370 | ohci_detach(struct ohci_softc *sc, int flags) |
| 371 | { |
| 372 | int rv = 0; |
| 373 | |
| 374 | if (sc->sc_child != NULL) |
| 375 | rv = config_detach(sc->sc_child, flags); |
| 376 | |
| 377 | if (rv != 0) |
| 378 | return rv; |
| 379 | |
| 380 | callout_halt(&sc->sc_tmo_rhsc, &sc->sc_lock); |
| 381 | |
| 382 | usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ |
| 383 | callout_destroy(&sc->sc_tmo_rhsc); |
| 384 | |
| 385 | softint_disestablish(sc->sc_rhsc_si); |
| 386 | |
| 387 | cv_destroy(&sc->sc_softwake_cv); |
| 388 | |
| 389 | mutex_destroy(&sc->sc_lock); |
| 390 | mutex_destroy(&sc->sc_intr_lock); |
| 391 | |
| 392 | if (sc->sc_hcca != NULL) |
| 393 | usb_freemem(&sc->sc_bus, &sc->sc_hccadma); |
| 394 | pool_cache_destroy(sc->sc_xferpool); |
| 395 | |
| 396 | return rv; |
| 397 | } |
| 398 | |
| 399 | ohci_soft_ed_t * |
| 400 | ohci_alloc_sed(ohci_softc_t *sc) |
| 401 | { |
| 402 | ohci_soft_ed_t *sed; |
| 403 | usbd_status err; |
| 404 | int i, offs; |
| 405 | usb_dma_t dma; |
| 406 | |
| 407 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 408 | |
| 409 | mutex_enter(&sc->sc_lock); |
| 410 | if (sc->sc_freeeds == NULL) { |
| 411 | DPRINTFN(2, "allocating chunk" , 0, 0, 0, 0); |
| 412 | mutex_exit(&sc->sc_lock); |
| 413 | |
| 414 | err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, |
| 415 | OHCI_ED_ALIGN, &dma); |
| 416 | if (err) |
| 417 | return 0; |
| 418 | |
| 419 | mutex_enter(&sc->sc_lock); |
| 420 | for (i = 0; i < OHCI_SED_CHUNK; i++) { |
| 421 | offs = i * OHCI_SED_SIZE; |
| 422 | sed = KERNADDR(&dma, offs); |
| 423 | sed->physaddr = DMAADDR(&dma, offs); |
| 424 | sed->dma = dma; |
| 425 | sed->offs = offs; |
| 426 | sed->next = sc->sc_freeeds; |
| 427 | sc->sc_freeeds = sed; |
| 428 | } |
| 429 | } |
| 430 | sed = sc->sc_freeeds; |
| 431 | sc->sc_freeeds = sed->next; |
| 432 | mutex_exit(&sc->sc_lock); |
| 433 | |
| 434 | memset(&sed->ed, 0, sizeof(ohci_ed_t)); |
| 435 | sed->next = 0; |
| 436 | return sed; |
| 437 | } |
| 438 | |
| 439 | static inline void |
| 440 | ohci_free_sed_locked(ohci_softc_t *sc, ohci_soft_ed_t *sed) |
| 441 | { |
| 442 | |
| 443 | KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); |
| 444 | |
| 445 | sed->next = sc->sc_freeeds; |
| 446 | sc->sc_freeeds = sed; |
| 447 | } |
| 448 | |
| 449 | void |
| 450 | ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) |
| 451 | { |
| 452 | |
| 453 | mutex_enter(&sc->sc_lock); |
| 454 | ohci_free_sed_locked(sc, sed); |
| 455 | mutex_exit(&sc->sc_lock); |
| 456 | } |
| 457 | |
| 458 | ohci_soft_td_t * |
| 459 | ohci_alloc_std(ohci_softc_t *sc) |
| 460 | { |
| 461 | ohci_soft_td_t *std; |
| 462 | usbd_status err; |
| 463 | int i, offs; |
| 464 | usb_dma_t dma; |
| 465 | |
| 466 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 467 | |
| 468 | mutex_enter(&sc->sc_lock); |
| 469 | if (sc->sc_freetds == NULL) { |
| 470 | DPRINTFN(2, "allocating chunk" , 0, 0, 0, 0); |
| 471 | mutex_exit(&sc->sc_lock); |
| 472 | |
| 473 | err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, |
| 474 | OHCI_TD_ALIGN, &dma); |
| 475 | if (err) |
| 476 | return NULL; |
| 477 | |
| 478 | mutex_enter(&sc->sc_lock); |
| 479 | for (i = 0; i < OHCI_STD_CHUNK; i++) { |
| 480 | offs = i * OHCI_STD_SIZE; |
| 481 | std = KERNADDR(&dma, offs); |
| 482 | std->physaddr = DMAADDR(&dma, offs); |
| 483 | std->dma = dma; |
| 484 | std->offs = offs; |
| 485 | std->nexttd = sc->sc_freetds; |
| 486 | sc->sc_freetds = std; |
| 487 | } |
| 488 | } |
| 489 | |
| 490 | std = sc->sc_freetds; |
| 491 | sc->sc_freetds = std->nexttd; |
| 492 | mutex_exit(&sc->sc_lock); |
| 493 | |
| 494 | memset(&std->td, 0, sizeof(ohci_td_t)); |
| 495 | std->nexttd = NULL; |
| 496 | std->xfer = NULL; |
| 497 | |
| 498 | return std; |
| 499 | } |
| 500 | |
| 501 | void |
| 502 | ohci_free_std_locked(ohci_softc_t *sc, ohci_soft_td_t *std) |
| 503 | { |
| 504 | |
| 505 | KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); |
| 506 | |
| 507 | std->nexttd = sc->sc_freetds; |
| 508 | sc->sc_freetds = std; |
| 509 | } |
| 510 | |
| 511 | void |
| 512 | ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) |
| 513 | { |
| 514 | |
| 515 | mutex_enter(&sc->sc_lock); |
| 516 | ohci_free_std_locked(sc, std); |
| 517 | mutex_exit(&sc->sc_lock); |
| 518 | } |
| 519 | |
| 520 | Static int |
| 521 | ohci_alloc_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, int length, int rd) |
| 522 | { |
| 523 | struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); |
| 524 | uint16_t flags = xfer->ux_flags; |
| 525 | |
| 526 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 527 | |
| 528 | DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d" , |
| 529 | xfer->ux_pipe->up_dev->ud_addr, |
| 530 | UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress), |
| 531 | length, xfer->ux_pipe->up_dev->ud_speed); |
| 532 | |
| 533 | ASSERT_SLEEPABLE(); |
| 534 | KASSERT(length != 0 || (!rd && (flags & USBD_FORCE_SHORT_XFER))); |
| 535 | |
| 536 | size_t nstd = (!rd && (flags & USBD_FORCE_SHORT_XFER)) ? 1 : 0; |
| 537 | nstd += ((length + OHCI_PAGE_SIZE - 1) / OHCI_PAGE_SIZE); |
| 538 | ox->ox_stds = kmem_zalloc(sizeof(ohci_soft_td_t *) * nstd, |
| 539 | KM_SLEEP); |
| 540 | ox->ox_nstd = nstd; |
| 541 | |
| 542 | DPRINTFN(8, "xfer %p nstd %d" , xfer, nstd, 0, 0); |
| 543 | |
| 544 | for (size_t j = 0; j < ox->ox_nstd;) { |
| 545 | ohci_soft_td_t *cur = ohci_alloc_std(sc); |
| 546 | if (cur == NULL) |
| 547 | goto nomem; |
| 548 | |
| 549 | ox->ox_stds[j++] = cur; |
| 550 | cur->xfer = xfer; |
| 551 | cur->flags = 0; |
| 552 | } |
| 553 | |
| 554 | return 0; |
| 555 | |
| 556 | nomem: |
| 557 | ohci_free_stds(sc, ox); |
| 558 | kmem_free(ox->ox_stds, sizeof(ohci_soft_td_t *) * nstd); |
| 559 | |
| 560 | return ENOMEM; |
| 561 | } |
| 562 | |
| 563 | Static void |
| 564 | ohci_free_stds(ohci_softc_t *sc, struct ohci_xfer *ox) |
| 565 | { |
| 566 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 567 | DPRINTF("ox=%p" , ox, 0, 0, 0); |
| 568 | |
| 569 | mutex_enter(&sc->sc_lock); |
| 570 | for (size_t i = 0; i < ox->ox_nstd; i++) { |
| 571 | ohci_soft_td_t *std = ox->ox_stds[i]; |
| 572 | if (std == NULL) |
| 573 | break; |
| 574 | ohci_free_std_locked(sc, std); |
| 575 | } |
| 576 | mutex_exit(&sc->sc_lock); |
| 577 | } |
| 578 | |
| 579 | void |
| 580 | ohci_reset_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, |
| 581 | int alen, int rd, ohci_soft_td_t *sp, ohci_soft_td_t **ep) |
| 582 | { |
| 583 | struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); |
| 584 | ohci_soft_td_t *next, *cur; |
| 585 | int len, curlen; |
| 586 | usb_dma_t *dma = &xfer->ux_dmabuf; |
| 587 | uint16_t flags = xfer->ux_flags; |
| 588 | |
| 589 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 590 | DPRINTF("start len=%d" , alen, 0, 0, 0); |
| 591 | |
| 592 | KASSERT(mutex_owned(&sc->sc_lock)); |
| 593 | |
| 594 | DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d" , |
| 595 | xfer->ux_pipe->up_dev->ud_addr, |
| 596 | UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress), |
| 597 | alen, xfer->ux_pipe->up_dev->ud_speed); |
| 598 | |
| 599 | KASSERT(sp); |
| 600 | |
| 601 | int mps = UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize); |
| 602 | |
| 603 | /* |
| 604 | * Assign next for the len == 0 case where we don't go through the |
| 605 | * main loop. |
| 606 | */ |
| 607 | len = alen; |
| 608 | cur = next = sp; |
| 609 | |
| 610 | usb_syncmem(dma, 0, len, |
| 611 | rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); |
| 612 | const uint32_t tdflags = HTOO32( |
| 613 | (rd ? OHCI_TD_IN : OHCI_TD_OUT) | |
| 614 | OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); |
| 615 | |
| 616 | size_t curoffs = 0; |
| 617 | for (size_t j = 1; len != 0;) { |
| 618 | if (j == ox->ox_nstd) |
| 619 | next = NULL; |
| 620 | else |
| 621 | next = ox->ox_stds[j++]; |
| 622 | KASSERT(next != cur); |
| 623 | |
| 624 | curlen = 0; |
| 625 | ohci_physaddr_t sdataphys = DMAADDR(dma, curoffs); |
| 626 | ohci_physaddr_t edataphys = DMAADDR(dma, curoffs + len - 1); |
| 627 | |
| 628 | ohci_physaddr_t sphyspg = OHCI_PAGE(sdataphys); |
| 629 | ohci_physaddr_t ephyspg = OHCI_PAGE(edataphys); |
| 630 | /* |
| 631 | * The OHCI hardware can handle at most one page |
| 632 | * crossing per TD |
| 633 | */ |
| 634 | curlen = len; |
| 635 | if (!(sphyspg == ephyspg || sphyspg + 1 == ephyspg)) { |
| 636 | /* must use multiple TDs, fill as much as possible. */ |
| 637 | curlen = 2 * OHCI_PAGE_SIZE - |
| 638 | (sdataphys & (OHCI_PAGE_SIZE - 1)); |
| 639 | /* the length must be a multiple of the max size */ |
| 640 | curlen -= curlen % mps; |
| 641 | } |
| 642 | KASSERT(curlen != 0); |
| 643 | DPRINTFN(4, "sdataphys=0x%08x edataphys=0x%08x " |
| 644 | "len=%d curlen=%d" , sdataphys, edataphys, len, curlen); |
| 645 | |
| 646 | cur->td.td_flags = tdflags; |
| 647 | cur->td.td_cbp = HTOO32(sdataphys); |
| 648 | cur->td.td_be = HTOO32(edataphys); |
| 649 | cur->td.td_nexttd = (next != NULL) ? HTOO32(next->physaddr) : 0; |
| 650 | cur->nexttd = next; |
| 651 | cur->len = curlen; |
| 652 | cur->flags = OHCI_ADD_LEN; |
| 653 | cur->xfer = xfer; |
| 654 | ohci_hash_add_td(sc, cur); |
| 655 | |
| 656 | usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), |
| 657 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 658 | |
| 659 | curoffs += curlen; |
| 660 | len -= curlen; |
| 661 | |
| 662 | if (len != 0) { |
| 663 | KASSERT(next != NULL); |
| 664 | DPRINTFN(10, "extend chain" , 0, 0, 0, 0); |
| 665 | cur = next; |
| 666 | } |
| 667 | } |
| 668 | cur->td.td_flags |= |
| 669 | HTOO32(xfer->ux_flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0); |
| 670 | |
| 671 | if (!rd && |
| 672 | (flags & USBD_FORCE_SHORT_XFER) && |
| 673 | alen % mps == 0) { |
| 674 | /* Force a 0 length transfer at the end. */ |
| 675 | |
| 676 | KASSERT(next != NULL); |
| 677 | cur = next; |
| 678 | |
| 679 | cur->td.td_flags = tdflags; |
| 680 | cur->td.td_cbp = 0; /* indicate 0 length packet */ |
| 681 | cur->td.td_nexttd = 0; |
| 682 | cur->td.td_be = ~0; |
| 683 | cur->nexttd = NULL; |
| 684 | cur->len = 0; |
| 685 | cur->flags = 0; |
| 686 | cur->xfer = xfer; |
| 687 | ohci_hash_add_td(sc, cur); |
| 688 | |
| 689 | usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), |
| 690 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 691 | DPRINTFN(2, "add 0 xfer" , 0, 0, 0, 0); |
| 692 | } |
| 693 | *ep = cur; |
| 694 | } |
| 695 | |
| 696 | ohci_soft_itd_t * |
| 697 | ohci_alloc_sitd(ohci_softc_t *sc) |
| 698 | { |
| 699 | ohci_soft_itd_t *sitd; |
| 700 | usbd_status err; |
| 701 | int i, offs; |
| 702 | usb_dma_t dma; |
| 703 | |
| 704 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 705 | |
| 706 | mutex_enter(&sc->sc_lock); |
| 707 | if (sc->sc_freeitds == NULL) { |
| 708 | DPRINTFN(2, "allocating chunk" , 0, 0, 0, 0); |
| 709 | mutex_exit(&sc->sc_lock); |
| 710 | |
| 711 | err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, |
| 712 | OHCI_ITD_ALIGN, &dma); |
| 713 | if (err) |
| 714 | return NULL; |
| 715 | mutex_enter(&sc->sc_lock); |
| 716 | for (i = 0; i < OHCI_SITD_CHUNK; i++) { |
| 717 | offs = i * OHCI_SITD_SIZE; |
| 718 | sitd = KERNADDR(&dma, offs); |
| 719 | sitd->physaddr = DMAADDR(&dma, offs); |
| 720 | sitd->dma = dma; |
| 721 | sitd->offs = offs; |
| 722 | sitd->nextitd = sc->sc_freeitds; |
| 723 | sc->sc_freeitds = sitd; |
| 724 | } |
| 725 | } |
| 726 | |
| 727 | sitd = sc->sc_freeitds; |
| 728 | sc->sc_freeitds = sitd->nextitd; |
| 729 | mutex_exit(&sc->sc_lock); |
| 730 | |
| 731 | memset(&sitd->itd, 0, sizeof(ohci_itd_t)); |
| 732 | sitd->nextitd = NULL; |
| 733 | sitd->xfer = NULL; |
| 734 | |
| 735 | #ifdef DIAGNOSTIC |
| 736 | sitd->isdone = true; |
| 737 | #endif |
| 738 | |
| 739 | return sitd; |
| 740 | } |
| 741 | |
| 742 | Static void |
| 743 | ohci_free_sitd_locked(ohci_softc_t *sc, ohci_soft_itd_t *sitd) |
| 744 | { |
| 745 | |
| 746 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 747 | DPRINTFN(10, "sitd=%p" , sitd, 0, 0, 0); |
| 748 | |
| 749 | KASSERT(sitd->isdone); |
| 750 | #ifdef DIAGNOSTIC |
| 751 | /* Warn double free */ |
| 752 | sitd->isdone = false; |
| 753 | #endif |
| 754 | |
| 755 | sitd->nextitd = sc->sc_freeitds; |
| 756 | sc->sc_freeitds = sitd; |
| 757 | } |
| 758 | |
| 759 | void |
| 760 | ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) |
| 761 | { |
| 762 | |
| 763 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 764 | |
| 765 | mutex_enter(&sc->sc_lock); |
| 766 | ohci_free_sitd_locked(sc, sitd); |
| 767 | mutex_exit(&sc->sc_lock); |
| 768 | } |
| 769 | |
| 770 | int |
| 771 | ohci_init(ohci_softc_t *sc) |
| 772 | { |
| 773 | ohci_soft_ed_t *sed, *psed; |
| 774 | usbd_status err; |
| 775 | int i; |
| 776 | uint32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca /*, descb */; |
| 777 | |
| 778 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 779 | |
| 780 | aprint_normal_dev(sc->sc_dev, "" ); |
| 781 | |
| 782 | sc->sc_hcca = NULL; |
| 783 | callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE); |
| 784 | |
| 785 | mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); |
| 786 | mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB); |
| 787 | cv_init(&sc->sc_softwake_cv, "ohciab" ); |
| 788 | |
| 789 | sc->sc_rhsc_si = softint_establish(SOFTINT_USB | SOFTINT_MPSAFE, |
| 790 | ohci_rhsc_softint, sc); |
| 791 | |
| 792 | for (i = 0; i < OHCI_HASH_SIZE; i++) |
| 793 | LIST_INIT(&sc->sc_hash_tds[i]); |
| 794 | for (i = 0; i < OHCI_HASH_SIZE; i++) |
| 795 | LIST_INIT(&sc->sc_hash_itds[i]); |
| 796 | |
| 797 | sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0, |
| 798 | "ohcixfer" , NULL, IPL_USB, NULL, NULL, NULL); |
| 799 | |
| 800 | rev = OREAD4(sc, OHCI_REVISION); |
| 801 | aprint_normal("OHCI version %d.%d%s\n" , |
| 802 | OHCI_REV_HI(rev), OHCI_REV_LO(rev), |
| 803 | OHCI_REV_LEGACY(rev) ? ", legacy support" : "" ); |
| 804 | |
| 805 | if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { |
| 806 | aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n" ); |
| 807 | sc->sc_bus.ub_revision = USBREV_UNKNOWN; |
| 808 | return -1; |
| 809 | } |
| 810 | sc->sc_bus.ub_revision = USBREV_1_0; |
| 811 | sc->sc_bus.ub_usedma = true; |
| 812 | |
| 813 | /* XXX determine alignment by R/W */ |
| 814 | /* Allocate the HCCA area. */ |
| 815 | err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, |
| 816 | OHCI_HCCA_ALIGN, &sc->sc_hccadma); |
| 817 | if (err) { |
| 818 | sc->sc_hcca = NULL; |
| 819 | return err; |
| 820 | } |
| 821 | sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); |
| 822 | memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); |
| 823 | |
| 824 | sc->sc_eintrs = OHCI_NORMAL_INTRS; |
| 825 | |
| 826 | /* Allocate dummy ED that starts the control list. */ |
| 827 | sc->sc_ctrl_head = ohci_alloc_sed(sc); |
| 828 | if (sc->sc_ctrl_head == NULL) { |
| 829 | err = ENOMEM; |
| 830 | goto bad1; |
| 831 | } |
| 832 | sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); |
| 833 | |
| 834 | /* Allocate dummy ED that starts the bulk list. */ |
| 835 | sc->sc_bulk_head = ohci_alloc_sed(sc); |
| 836 | if (sc->sc_bulk_head == NULL) { |
| 837 | err = ENOMEM; |
| 838 | goto bad2; |
| 839 | } |
| 840 | sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); |
| 841 | usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs, |
| 842 | sizeof(sc->sc_bulk_head->ed), |
| 843 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 844 | |
| 845 | /* Allocate dummy ED that starts the isochronous list. */ |
| 846 | sc->sc_isoc_head = ohci_alloc_sed(sc); |
| 847 | if (sc->sc_isoc_head == NULL) { |
| 848 | err = ENOMEM; |
| 849 | goto bad3; |
| 850 | } |
| 851 | sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); |
| 852 | usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs, |
| 853 | sizeof(sc->sc_isoc_head->ed), |
| 854 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 855 | |
| 856 | /* Allocate all the dummy EDs that make up the interrupt tree. */ |
| 857 | for (i = 0; i < OHCI_NO_EDS; i++) { |
| 858 | sed = ohci_alloc_sed(sc); |
| 859 | if (sed == NULL) { |
| 860 | while (--i >= 0) |
| 861 | ohci_free_sed(sc, sc->sc_eds[i]); |
| 862 | err = ENOMEM; |
| 863 | goto bad4; |
| 864 | } |
| 865 | /* All ED fields are set to 0. */ |
| 866 | sc->sc_eds[i] = sed; |
| 867 | sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); |
| 868 | if (i != 0) |
| 869 | psed = sc->sc_eds[(i-1) / 2]; |
| 870 | else |
| 871 | psed= sc->sc_isoc_head; |
| 872 | sed->next = psed; |
| 873 | sed->ed.ed_nexted = HTOO32(psed->physaddr); |
| 874 | usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), |
| 875 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 876 | } |
| 877 | /* |
| 878 | * Fill HCCA interrupt table. The bit reversal is to get |
| 879 | * the tree set up properly to spread the interrupts. |
| 880 | */ |
| 881 | for (i = 0; i < OHCI_NO_INTRS; i++) |
| 882 | sc->sc_hcca->hcca_interrupt_table[revbits[i]] = |
| 883 | HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); |
| 884 | usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE, |
| 885 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 886 | |
| 887 | #ifdef OHCI_DEBUG |
| 888 | DPRINTFN(15, "--- dump start ---" , 0, 0, 0 ,0); |
| 889 | if (ohcidebug >= 15) { |
| 890 | for (i = 0; i < OHCI_NO_EDS; i++) { |
| 891 | DPRINTFN(15, "ed#%d " , i, 0, 0, 0); |
| 892 | ohci_dump_ed(sc, sc->sc_eds[i]); |
| 893 | } |
| 894 | DPRINTFN(15, "iso" , 0, 0, 0 ,0); |
| 895 | ohci_dump_ed(sc, sc->sc_isoc_head); |
| 896 | } |
| 897 | DPRINTFN(15, "--- dump end ---" , 0, 0, 0 ,0); |
| 898 | #endif |
| 899 | |
| 900 | /* Preserve values programmed by SMM/BIOS but lost over reset. */ |
| 901 | ctl = OREAD4(sc, OHCI_CONTROL); |
| 902 | rwc = ctl & OHCI_RWC; |
| 903 | fm = OREAD4(sc, OHCI_FM_INTERVAL); |
| 904 | desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); |
| 905 | /* descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); */ |
| 906 | |
| 907 | /* Determine in what context we are running. */ |
| 908 | if (ctl & OHCI_IR) { |
| 909 | /* SMM active, request change */ |
| 910 | DPRINTF("SMM active, request owner change" , 0, 0, 0, 0); |
| 911 | if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == |
| 912 | (OHCI_OC | OHCI_MIE)) |
| 913 | OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); |
| 914 | s = OREAD4(sc, OHCI_COMMAND_STATUS); |
| 915 | OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); |
| 916 | for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { |
| 917 | usb_delay_ms(&sc->sc_bus, 1); |
| 918 | ctl = OREAD4(sc, OHCI_CONTROL); |
| 919 | } |
| 920 | OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); |
| 921 | if ((ctl & OHCI_IR) == 0) { |
| 922 | aprint_error_dev(sc->sc_dev, |
| 923 | "SMM does not respond, resetting\n" ); |
| 924 | OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); |
| 925 | goto reset; |
| 926 | } |
| 927 | #if 0 |
| 928 | /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ |
| 929 | } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { |
| 930 | /* BIOS started controller. */ |
| 931 | DPRINTF("BIOS active" , 0, 0, 0, 0); |
| 932 | if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { |
| 933 | OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); |
| 934 | usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); |
| 935 | } |
| 936 | #endif |
| 937 | } else { |
| 938 | DPRINTF("cold started" , 0 ,0 ,0 ,0); |
| 939 | reset: |
| 940 | /* Controller was cold started. */ |
| 941 | usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); |
| 942 | } |
| 943 | |
| 944 | /* |
| 945 | * This reset should not be necessary according to the OHCI spec, but |
| 946 | * without it some controllers do not start. |
| 947 | */ |
| 948 | DPRINTF("sc %p: resetting" , sc, 0, 0, 0); |
| 949 | OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); |
| 950 | usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); |
| 951 | |
| 952 | /* We now own the host controller and the bus has been reset. */ |
| 953 | |
| 954 | OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ |
| 955 | /* Nominal time for a reset is 10 us. */ |
| 956 | for (i = 0; i < 10; i++) { |
| 957 | delay(10); |
| 958 | hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; |
| 959 | if (!hcr) |
| 960 | break; |
| 961 | } |
| 962 | if (hcr) { |
| 963 | aprint_error_dev(sc->sc_dev, "reset timeout\n" ); |
| 964 | err = EIO; |
| 965 | goto bad5; |
| 966 | } |
| 967 | #ifdef OHCI_DEBUG |
| 968 | if (ohcidebug >= 15) |
| 969 | ohci_dumpregs(sc); |
| 970 | #endif |
| 971 | |
| 972 | /* The controller is now in SUSPEND state, we have 2ms to finish. */ |
| 973 | |
| 974 | /* Set up HC registers. */ |
| 975 | OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); |
| 976 | OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); |
| 977 | OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); |
| 978 | /* disable all interrupts and then switch on all desired interrupts */ |
| 979 | OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); |
| 980 | /* switch on desired functional features */ |
| 981 | ctl = OREAD4(sc, OHCI_CONTROL); |
| 982 | ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); |
| 983 | ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | |
| 984 | OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; |
| 985 | /* And finally start it! */ |
| 986 | OWRITE4(sc, OHCI_CONTROL, ctl); |
| 987 | |
| 988 | /* |
| 989 | * The controller is now OPERATIONAL. Set a some final |
| 990 | * registers that should be set earlier, but that the |
| 991 | * controller ignores when in the SUSPEND state. |
| 992 | */ |
| 993 | ival = OHCI_GET_IVAL(fm); |
| 994 | fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; |
| 995 | fm |= OHCI_FSMPS(ival) | ival; |
| 996 | OWRITE4(sc, OHCI_FM_INTERVAL, fm); |
| 997 | per = OHCI_PERIODIC(ival); /* 90% periodic */ |
| 998 | OWRITE4(sc, OHCI_PERIODIC_START, per); |
| 999 | |
| 1000 | if (sc->sc_flags & OHCIF_SUPERIO) { |
| 1001 | /* no overcurrent protection */ |
| 1002 | desca |= OHCI_NOCP; |
| 1003 | /* |
| 1004 | * Clear NoPowerSwitching and PowerOnToPowerGoodTime meaning |
| 1005 | * that |
| 1006 | * - ports are always power switched |
| 1007 | * - don't wait for powered root hub port |
| 1008 | */ |
| 1009 | desca &= ~(__SHIFTIN(0xff, OHCI_POTPGT_MASK) | OHCI_NPS); |
| 1010 | } |
| 1011 | |
| 1012 | /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ |
| 1013 | OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); |
| 1014 | OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ |
| 1015 | usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); |
| 1016 | OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); |
| 1017 | |
| 1018 | /* |
| 1019 | * The AMD756 requires a delay before re-reading the register, |
| 1020 | * otherwise it will occasionally report 0 ports. |
| 1021 | */ |
| 1022 | sc->sc_noport = 0; |
| 1023 | for (i = 0; i < 10 && sc->sc_noport == 0; i++) { |
| 1024 | usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); |
| 1025 | sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); |
| 1026 | } |
| 1027 | |
| 1028 | #ifdef OHCI_DEBUG |
| 1029 | if (ohcidebug >= 5) |
| 1030 | ohci_dumpregs(sc); |
| 1031 | #endif |
| 1032 | |
| 1033 | /* Set up the bus struct. */ |
| 1034 | sc->sc_bus.ub_methods = &ohci_bus_methods; |
| 1035 | sc->sc_bus.ub_pipesize = sizeof(struct ohci_pipe); |
| 1036 | |
| 1037 | sc->sc_control = sc->sc_intre = 0; |
| 1038 | |
| 1039 | /* Finally, turn on interrupts. */ |
| 1040 | DPRINTF("enabling %#x" , sc->sc_eintrs | OHCI_MIE, 0, 0, 0); |
| 1041 | OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); |
| 1042 | |
| 1043 | return 0; |
| 1044 | |
| 1045 | bad5: |
| 1046 | for (i = 0; i < OHCI_NO_EDS; i++) |
| 1047 | ohci_free_sed(sc, sc->sc_eds[i]); |
| 1048 | bad4: |
| 1049 | ohci_free_sed(sc, sc->sc_isoc_head); |
| 1050 | bad3: |
| 1051 | ohci_free_sed(sc, sc->sc_bulk_head); |
| 1052 | bad2: |
| 1053 | ohci_free_sed(sc, sc->sc_ctrl_head); |
| 1054 | bad1: |
| 1055 | usb_freemem(&sc->sc_bus, &sc->sc_hccadma); |
| 1056 | sc->sc_hcca = NULL; |
| 1057 | return err; |
| 1058 | } |
| 1059 | |
| 1060 | struct usbd_xfer * |
| 1061 | ohci_allocx(struct usbd_bus *bus, unsigned int nframes) |
| 1062 | { |
| 1063 | ohci_softc_t *sc = OHCI_BUS2SC(bus); |
| 1064 | struct usbd_xfer *xfer; |
| 1065 | |
| 1066 | xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT); |
| 1067 | if (xfer != NULL) { |
| 1068 | memset(xfer, 0, sizeof(struct ohci_xfer)); |
| 1069 | #ifdef DIAGNOSTIC |
| 1070 | xfer->ux_state = XFER_BUSY; |
| 1071 | #endif |
| 1072 | } |
| 1073 | return xfer; |
| 1074 | } |
| 1075 | |
| 1076 | void |
| 1077 | ohci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) |
| 1078 | { |
| 1079 | ohci_softc_t *sc = OHCI_BUS2SC(bus); |
| 1080 | |
| 1081 | KASSERTMSG(xfer->ux_state == XFER_BUSY, |
| 1082 | "xfer=%p not busy, 0x%08x\n" , xfer, xfer->ux_state); |
| 1083 | #ifdef DIAGNOSTIC |
| 1084 | xfer->ux_state = XFER_FREE; |
| 1085 | #endif |
| 1086 | pool_cache_put(sc->sc_xferpool, xfer); |
| 1087 | } |
| 1088 | |
| 1089 | Static void |
| 1090 | ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock) |
| 1091 | { |
| 1092 | ohci_softc_t *sc = OHCI_BUS2SC(bus); |
| 1093 | |
| 1094 | *lock = &sc->sc_lock; |
| 1095 | } |
| 1096 | |
| 1097 | /* |
| 1098 | * Shut down the controller when the system is going down. |
| 1099 | */ |
| 1100 | bool |
| 1101 | ohci_shutdown(device_t self, int flags) |
| 1102 | { |
| 1103 | ohci_softc_t *sc = device_private(self); |
| 1104 | |
| 1105 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 1106 | |
| 1107 | DPRINTF("stopping the HC" , 0, 0, 0, 0); |
| 1108 | OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); |
| 1109 | return true; |
| 1110 | } |
| 1111 | |
| 1112 | bool |
| 1113 | ohci_resume(device_t dv, const pmf_qual_t *qual) |
| 1114 | { |
| 1115 | ohci_softc_t *sc = device_private(dv); |
| 1116 | uint32_t ctl; |
| 1117 | |
| 1118 | mutex_spin_enter(&sc->sc_intr_lock); |
| 1119 | sc->sc_bus.ub_usepolling++; |
| 1120 | mutex_spin_exit(&sc->sc_intr_lock); |
| 1121 | |
| 1122 | /* Some broken BIOSes do not recover these values */ |
| 1123 | OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); |
| 1124 | OWRITE4(sc, OHCI_CONTROL_HEAD_ED, |
| 1125 | sc->sc_ctrl_head->physaddr); |
| 1126 | OWRITE4(sc, OHCI_BULK_HEAD_ED, |
| 1127 | sc->sc_bulk_head->physaddr); |
| 1128 | if (sc->sc_intre) |
| 1129 | OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre & |
| 1130 | (OHCI_ALL_INTRS | OHCI_MIE)); |
| 1131 | if (sc->sc_control) |
| 1132 | ctl = sc->sc_control; |
| 1133 | else |
| 1134 | ctl = OREAD4(sc, OHCI_CONTROL); |
| 1135 | ctl |= OHCI_HCFS_RESUME; |
| 1136 | OWRITE4(sc, OHCI_CONTROL, ctl); |
| 1137 | usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); |
| 1138 | ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; |
| 1139 | OWRITE4(sc, OHCI_CONTROL, ctl); |
| 1140 | usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); |
| 1141 | sc->sc_control = sc->sc_intre = 0; |
| 1142 | |
| 1143 | mutex_spin_enter(&sc->sc_intr_lock); |
| 1144 | sc->sc_bus.ub_usepolling--; |
| 1145 | mutex_spin_exit(&sc->sc_intr_lock); |
| 1146 | |
| 1147 | return true; |
| 1148 | } |
| 1149 | |
| 1150 | bool |
| 1151 | ohci_suspend(device_t dv, const pmf_qual_t *qual) |
| 1152 | { |
| 1153 | ohci_softc_t *sc = device_private(dv); |
| 1154 | uint32_t ctl; |
| 1155 | |
| 1156 | mutex_spin_enter(&sc->sc_intr_lock); |
| 1157 | sc->sc_bus.ub_usepolling++; |
| 1158 | mutex_spin_exit(&sc->sc_intr_lock); |
| 1159 | |
| 1160 | ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; |
| 1161 | if (sc->sc_control == 0) { |
| 1162 | /* |
| 1163 | * Preserve register values, in case that BIOS |
| 1164 | * does not recover them. |
| 1165 | */ |
| 1166 | sc->sc_control = ctl; |
| 1167 | sc->sc_intre = OREAD4(sc, |
| 1168 | OHCI_INTERRUPT_ENABLE); |
| 1169 | } |
| 1170 | ctl |= OHCI_HCFS_SUSPEND; |
| 1171 | OWRITE4(sc, OHCI_CONTROL, ctl); |
| 1172 | usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); |
| 1173 | |
| 1174 | mutex_spin_enter(&sc->sc_intr_lock); |
| 1175 | sc->sc_bus.ub_usepolling--; |
| 1176 | mutex_spin_exit(&sc->sc_intr_lock); |
| 1177 | |
| 1178 | return true; |
| 1179 | } |
| 1180 | |
| 1181 | #ifdef OHCI_DEBUG |
| 1182 | void |
| 1183 | ohci_dumpregs(ohci_softc_t *sc) |
| 1184 | { |
| 1185 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 1186 | |
| 1187 | DPRINTF("rev=0x%08x control=0x%08x command=0x%08x" , |
| 1188 | OREAD4(sc, OHCI_REVISION), |
| 1189 | OREAD4(sc, OHCI_CONTROL), |
| 1190 | OREAD4(sc, OHCI_COMMAND_STATUS), 0); |
| 1191 | DPRINTF(" intrstat=0x%08x intre=0x%08x intrd=0x%08x" , |
| 1192 | OREAD4(sc, OHCI_INTERRUPT_STATUS), |
| 1193 | OREAD4(sc, OHCI_INTERRUPT_ENABLE), |
| 1194 | OREAD4(sc, OHCI_INTERRUPT_DISABLE), 0); |
| 1195 | DPRINTF(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x" , |
| 1196 | OREAD4(sc, OHCI_HCCA), |
| 1197 | OREAD4(sc, OHCI_PERIOD_CURRENT_ED), |
| 1198 | OREAD4(sc, OHCI_CONTROL_HEAD_ED), 0); |
| 1199 | DPRINTF(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x" , |
| 1200 | OREAD4(sc, OHCI_CONTROL_CURRENT_ED), |
| 1201 | OREAD4(sc, OHCI_BULK_HEAD_ED), |
| 1202 | OREAD4(sc, OHCI_BULK_CURRENT_ED) ,0); |
| 1203 | DPRINTF(" done=0x%08x fmival=0x%08x fmrem=0x%08x" , |
| 1204 | OREAD4(sc, OHCI_DONE_HEAD), |
| 1205 | OREAD4(sc, OHCI_FM_INTERVAL), |
| 1206 | OREAD4(sc, OHCI_FM_REMAINING), 0); |
| 1207 | DPRINTF(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x" , |
| 1208 | OREAD4(sc, OHCI_FM_NUMBER), |
| 1209 | OREAD4(sc, OHCI_PERIODIC_START), |
| 1210 | OREAD4(sc, OHCI_LS_THRESHOLD), 0); |
| 1211 | DPRINTF(" desca=0x%08x descb=0x%08x stat=0x%08x" , |
| 1212 | OREAD4(sc, OHCI_RH_DESCRIPTOR_A), |
| 1213 | OREAD4(sc, OHCI_RH_DESCRIPTOR_B), |
| 1214 | OREAD4(sc, OHCI_RH_STATUS), 0); |
| 1215 | DPRINTF(" port1=0x%08x port2=0x%08x" , |
| 1216 | OREAD4(sc, OHCI_RH_PORT_STATUS(1)), |
| 1217 | OREAD4(sc, OHCI_RH_PORT_STATUS(2)), 0, 0); |
| 1218 | DPRINTF(" HCCA: frame_number=0x%04x done_head=0x%08x" , |
| 1219 | O32TOH(sc->sc_hcca->hcca_frame_number), |
| 1220 | O32TOH(sc->sc_hcca->hcca_done_head), 0, 0); |
| 1221 | } |
| 1222 | #endif |
| 1223 | |
| 1224 | Static int ohci_intr1(ohci_softc_t *); |
| 1225 | |
| 1226 | int |
| 1227 | ohci_intr(void *p) |
| 1228 | { |
| 1229 | ohci_softc_t *sc = p; |
| 1230 | int ret = 0; |
| 1231 | |
| 1232 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 1233 | |
| 1234 | if (sc == NULL) |
| 1235 | return 0; |
| 1236 | |
| 1237 | mutex_spin_enter(&sc->sc_intr_lock); |
| 1238 | |
| 1239 | if (sc->sc_dying || !device_has_power(sc->sc_dev)) |
| 1240 | goto done; |
| 1241 | |
| 1242 | /* If we get an interrupt while polling, then just ignore it. */ |
| 1243 | if (sc->sc_bus.ub_usepolling) { |
| 1244 | DPRINTFN(16, "ignored interrupt while polling" , 0, 0, 0, 0); |
| 1245 | /* for level triggered intrs, should do something to ack */ |
| 1246 | OWRITE4(sc, OHCI_INTERRUPT_STATUS, |
| 1247 | OREAD4(sc, OHCI_INTERRUPT_STATUS)); |
| 1248 | |
| 1249 | goto done; |
| 1250 | } |
| 1251 | |
| 1252 | ret = ohci_intr1(sc); |
| 1253 | |
| 1254 | done: |
| 1255 | mutex_spin_exit(&sc->sc_intr_lock); |
| 1256 | return ret; |
| 1257 | } |
| 1258 | |
| 1259 | Static int |
| 1260 | ohci_intr1(ohci_softc_t *sc) |
| 1261 | { |
| 1262 | uint32_t intrs, eintrs; |
| 1263 | |
| 1264 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 1265 | |
| 1266 | /* In case the interrupt occurs before initialization has completed. */ |
| 1267 | if (sc == NULL || sc->sc_hcca == NULL) { |
| 1268 | #ifdef DIAGNOSTIC |
| 1269 | printf("ohci_intr: sc->sc_hcca == NULL\n" ); |
| 1270 | #endif |
| 1271 | return 0; |
| 1272 | } |
| 1273 | |
| 1274 | KASSERT(mutex_owned(&sc->sc_intr_lock)); |
| 1275 | |
| 1276 | intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); |
| 1277 | if (!intrs) |
| 1278 | return 0; |
| 1279 | |
| 1280 | /* Acknowledge */ |
| 1281 | OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); |
| 1282 | eintrs = intrs & sc->sc_eintrs; |
| 1283 | DPRINTFN(7, "sc=%p" , sc, 0, 0, 0); |
| 1284 | DPRINTFN(7, "intrs=%#x(%#x) eintrs=%#x(%#x)" , |
| 1285 | intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), eintrs, |
| 1286 | sc->sc_eintrs); |
| 1287 | |
| 1288 | if (!eintrs) { |
| 1289 | return 0; |
| 1290 | } |
| 1291 | |
| 1292 | if (eintrs & OHCI_SO) { |
| 1293 | sc->sc_overrun_cnt++; |
| 1294 | if (usbd_ratecheck(&sc->sc_overrun_ntc)) { |
| 1295 | printf("%s: %u scheduling overruns\n" , |
| 1296 | device_xname(sc->sc_dev), sc->sc_overrun_cnt); |
| 1297 | sc->sc_overrun_cnt = 0; |
| 1298 | } |
| 1299 | /* XXX do what */ |
| 1300 | eintrs &= ~OHCI_SO; |
| 1301 | } |
| 1302 | if (eintrs & OHCI_WDH) { |
| 1303 | /* |
| 1304 | * We block the interrupt below, and reenable it later from |
| 1305 | * ohci_softintr(). |
| 1306 | */ |
| 1307 | usb_schedsoftintr(&sc->sc_bus); |
| 1308 | } |
| 1309 | if (eintrs & OHCI_RD) { |
| 1310 | DPRINTFN(5, "resume detect" , sc, 0, 0, 0); |
| 1311 | printf("%s: resume detect\n" , device_xname(sc->sc_dev)); |
| 1312 | /* XXX process resume detect */ |
| 1313 | } |
| 1314 | if (eintrs & OHCI_UE) { |
| 1315 | DPRINTFN(5, "unrecoverable error" , sc, 0, 0, 0); |
| 1316 | printf("%s: unrecoverable error, controller halted\n" , |
| 1317 | device_xname(sc->sc_dev)); |
| 1318 | OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); |
| 1319 | /* XXX what else */ |
| 1320 | } |
| 1321 | if (eintrs & OHCI_RHSC) { |
| 1322 | /* |
| 1323 | * We block the interrupt below, and reenable it later from |
| 1324 | * a timeout. |
| 1325 | */ |
| 1326 | softint_schedule(sc->sc_rhsc_si); |
| 1327 | } |
| 1328 | |
| 1329 | if (eintrs != 0) { |
| 1330 | /* Block unprocessed interrupts. */ |
| 1331 | OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); |
| 1332 | sc->sc_eintrs &= ~eintrs; |
| 1333 | DPRINTF("sc %p blocking intrs 0x%x" , sc, eintrs, 0, 0); |
| 1334 | } |
| 1335 | |
| 1336 | return 1; |
| 1337 | } |
| 1338 | |
| 1339 | void |
| 1340 | ohci_rhsc_enable(void *v_sc) |
| 1341 | { |
| 1342 | ohci_softc_t *sc = v_sc; |
| 1343 | |
| 1344 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 1345 | DPRINTF("sc %p" , sc, 0, 0, 0); |
| 1346 | mutex_spin_enter(&sc->sc_intr_lock); |
| 1347 | sc->sc_eintrs |= OHCI_RHSC; |
| 1348 | OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); |
| 1349 | mutex_spin_exit(&sc->sc_intr_lock); |
| 1350 | } |
| 1351 | |
| 1352 | #ifdef OHCI_DEBUG |
| 1353 | const char *ohci_cc_strs[] = { |
| 1354 | "NO_ERROR" , |
| 1355 | "CRC" , |
| 1356 | "BIT_STUFFING" , |
| 1357 | "DATA_TOGGLE_MISMATCH" , |
| 1358 | "STALL" , |
| 1359 | "DEVICE_NOT_RESPONDING" , |
| 1360 | "PID_CHECK_FAILURE" , |
| 1361 | "UNEXPECTED_PID" , |
| 1362 | "DATA_OVERRUN" , |
| 1363 | "DATA_UNDERRUN" , |
| 1364 | "BUFFER_OVERRUN" , |
| 1365 | "BUFFER_UNDERRUN" , |
| 1366 | "reserved" , |
| 1367 | "reserved" , |
| 1368 | "NOT_ACCESSED" , |
| 1369 | "NOT_ACCESSED" , |
| 1370 | }; |
| 1371 | #endif |
| 1372 | |
| 1373 | void |
| 1374 | ohci_softintr(void *v) |
| 1375 | { |
| 1376 | struct usbd_bus *bus = v; |
| 1377 | ohci_softc_t *sc = OHCI_BUS2SC(bus); |
| 1378 | ohci_soft_itd_t *sitd, *sidone, *sitdnext; |
| 1379 | ohci_soft_td_t *std, *sdone, *stdnext; |
| 1380 | struct usbd_xfer *xfer; |
| 1381 | struct ohci_pipe *opipe; |
| 1382 | int len, cc; |
| 1383 | int i, j, actlen, iframes, uedir; |
| 1384 | ohci_physaddr_t done; |
| 1385 | |
| 1386 | KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); |
| 1387 | |
| 1388 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 1389 | |
| 1390 | usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), |
| 1391 | sizeof(sc->sc_hcca->hcca_done_head), |
| 1392 | BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); |
| 1393 | done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; |
| 1394 | sc->sc_hcca->hcca_done_head = 0; |
| 1395 | usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), |
| 1396 | sizeof(sc->sc_hcca->hcca_done_head), |
| 1397 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 1398 | OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); |
| 1399 | sc->sc_eintrs |= OHCI_WDH; |
| 1400 | OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); |
| 1401 | |
| 1402 | /* Reverse the done list. */ |
| 1403 | for (sdone = NULL, sidone = NULL; done != 0; ) { |
| 1404 | std = ohci_hash_find_td(sc, done); |
| 1405 | if (std != NULL) { |
| 1406 | usb_syncmem(&std->dma, std->offs, sizeof(std->td), |
| 1407 | BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); |
| 1408 | std->dnext = sdone; |
| 1409 | done = O32TOH(std->td.td_nexttd); |
| 1410 | sdone = std; |
| 1411 | DPRINTFN(10, "add TD %p" , std, 0, 0, 0); |
| 1412 | continue; |
| 1413 | } |
| 1414 | sitd = ohci_hash_find_itd(sc, done); |
| 1415 | if (sitd != NULL) { |
| 1416 | usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), |
| 1417 | BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); |
| 1418 | sitd->dnext = sidone; |
| 1419 | done = O32TOH(sitd->itd.itd_nextitd); |
| 1420 | sidone = sitd; |
| 1421 | DPRINTFN(5, "add ITD %p" , sitd, 0, 0, 0); |
| 1422 | continue; |
| 1423 | } |
| 1424 | DPRINTFN(10, "addr %p not found" , done, 0, 0, 0); |
| 1425 | device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n" , |
| 1426 | (u_long)done); |
| 1427 | break; |
| 1428 | } |
| 1429 | |
| 1430 | DPRINTFN(10, "sdone=%p sidone=%p" , sdone, sidone, 0, 0); |
| 1431 | DPRINTFN(10, "--- TD dump start ---" , 0, 0, 0, 0); |
| 1432 | #ifdef OHCI_DEBUG |
| 1433 | if (ohcidebug >= 10) { |
| 1434 | for (std = sdone; std; std = std->dnext) |
| 1435 | ohci_dump_td(sc, std); |
| 1436 | } |
| 1437 | #endif |
| 1438 | DPRINTFN(10, "--- TD dump end ---" , 0, 0, 0, 0); |
| 1439 | |
| 1440 | for (std = sdone; std; std = stdnext) { |
| 1441 | xfer = std->xfer; |
| 1442 | stdnext = std->dnext; |
| 1443 | DPRINTFN(10, "std=%p xfer=%p hcpriv=%p" , std, xfer, |
| 1444 | xfer ? xfer->ux_hcpriv : 0, 0); |
| 1445 | if (xfer == NULL) { |
| 1446 | /* |
| 1447 | * xfer == NULL: There seems to be no xfer associated |
| 1448 | * with this TD. It is tailp that happened to end up on |
| 1449 | * the done queue. |
| 1450 | * Shouldn't happen, but some chips are broken(?). |
| 1451 | */ |
| 1452 | continue; |
| 1453 | } |
| 1454 | if (xfer->ux_status == USBD_CANCELLED || |
| 1455 | xfer->ux_status == USBD_TIMEOUT) { |
| 1456 | DPRINTF("cancel/timeout %p" , xfer, 0, 0, 0); |
| 1457 | /* Handled by abort routine. */ |
| 1458 | continue; |
| 1459 | } |
| 1460 | callout_stop(&xfer->ux_callout); |
| 1461 | |
| 1462 | len = std->len; |
| 1463 | if (std->td.td_cbp != 0) |
| 1464 | len -= O32TOH(std->td.td_be) - |
| 1465 | O32TOH(std->td.td_cbp) + 1; |
| 1466 | DPRINTFN(10, "len=%d, flags=0x%x" , len, std->flags, 0, 0); |
| 1467 | if (std->flags & OHCI_ADD_LEN) |
| 1468 | xfer->ux_actlen += len; |
| 1469 | |
| 1470 | cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); |
| 1471 | if (cc == OHCI_CC_NO_ERROR) { |
| 1472 | ohci_hash_rem_td(sc, std); |
| 1473 | if (std->flags & OHCI_CALL_DONE) { |
| 1474 | xfer->ux_status = USBD_NORMAL_COMPLETION; |
| 1475 | usb_transfer_complete(xfer); |
| 1476 | } |
| 1477 | } else { |
| 1478 | /* |
| 1479 | * Endpoint is halted. First unlink all the TDs |
| 1480 | * belonging to the failed transfer, and then restart |
| 1481 | * the endpoint. |
| 1482 | */ |
| 1483 | ohci_soft_td_t *p, *n; |
| 1484 | opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); |
| 1485 | |
| 1486 | DPRINTFN(10, "error cc=%d" , cc, 0, 0, 0); |
| 1487 | |
| 1488 | /* remove xfer's TDs from the hash */ |
| 1489 | for (p = std; p->xfer == xfer; p = n) { |
| 1490 | n = p->nexttd; |
| 1491 | ohci_hash_rem_td(sc, p); |
| 1492 | } |
| 1493 | |
| 1494 | ohci_soft_ed_t *sed = opipe->sed; |
| 1495 | |
| 1496 | /* clear halt and TD chain */ |
| 1497 | sed->ed.ed_headp = HTOO32(p->physaddr); |
| 1498 | usb_syncmem(&sed->dma, |
| 1499 | sed->offs + offsetof(ohci_ed_t, ed_headp), |
| 1500 | sizeof(sed->ed.ed_headp), |
| 1501 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 1502 | |
| 1503 | OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); |
| 1504 | |
| 1505 | if (cc == OHCI_CC_DATA_UNDERRUN) |
| 1506 | xfer->ux_status = USBD_NORMAL_COMPLETION; |
| 1507 | else if (cc == OHCI_CC_STALL) |
| 1508 | xfer->ux_status = USBD_STALLED; |
| 1509 | else |
| 1510 | xfer->ux_status = USBD_IOERROR; |
| 1511 | usb_transfer_complete(xfer); |
| 1512 | } |
| 1513 | } |
| 1514 | DPRINTFN(10, "--- ITD dump start ---" , 0, 0, 0, 0); |
| 1515 | #ifdef OHCI_DEBUG |
| 1516 | if (ohcidebug >= 10) { |
| 1517 | for (sitd = sidone; sitd; sitd = sitd->dnext) |
| 1518 | ohci_dump_itd(sc, sitd); |
| 1519 | } |
| 1520 | #endif |
| 1521 | DPRINTFN(10, "--- ITD dump end ---" , 0, 0, 0, 0); |
| 1522 | |
| 1523 | for (sitd = sidone; sitd != NULL; sitd = sitdnext) { |
| 1524 | xfer = sitd->xfer; |
| 1525 | sitdnext = sitd->dnext; |
| 1526 | DPRINTFN(1, "sitd=%p xfer=%p hcpriv=%p" , sitd, xfer, |
| 1527 | xfer ? xfer->ux_hcpriv : 0, 0); |
| 1528 | if (xfer == NULL) |
| 1529 | continue; |
| 1530 | if (xfer->ux_status == USBD_CANCELLED || |
| 1531 | xfer->ux_status == USBD_TIMEOUT) { |
| 1532 | DPRINTF("cancel/timeout %p" , xfer, 0, 0, 0); |
| 1533 | /* Handled by abort routine. */ |
| 1534 | continue; |
| 1535 | } |
| 1536 | KASSERT(!sitd->isdone); |
| 1537 | #ifdef DIAGNOSTIC |
| 1538 | sitd->isdone = true; |
| 1539 | #endif |
| 1540 | if (sitd->flags & OHCI_CALL_DONE) { |
| 1541 | ohci_soft_itd_t *next; |
| 1542 | |
| 1543 | opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); |
| 1544 | opipe->isoc.inuse -= xfer->ux_nframes; |
| 1545 | uedir = UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc-> |
| 1546 | bEndpointAddress); |
| 1547 | xfer->ux_status = USBD_NORMAL_COMPLETION; |
| 1548 | actlen = 0; |
| 1549 | for (i = 0, sitd = xfer->ux_hcpriv;; |
| 1550 | sitd = next) { |
| 1551 | next = sitd->nextitd; |
| 1552 | if (OHCI_ITD_GET_CC(O32TOH(sitd-> |
| 1553 | itd.itd_flags)) != OHCI_CC_NO_ERROR) |
| 1554 | xfer->ux_status = USBD_IOERROR; |
| 1555 | /* For input, update frlengths with actual */ |
| 1556 | /* XXX anything necessary for output? */ |
| 1557 | if (uedir == UE_DIR_IN && |
| 1558 | xfer->ux_status == USBD_NORMAL_COMPLETION) { |
| 1559 | iframes = OHCI_ITD_GET_FC(O32TOH( |
| 1560 | sitd->itd.itd_flags)); |
| 1561 | for (j = 0; j < iframes; i++, j++) { |
| 1562 | len = O16TOH(sitd-> |
| 1563 | itd.itd_offset[j]); |
| 1564 | if ((OHCI_ITD_PSW_GET_CC(len) & |
| 1565 | OHCI_CC_NOT_ACCESSED_MASK) |
| 1566 | == OHCI_CC_NOT_ACCESSED) |
| 1567 | len = 0; |
| 1568 | else |
| 1569 | len = OHCI_ITD_PSW_LENGTH(len); |
| 1570 | xfer->ux_frlengths[i] = len; |
| 1571 | actlen += len; |
| 1572 | } |
| 1573 | } |
| 1574 | if (sitd->flags & OHCI_CALL_DONE) |
| 1575 | break; |
| 1576 | ohci_hash_rem_itd(sc, sitd); |
| 1577 | |
| 1578 | } |
| 1579 | ohci_hash_rem_itd(sc, sitd); |
| 1580 | if (uedir == UE_DIR_IN && |
| 1581 | xfer->ux_status == USBD_NORMAL_COMPLETION) |
| 1582 | xfer->ux_actlen = actlen; |
| 1583 | xfer->ux_hcpriv = NULL; |
| 1584 | |
| 1585 | usb_transfer_complete(xfer); |
| 1586 | } |
| 1587 | } |
| 1588 | |
| 1589 | if (sc->sc_softwake) { |
| 1590 | sc->sc_softwake = 0; |
| 1591 | cv_broadcast(&sc->sc_softwake_cv); |
| 1592 | } |
| 1593 | |
| 1594 | DPRINTFN(10, "done" , 0, 0, 0, 0); |
| 1595 | } |
| 1596 | |
| 1597 | void |
| 1598 | ohci_device_ctrl_done(struct usbd_xfer *xfer) |
| 1599 | { |
| 1600 | struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); |
| 1601 | ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); |
| 1602 | int len = UGETW(xfer->ux_request.wLength); |
| 1603 | int isread = (xfer->ux_request.bmRequestType & UT_READ); |
| 1604 | |
| 1605 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 1606 | DPRINTFN(10, "xfer=%p" , xfer, 0, 0, 0); |
| 1607 | |
| 1608 | KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); |
| 1609 | KASSERT(xfer->ux_rqflags & URQ_REQUEST); |
| 1610 | |
| 1611 | if (len) |
| 1612 | usb_syncmem(&xfer->ux_dmabuf, 0, len, |
| 1613 | isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); |
| 1614 | usb_syncmem(&opipe->ctrl.reqdma, 0, |
| 1615 | sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); |
| 1616 | } |
| 1617 | |
| 1618 | void |
| 1619 | ohci_device_intr_done(struct usbd_xfer *xfer) |
| 1620 | { |
| 1621 | ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); |
| 1622 | int isread = |
| 1623 | (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); |
| 1624 | |
| 1625 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 1626 | DPRINTFN(10, "xfer=%p, actlen=%d" , xfer, xfer->ux_actlen, 0, 0); |
| 1627 | |
| 1628 | KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); |
| 1629 | |
| 1630 | usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, |
| 1631 | isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); |
| 1632 | } |
| 1633 | |
| 1634 | void |
| 1635 | ohci_device_bulk_done(struct usbd_xfer *xfer) |
| 1636 | { |
| 1637 | ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); |
| 1638 | |
| 1639 | int isread = |
| 1640 | (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); |
| 1641 | |
| 1642 | KASSERT(mutex_owned(&sc->sc_lock)); |
| 1643 | |
| 1644 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 1645 | DPRINTFN(10, "xfer=%p, actlen=%d" , xfer, xfer->ux_actlen, 0, 0); |
| 1646 | usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, |
| 1647 | isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); |
| 1648 | } |
| 1649 | |
| 1650 | Static void |
| 1651 | ohci_rhsc_softint(void *arg) |
| 1652 | { |
| 1653 | ohci_softc_t *sc = arg; |
| 1654 | |
| 1655 | mutex_enter(&sc->sc_lock); |
| 1656 | |
| 1657 | ohci_rhsc(sc, sc->sc_intrxfer); |
| 1658 | |
| 1659 | /* Do not allow RHSC interrupts > 1 per second */ |
| 1660 | callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); |
| 1661 | |
| 1662 | mutex_exit(&sc->sc_lock); |
| 1663 | } |
| 1664 | |
| 1665 | void |
| 1666 | ohci_rhsc(ohci_softc_t *sc, struct usbd_xfer *xfer) |
| 1667 | { |
| 1668 | u_char *p; |
| 1669 | int i, m; |
| 1670 | int hstatus __unused; |
| 1671 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 1672 | |
| 1673 | KASSERT(mutex_owned(&sc->sc_lock)); |
| 1674 | |
| 1675 | hstatus = OREAD4(sc, OHCI_RH_STATUS); |
| 1676 | DPRINTF("sc=%p xfer=%p hstatus=0x%08x" , sc, xfer, hstatus, 0); |
| 1677 | |
| 1678 | if (xfer == NULL) { |
| 1679 | /* Just ignore the change. */ |
| 1680 | return; |
| 1681 | } |
| 1682 | |
| 1683 | p = xfer->ux_buf; |
| 1684 | m = min(sc->sc_noport, xfer->ux_length * 8 - 1); |
| 1685 | memset(p, 0, xfer->ux_length); |
| 1686 | for (i = 1; i <= m; i++) { |
| 1687 | /* Pick out CHANGE bits from the status reg. */ |
| 1688 | if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) |
| 1689 | p[i/8] |= 1 << (i%8); |
| 1690 | } |
| 1691 | DPRINTF("change=0x%02x" , *p, 0, 0, 0); |
| 1692 | xfer->ux_actlen = xfer->ux_length; |
| 1693 | xfer->ux_status = USBD_NORMAL_COMPLETION; |
| 1694 | |
| 1695 | usb_transfer_complete(xfer); |
| 1696 | } |
| 1697 | |
| 1698 | void |
| 1699 | ohci_root_intr_done(struct usbd_xfer *xfer) |
| 1700 | { |
| 1701 | ohci_softc_t *sc = OHCI_XFER2SC(xfer); |
| 1702 | |
| 1703 | KASSERT(mutex_owned(&sc->sc_lock)); |
| 1704 | |
| 1705 | KASSERT(sc->sc_intrxfer == xfer); |
| 1706 | sc->sc_intrxfer = NULL; |
| 1707 | } |
| 1708 | |
| 1709 | void |
| 1710 | ohci_poll(struct usbd_bus *bus) |
| 1711 | { |
| 1712 | ohci_softc_t *sc = OHCI_BUS2SC(bus); |
| 1713 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 1714 | |
| 1715 | #ifdef OHCI_DEBUG |
| 1716 | static int last; |
| 1717 | int new; |
| 1718 | new = OREAD4(sc, OHCI_INTERRUPT_STATUS); |
| 1719 | if (new != last) { |
| 1720 | DPRINTFN(10, "intrs=0x%04x" , new, 0, 0, 0); |
| 1721 | last = new; |
| 1722 | } |
| 1723 | #endif |
| 1724 | sc->sc_eintrs |= OHCI_WDH; |
| 1725 | if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) { |
| 1726 | mutex_spin_enter(&sc->sc_intr_lock); |
| 1727 | ohci_intr1(sc); |
| 1728 | mutex_spin_exit(&sc->sc_intr_lock); |
| 1729 | } |
| 1730 | } |
| 1731 | |
| 1732 | /* |
| 1733 | * Add an ED to the schedule. Called with USB lock held. |
| 1734 | */ |
| 1735 | Static void |
| 1736 | ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) |
| 1737 | { |
| 1738 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 1739 | DPRINTFN(8, "sed=%p head=%p" , sed, head, 0, 0); |
| 1740 | |
| 1741 | KASSERT(mutex_owned(&sc->sc_lock)); |
| 1742 | |
| 1743 | usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), |
| 1744 | sizeof(head->ed.ed_nexted), |
| 1745 | BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); |
| 1746 | sed->next = head->next; |
| 1747 | sed->ed.ed_nexted = head->ed.ed_nexted; |
| 1748 | usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), |
| 1749 | sizeof(sed->ed.ed_nexted), |
| 1750 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 1751 | head->next = sed; |
| 1752 | head->ed.ed_nexted = HTOO32(sed->physaddr); |
| 1753 | usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), |
| 1754 | sizeof(head->ed.ed_nexted), |
| 1755 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 1756 | } |
| 1757 | |
| 1758 | /* |
| 1759 | * Remove an ED from the schedule. Called with USB lock held. |
| 1760 | */ |
| 1761 | Static void |
| 1762 | ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) |
| 1763 | { |
| 1764 | ohci_soft_ed_t *p; |
| 1765 | |
| 1766 | KASSERT(mutex_owned(&sc->sc_lock)); |
| 1767 | |
| 1768 | /* XXX */ |
| 1769 | for (p = head; p != NULL && p->next != sed; p = p->next) |
| 1770 | ; |
| 1771 | KASSERT(p != NULL); |
| 1772 | |
| 1773 | usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), |
| 1774 | sizeof(sed->ed.ed_nexted), |
| 1775 | BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); |
| 1776 | p->next = sed->next; |
| 1777 | p->ed.ed_nexted = sed->ed.ed_nexted; |
| 1778 | usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), |
| 1779 | sizeof(p->ed.ed_nexted), |
| 1780 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 1781 | } |
| 1782 | |
| 1783 | /* |
| 1784 | * When a transfer is completed the TD is added to the done queue by |
| 1785 | * the host controller. This queue is the processed by software. |
| 1786 | * Unfortunately the queue contains the physical address of the TD |
| 1787 | * and we have no simple way to translate this back to a kernel address. |
| 1788 | * To make the translation possible (and fast) we use a hash table of |
| 1789 | * TDs currently in the schedule. The physical address is used as the |
| 1790 | * hash value. |
| 1791 | */ |
| 1792 | |
| 1793 | #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) |
| 1794 | /* Called with USB lock held. */ |
| 1795 | void |
| 1796 | ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) |
| 1797 | { |
| 1798 | int h = HASH(std->physaddr); |
| 1799 | |
| 1800 | KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); |
| 1801 | |
| 1802 | LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); |
| 1803 | } |
| 1804 | |
| 1805 | /* Called with USB lock held. */ |
| 1806 | void |
| 1807 | ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) |
| 1808 | { |
| 1809 | |
| 1810 | KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); |
| 1811 | |
| 1812 | LIST_REMOVE(std, hnext); |
| 1813 | } |
| 1814 | |
| 1815 | ohci_soft_td_t * |
| 1816 | ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) |
| 1817 | { |
| 1818 | int h = HASH(a); |
| 1819 | ohci_soft_td_t *std; |
| 1820 | |
| 1821 | for (std = LIST_FIRST(&sc->sc_hash_tds[h]); |
| 1822 | std != NULL; |
| 1823 | std = LIST_NEXT(std, hnext)) |
| 1824 | if (std->physaddr == a) |
| 1825 | return std; |
| 1826 | return NULL; |
| 1827 | } |
| 1828 | |
| 1829 | /* Called with USB lock held. */ |
| 1830 | void |
| 1831 | ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) |
| 1832 | { |
| 1833 | int h = HASH(sitd->physaddr); |
| 1834 | |
| 1835 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 1836 | |
| 1837 | KASSERT(mutex_owned(&sc->sc_lock)); |
| 1838 | |
| 1839 | DPRINTFN(10, "sitd=%p physaddr=0x%08lx" , sitd, (u_long)sitd->physaddr, |
| 1840 | 0, 0); |
| 1841 | |
| 1842 | LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); |
| 1843 | } |
| 1844 | |
| 1845 | /* Called with USB lock held. */ |
| 1846 | void |
| 1847 | ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) |
| 1848 | { |
| 1849 | |
| 1850 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 1851 | |
| 1852 | KASSERT(mutex_owned(&sc->sc_lock)); |
| 1853 | |
| 1854 | DPRINTFN(10, "sitd=%p physaddr=0x%08lx" , sitd, (u_long)sitd->physaddr, |
| 1855 | 0, 0); |
| 1856 | |
| 1857 | LIST_REMOVE(sitd, hnext); |
| 1858 | } |
| 1859 | |
| 1860 | ohci_soft_itd_t * |
| 1861 | ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) |
| 1862 | { |
| 1863 | int h = HASH(a); |
| 1864 | ohci_soft_itd_t *sitd; |
| 1865 | |
| 1866 | for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); |
| 1867 | sitd != NULL; |
| 1868 | sitd = LIST_NEXT(sitd, hnext)) |
| 1869 | if (sitd->physaddr == a) |
| 1870 | return sitd; |
| 1871 | return NULL; |
| 1872 | } |
| 1873 | |
| 1874 | void |
| 1875 | ohci_timeout(void *addr) |
| 1876 | { |
| 1877 | struct usbd_xfer *xfer = addr; |
| 1878 | struct ohci_xfer *oxfer = OHCI_XFER2OXFER(xfer); |
| 1879 | ohci_softc_t *sc = OHCI_XFER2SC(xfer); |
| 1880 | |
| 1881 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 1882 | DPRINTF("oxfer=%p" , oxfer, 0, 0, 0); |
| 1883 | |
| 1884 | if (sc->sc_dying) { |
| 1885 | mutex_enter(&sc->sc_lock); |
| 1886 | ohci_abort_xfer(xfer, USBD_TIMEOUT); |
| 1887 | mutex_exit(&sc->sc_lock); |
| 1888 | return; |
| 1889 | } |
| 1890 | |
| 1891 | /* Execute the abort in a process context. */ |
| 1892 | usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr, |
| 1893 | USB_TASKQ_MPSAFE); |
| 1894 | usb_add_task(xfer->ux_pipe->up_dev, &oxfer->abort_task, |
| 1895 | USB_TASKQ_HC); |
| 1896 | } |
| 1897 | |
| 1898 | void |
| 1899 | ohci_timeout_task(void *addr) |
| 1900 | { |
| 1901 | struct usbd_xfer *xfer = addr; |
| 1902 | ohci_softc_t *sc = OHCI_XFER2SC(xfer); |
| 1903 | |
| 1904 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 1905 | |
| 1906 | DPRINTF("xfer=%p" , xfer, 0, 0, 0); |
| 1907 | |
| 1908 | mutex_enter(&sc->sc_lock); |
| 1909 | ohci_abort_xfer(xfer, USBD_TIMEOUT); |
| 1910 | mutex_exit(&sc->sc_lock); |
| 1911 | } |
| 1912 | |
| 1913 | #ifdef OHCI_DEBUG |
| 1914 | void |
| 1915 | ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) |
| 1916 | { |
| 1917 | for (; std; std = std->nexttd) { |
| 1918 | ohci_dump_td(sc, std); |
| 1919 | KASSERTMSG(std->nexttd == NULL || std != std->nexttd, |
| 1920 | "std %p next %p" , std, std->nexttd); |
| 1921 | } |
| 1922 | } |
| 1923 | |
| 1924 | void |
| 1925 | ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) |
| 1926 | { |
| 1927 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 1928 | |
| 1929 | usb_syncmem(&std->dma, std->offs, sizeof(std->td), |
| 1930 | BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); |
| 1931 | |
| 1932 | uint32_t flags = O32TOH(std->td.td_flags); |
| 1933 | DPRINTF("TD(%p) at 0x%08lx:" , std, (u_long)std->physaddr, 0, 0); |
| 1934 | DPRINTF(" round=%d DP=%x DI=%x T=%x" , |
| 1935 | !!(flags & OHCI_TD_R), |
| 1936 | __SHIFTOUT(flags, OHCI_TD_DP_MASK), |
| 1937 | OHCI_TD_GET_DI(flags), |
| 1938 | __SHIFTOUT(flags, OHCI_TD_TOGGLE_MASK)); |
| 1939 | DPRINTF(" EC=%d CC=%d" , OHCI_TD_GET_EC(flags), OHCI_TD_GET_CC(flags), |
| 1940 | 0, 0); |
| 1941 | DPRINTF(" td_cbp=0x%08lx td_nexttd=0x%08lx td_be=0x%08lx" , |
| 1942 | (u_long)O32TOH(std->td.td_cbp), |
| 1943 | (u_long)O32TOH(std->td.td_nexttd), |
| 1944 | (u_long)O32TOH(std->td.td_be), 0); |
| 1945 | } |
| 1946 | |
| 1947 | void |
| 1948 | ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) |
| 1949 | { |
| 1950 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 1951 | |
| 1952 | usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), |
| 1953 | BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); |
| 1954 | |
| 1955 | uint32_t flags = O32TOH(sitd->itd.itd_flags); |
| 1956 | DPRINTF("ITD(%p) at 0x%08lx" , sitd, (u_long)sitd->physaddr, 0, 0); |
| 1957 | DPRINTF(" sf=%d di=%d fc=%d cc=%d" , |
| 1958 | OHCI_ITD_GET_SF(flags), OHCI_ITD_GET_DI(flags), |
| 1959 | OHCI_ITD_GET_FC(flags), OHCI_ITD_GET_CC(flags)); |
| 1960 | DPRINTF(" bp0=0x%08x next=0x%08x be=0x%08x" , |
| 1961 | O32TOH(sitd->itd.itd_bp0), |
| 1962 | O32TOH(sitd->itd.itd_nextitd), |
| 1963 | O32TOH(sitd->itd.itd_be), 0); |
| 1964 | CTASSERT(OHCI_ITD_NOFFSET == 8); |
| 1965 | DPRINTF(" offs[0] = 0x%04x offs[1] = 0x%04x " |
| 1966 | "offs[2] = 0x%04x offs[3] = 0x%04x" , |
| 1967 | O16TOH(sitd->itd.itd_offset[0]), |
| 1968 | O16TOH(sitd->itd.itd_offset[1]), |
| 1969 | O16TOH(sitd->itd.itd_offset[2]), |
| 1970 | O16TOH(sitd->itd.itd_offset[3])); |
| 1971 | DPRINTF(" offs[4] = 0x%04x offs[5] = 0x%04x " |
| 1972 | "offs[6] = 0x%04x offs[7] = 0x%04x" , |
| 1973 | O16TOH(sitd->itd.itd_offset[4]), |
| 1974 | O16TOH(sitd->itd.itd_offset[5]), |
| 1975 | O16TOH(sitd->itd.itd_offset[6]), |
| 1976 | O16TOH(sitd->itd.itd_offset[7])); |
| 1977 | } |
| 1978 | |
| 1979 | void |
| 1980 | ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) |
| 1981 | { |
| 1982 | for (; sitd; sitd = sitd->nextitd) |
| 1983 | ohci_dump_itd(sc, sitd); |
| 1984 | } |
| 1985 | |
| 1986 | void |
| 1987 | ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) |
| 1988 | { |
| 1989 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 1990 | |
| 1991 | usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), |
| 1992 | BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); |
| 1993 | |
| 1994 | uint32_t flags = O32TOH(sed->ed.ed_flags); |
| 1995 | DPRINTF("ED(%p) at 0x%08lx:" , sed, sed->physaddr, 0, 0); |
| 1996 | DPRINTF(" addr=%d endpt=%d maxp=%d" , |
| 1997 | OHCI_ED_GET_FA(flags), |
| 1998 | OHCI_ED_GET_EN(flags), |
| 1999 | OHCI_ED_GET_MAXP(flags), |
| 2000 | 0); |
| 2001 | DPRINTF(" dir=%d speed=%d skip=%d iso=%d" , |
| 2002 | __SHIFTOUT(flags, OHCI_ED_DIR_MASK), |
| 2003 | !!(flags & OHCI_ED_SPEED), |
| 2004 | !!(flags & OHCI_ED_SKIP), |
| 2005 | !!(flags & OHCI_ED_FORMAT_ISO)); |
| 2006 | DPRINTF(" tailp=0x%08lx" , (u_long)O32TOH(sed->ed.ed_tailp), |
| 2007 | 0, 0, 0); |
| 2008 | DPRINTF(" headp=0x%08lx nexted=0x%08lx halted=%d carry=%d" , |
| 2009 | O32TOH(sed->ed.ed_headp), O32TOH(sed->ed.ed_nexted), |
| 2010 | !!(O32TOH(sed->ed.ed_headp) & OHCI_HALTED), |
| 2011 | !!(O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY)); |
| 2012 | } |
| 2013 | #endif |
| 2014 | |
| 2015 | usbd_status |
| 2016 | ohci_open(struct usbd_pipe *pipe) |
| 2017 | { |
| 2018 | struct usbd_device *dev = pipe->up_dev; |
| 2019 | struct usbd_bus *bus = dev->ud_bus; |
| 2020 | ohci_softc_t *sc = OHCI_PIPE2SC(pipe); |
| 2021 | usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc; |
| 2022 | struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); |
| 2023 | uint8_t addr = dev->ud_addr; |
| 2024 | uint8_t xfertype = ed->bmAttributes & UE_XFERTYPE; |
| 2025 | ohci_soft_ed_t *sed; |
| 2026 | ohci_soft_td_t *std; |
| 2027 | ohci_soft_itd_t *sitd; |
| 2028 | ohci_physaddr_t tdphys; |
| 2029 | uint32_t fmt; |
| 2030 | usbd_status err = USBD_NOMEM; |
| 2031 | int ival; |
| 2032 | |
| 2033 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 2034 | DPRINTFN(1, "pipe=%p, addr=%d, endpt=%d (%d)" , pipe, addr, |
| 2035 | ed->bEndpointAddress, bus->ub_rhaddr); |
| 2036 | |
| 2037 | if (sc->sc_dying) { |
| 2038 | return USBD_IOERROR; |
| 2039 | } |
| 2040 | |
| 2041 | std = NULL; |
| 2042 | sed = NULL; |
| 2043 | |
| 2044 | if (addr == bus->ub_rhaddr) { |
| 2045 | switch (ed->bEndpointAddress) { |
| 2046 | case USB_CONTROL_ENDPOINT: |
| 2047 | pipe->up_methods = &roothub_ctrl_methods; |
| 2048 | break; |
| 2049 | case UE_DIR_IN | USBROOTHUB_INTR_ENDPT: |
| 2050 | pipe->up_methods = &ohci_root_intr_methods; |
| 2051 | break; |
| 2052 | default: |
| 2053 | err = USBD_INVAL; |
| 2054 | goto bad; |
| 2055 | } |
| 2056 | } else { |
| 2057 | sed = ohci_alloc_sed(sc); |
| 2058 | if (sed == NULL) |
| 2059 | goto bad; |
| 2060 | opipe->sed = sed; |
| 2061 | if (xfertype == UE_ISOCHRONOUS) { |
| 2062 | sitd = ohci_alloc_sitd(sc); |
| 2063 | if (sitd == NULL) |
| 2064 | goto bad; |
| 2065 | |
| 2066 | opipe->tail.itd = sitd; |
| 2067 | tdphys = sitd->physaddr; |
| 2068 | fmt = OHCI_ED_FORMAT_ISO; |
| 2069 | if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) |
| 2070 | fmt |= OHCI_ED_DIR_IN; |
| 2071 | else |
| 2072 | fmt |= OHCI_ED_DIR_OUT; |
| 2073 | } else { |
| 2074 | std = ohci_alloc_std(sc); |
| 2075 | if (std == NULL) |
| 2076 | goto bad; |
| 2077 | |
| 2078 | opipe->tail.td = std; |
| 2079 | tdphys = std->physaddr; |
| 2080 | fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; |
| 2081 | } |
| 2082 | sed->ed.ed_flags = HTOO32( |
| 2083 | OHCI_ED_SET_FA(addr) | |
| 2084 | OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | |
| 2085 | (dev->ud_speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | |
| 2086 | fmt | |
| 2087 | OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); |
| 2088 | sed->ed.ed_headp = HTOO32(tdphys | |
| 2089 | (pipe->up_endpoint->ue_toggle ? OHCI_TOGGLECARRY : 0)); |
| 2090 | sed->ed.ed_tailp = HTOO32(tdphys); |
| 2091 | usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), |
| 2092 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 2093 | |
| 2094 | switch (xfertype) { |
| 2095 | case UE_CONTROL: |
| 2096 | pipe->up_methods = &ohci_device_ctrl_methods; |
| 2097 | err = usb_allocmem(&sc->sc_bus, |
| 2098 | sizeof(usb_device_request_t), |
| 2099 | 0, &opipe->ctrl.reqdma); |
| 2100 | if (err) |
| 2101 | goto bad; |
| 2102 | mutex_enter(&sc->sc_lock); |
| 2103 | ohci_add_ed(sc, sed, sc->sc_ctrl_head); |
| 2104 | mutex_exit(&sc->sc_lock); |
| 2105 | break; |
| 2106 | case UE_INTERRUPT: |
| 2107 | pipe->up_methods = &ohci_device_intr_methods; |
| 2108 | ival = pipe->up_interval; |
| 2109 | if (ival == USBD_DEFAULT_INTERVAL) |
| 2110 | ival = ed->bInterval; |
| 2111 | err = ohci_device_setintr(sc, opipe, ival); |
| 2112 | if (err) |
| 2113 | goto bad; |
| 2114 | break; |
| 2115 | case UE_ISOCHRONOUS: |
| 2116 | pipe->up_serialise = false; |
| 2117 | pipe->up_methods = &ohci_device_isoc_methods; |
| 2118 | return ohci_setup_isoc(pipe); |
| 2119 | case UE_BULK: |
| 2120 | pipe->up_methods = &ohci_device_bulk_methods; |
| 2121 | mutex_enter(&sc->sc_lock); |
| 2122 | ohci_add_ed(sc, sed, sc->sc_bulk_head); |
| 2123 | mutex_exit(&sc->sc_lock); |
| 2124 | break; |
| 2125 | } |
| 2126 | } |
| 2127 | |
| 2128 | return USBD_NORMAL_COMPLETION; |
| 2129 | |
| 2130 | bad: |
| 2131 | if (std != NULL) { |
| 2132 | ohci_free_std(sc, std); |
| 2133 | } |
| 2134 | if (sed != NULL) |
| 2135 | ohci_free_sed(sc, sed); |
| 2136 | return err; |
| 2137 | |
| 2138 | } |
| 2139 | |
| 2140 | /* |
| 2141 | * Close a reqular pipe. |
| 2142 | * Assumes that there are no pending transactions. |
| 2143 | */ |
| 2144 | void |
| 2145 | ohci_close_pipe(struct usbd_pipe *pipe, ohci_soft_ed_t *head) |
| 2146 | { |
| 2147 | struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); |
| 2148 | ohci_softc_t *sc = OHCI_PIPE2SC(pipe); |
| 2149 | ohci_soft_ed_t *sed = opipe->sed; |
| 2150 | |
| 2151 | KASSERT(mutex_owned(&sc->sc_lock)); |
| 2152 | |
| 2153 | #ifdef DIAGNOSTIC |
| 2154 | sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); |
| 2155 | if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != |
| 2156 | (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { |
| 2157 | ohci_soft_td_t *std; |
| 2158 | std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); |
| 2159 | printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " |
| 2160 | "tl=0x%x pipe=%p, std=%p\n" , sed, |
| 2161 | (int)O32TOH(sed->ed.ed_headp), |
| 2162 | (int)O32TOH(sed->ed.ed_tailp), |
| 2163 | pipe, std); |
| 2164 | #ifdef OHCI_DEBUG |
| 2165 | usbd_dump_pipe(&opipe->pipe); |
| 2166 | ohci_dump_ed(sc, sed); |
| 2167 | if (std) |
| 2168 | ohci_dump_td(sc, std); |
| 2169 | #endif |
| 2170 | usb_delay_ms(&sc->sc_bus, 2); |
| 2171 | if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != |
| 2172 | (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) |
| 2173 | printf("ohci_close_pipe: pipe still not empty\n" ); |
| 2174 | } |
| 2175 | #endif |
| 2176 | ohci_rem_ed(sc, sed, head); |
| 2177 | /* Make sure the host controller is not touching this ED */ |
| 2178 | usb_delay_ms(&sc->sc_bus, 1); |
| 2179 | pipe->up_endpoint->ue_toggle = |
| 2180 | (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0; |
| 2181 | ohci_free_sed_locked(sc, opipe->sed); |
| 2182 | } |
| 2183 | |
| 2184 | /* |
| 2185 | * Abort a device request. |
| 2186 | * If this routine is called at splusb() it guarantees that the request |
| 2187 | * will be removed from the hardware scheduling and that the callback |
| 2188 | * for it will be called with USBD_CANCELLED status. |
| 2189 | * It's impossible to guarantee that the requested transfer will not |
| 2190 | * have happened since the hardware runs concurrently. |
| 2191 | * If the transaction has already happened we rely on the ordinary |
| 2192 | * interrupt processing to process it. |
| 2193 | * XXX This is most probably wrong. |
| 2194 | * XXXMRG this doesn't make sense anymore. |
| 2195 | */ |
| 2196 | void |
| 2197 | ohci_abort_xfer(struct usbd_xfer *xfer, usbd_status status) |
| 2198 | { |
| 2199 | struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); |
| 2200 | ohci_softc_t *sc = OHCI_XFER2SC(xfer); |
| 2201 | ohci_soft_ed_t *sed = opipe->sed; |
| 2202 | ohci_soft_td_t *p, *n; |
| 2203 | ohci_physaddr_t headp; |
| 2204 | int hit; |
| 2205 | int wake; |
| 2206 | |
| 2207 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 2208 | DPRINTF("xfer=%p pipe=%p sed=%p" , xfer, opipe,sed, 0); |
| 2209 | |
| 2210 | KASSERT(mutex_owned(&sc->sc_lock)); |
| 2211 | ASSERT_SLEEPABLE(); |
| 2212 | |
| 2213 | if (sc->sc_dying) { |
| 2214 | /* If we're dying, just do the software part. */ |
| 2215 | xfer->ux_status = status; /* make software ignore it */ |
| 2216 | callout_halt(&xfer->ux_callout, &sc->sc_lock); |
| 2217 | usb_transfer_complete(xfer); |
| 2218 | return; |
| 2219 | } |
| 2220 | |
| 2221 | /* |
| 2222 | * If an abort is already in progress then just wait for it to |
| 2223 | * complete and return. |
| 2224 | */ |
| 2225 | if (xfer->ux_hcflags & UXFER_ABORTING) { |
| 2226 | DPRINTFN(2, "already aborting" , 0, 0, 0, 0); |
| 2227 | #ifdef DIAGNOSTIC |
| 2228 | if (status == USBD_TIMEOUT) |
| 2229 | printf("%s: TIMEOUT while aborting\n" , __func__); |
| 2230 | #endif |
| 2231 | /* Override the status which might be USBD_TIMEOUT. */ |
| 2232 | xfer->ux_status = status; |
| 2233 | DPRINTFN(2, "waiting for abort to finish" , 0, 0, 0, 0); |
| 2234 | xfer->ux_hcflags |= UXFER_ABORTWAIT; |
| 2235 | while (xfer->ux_hcflags & UXFER_ABORTING) |
| 2236 | cv_wait(&xfer->ux_hccv, &sc->sc_lock); |
| 2237 | goto done; |
| 2238 | } |
| 2239 | xfer->ux_hcflags |= UXFER_ABORTING; |
| 2240 | |
| 2241 | /* |
| 2242 | * Step 1: Make interrupt routine and hardware ignore xfer. |
| 2243 | */ |
| 2244 | xfer->ux_status = status; /* make software ignore it */ |
| 2245 | callout_stop(&xfer->ux_callout); |
| 2246 | DPRINTFN(1, "stop ed=%p" , sed, 0, 0, 0); |
| 2247 | usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), |
| 2248 | sizeof(sed->ed.ed_flags), |
| 2249 | BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); |
| 2250 | sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ |
| 2251 | usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), |
| 2252 | sizeof(sed->ed.ed_flags), |
| 2253 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 2254 | |
| 2255 | /* |
| 2256 | * Step 2: Wait until we know hardware has finished any possible |
| 2257 | * use of the xfer. Also make sure the soft interrupt routine |
| 2258 | * has run. |
| 2259 | */ |
| 2260 | /* Hardware finishes in 1ms */ |
| 2261 | usb_delay_ms_locked(opipe->pipe.up_dev->ud_bus, 20, &sc->sc_lock); |
| 2262 | sc->sc_softwake = 1; |
| 2263 | usb_schedsoftintr(&sc->sc_bus); |
| 2264 | cv_wait(&sc->sc_softwake_cv, &sc->sc_lock); |
| 2265 | |
| 2266 | /* |
| 2267 | * Step 3: Remove any vestiges of the xfer from the hardware. |
| 2268 | * The complication here is that the hardware may have executed |
| 2269 | * beyond the xfer we're trying to abort. So as we're scanning |
| 2270 | * the TDs of this xfer we check if the hardware points to |
| 2271 | * any of them. |
| 2272 | */ |
| 2273 | p = xfer->ux_hcpriv; |
| 2274 | KASSERT(p); |
| 2275 | |
| 2276 | #ifdef OHCI_DEBUG |
| 2277 | DPRINTF("--- dump start ---" , 0, 0, 0, 0); |
| 2278 | |
| 2279 | if (ohcidebug >= 2) { |
| 2280 | DPRINTF("sed:" , 0, 0, 0, 0); |
| 2281 | ohci_dump_ed(sc, sed); |
| 2282 | ohci_dump_tds(sc, p); |
| 2283 | } |
| 2284 | DPRINTF("--- dump end ---" , 0, 0, 0, 0); |
| 2285 | #endif |
| 2286 | headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; |
| 2287 | hit = 0; |
| 2288 | for (; p->xfer == xfer; p = n) { |
| 2289 | hit |= headp == p->physaddr; |
| 2290 | n = p->nexttd; |
| 2291 | ohci_hash_rem_td(sc, p); |
| 2292 | } |
| 2293 | /* Zap headp register if hardware pointed inside the xfer. */ |
| 2294 | if (hit) { |
| 2295 | DPRINTFN(1, "set hd=0x%08x, tl=0x%08x" , (int)p->physaddr, |
| 2296 | (int)O32TOH(sed->ed.ed_tailp), 0, 0); |
| 2297 | sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ |
| 2298 | usb_syncmem(&sed->dma, |
| 2299 | sed->offs + offsetof(ohci_ed_t, ed_headp), |
| 2300 | sizeof(sed->ed.ed_headp), |
| 2301 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 2302 | } else { |
| 2303 | DPRINTFN(1, "no hit" , 0, 0, 0, 0); |
| 2304 | } |
| 2305 | |
| 2306 | /* |
| 2307 | * Step 4: Turn on hardware again. |
| 2308 | */ |
| 2309 | usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), |
| 2310 | sizeof(sed->ed.ed_flags), |
| 2311 | BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); |
| 2312 | sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ |
| 2313 | usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), |
| 2314 | sizeof(sed->ed.ed_flags), |
| 2315 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 2316 | |
| 2317 | /* |
| 2318 | * Step 5: Execute callback. |
| 2319 | */ |
| 2320 | wake = xfer->ux_hcflags & UXFER_ABORTWAIT; |
| 2321 | xfer->ux_hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); |
| 2322 | usb_transfer_complete(xfer); |
| 2323 | if (wake) |
| 2324 | cv_broadcast(&xfer->ux_hccv); |
| 2325 | |
| 2326 | done: |
| 2327 | KASSERT(mutex_owned(&sc->sc_lock)); |
| 2328 | } |
| 2329 | |
| 2330 | /* |
| 2331 | * Data structures and routines to emulate the root hub. |
| 2332 | */ |
| 2333 | Static int |
| 2334 | ohci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req, |
| 2335 | void *buf, int buflen) |
| 2336 | { |
| 2337 | ohci_softc_t *sc = OHCI_BUS2SC(bus); |
| 2338 | usb_port_status_t ps; |
| 2339 | uint16_t len, value, index; |
| 2340 | int l, totlen = 0; |
| 2341 | int port, i; |
| 2342 | uint32_t v; |
| 2343 | |
| 2344 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 2345 | |
| 2346 | if (sc->sc_dying) |
| 2347 | return -1; |
| 2348 | |
| 2349 | DPRINTFN(4, "type=0x%02x request=%02x" , req->bmRequestType, |
| 2350 | req->bRequest, 0, 0); |
| 2351 | |
| 2352 | len = UGETW(req->wLength); |
| 2353 | value = UGETW(req->wValue); |
| 2354 | index = UGETW(req->wIndex); |
| 2355 | |
| 2356 | #define C(x,y) ((x) | ((y) << 8)) |
| 2357 | switch (C(req->bRequest, req->bmRequestType)) { |
| 2358 | case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): |
| 2359 | DPRINTFN(8, "wValue=0x%04x" , value, 0, 0, 0); |
| 2360 | if (len == 0) |
| 2361 | break; |
| 2362 | switch (value) { |
| 2363 | case C(0, UDESC_DEVICE): { |
| 2364 | usb_device_descriptor_t devd; |
| 2365 | |
| 2366 | totlen = min(buflen, sizeof(devd)); |
| 2367 | memcpy(&devd, buf, totlen); |
| 2368 | USETW(devd.idVendor, sc->sc_id_vendor); |
| 2369 | memcpy(buf, &devd, totlen); |
| 2370 | break; |
| 2371 | } |
| 2372 | case C(1, UDESC_STRING): |
| 2373 | #define sd ((usb_string_descriptor_t *)buf) |
| 2374 | /* Vendor */ |
| 2375 | totlen = usb_makestrdesc(sd, len, sc->sc_vendor); |
| 2376 | break; |
| 2377 | case C(2, UDESC_STRING): |
| 2378 | /* Product */ |
| 2379 | totlen = usb_makestrdesc(sd, len, "OHCI root hub" ); |
| 2380 | break; |
| 2381 | #undef sd |
| 2382 | default: |
| 2383 | /* default from usbroothub */ |
| 2384 | return buflen; |
| 2385 | } |
| 2386 | break; |
| 2387 | |
| 2388 | /* Hub requests */ |
| 2389 | case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): |
| 2390 | break; |
| 2391 | case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): |
| 2392 | DPRINTFN(8, "UR_CLEAR_PORT_FEATURE port=%d feature=%d" , |
| 2393 | index, value, 0, 0); |
| 2394 | if (index < 1 || index > sc->sc_noport) { |
| 2395 | return -1; |
| 2396 | } |
| 2397 | port = OHCI_RH_PORT_STATUS(index); |
| 2398 | switch(value) { |
| 2399 | case UHF_PORT_ENABLE: |
| 2400 | OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); |
| 2401 | break; |
| 2402 | case UHF_PORT_SUSPEND: |
| 2403 | OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); |
| 2404 | break; |
| 2405 | case UHF_PORT_POWER: |
| 2406 | /* Yes, writing to the LOW_SPEED bit clears power. */ |
| 2407 | OWRITE4(sc, port, UPS_LOW_SPEED); |
| 2408 | break; |
| 2409 | case UHF_C_PORT_CONNECTION: |
| 2410 | OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); |
| 2411 | break; |
| 2412 | case UHF_C_PORT_ENABLE: |
| 2413 | OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); |
| 2414 | break; |
| 2415 | case UHF_C_PORT_SUSPEND: |
| 2416 | OWRITE4(sc, port, UPS_C_SUSPEND << 16); |
| 2417 | break; |
| 2418 | case UHF_C_PORT_OVER_CURRENT: |
| 2419 | OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); |
| 2420 | break; |
| 2421 | case UHF_C_PORT_RESET: |
| 2422 | OWRITE4(sc, port, UPS_C_PORT_RESET << 16); |
| 2423 | break; |
| 2424 | default: |
| 2425 | return -1; |
| 2426 | } |
| 2427 | switch(value) { |
| 2428 | case UHF_C_PORT_CONNECTION: |
| 2429 | case UHF_C_PORT_ENABLE: |
| 2430 | case UHF_C_PORT_SUSPEND: |
| 2431 | case UHF_C_PORT_OVER_CURRENT: |
| 2432 | case UHF_C_PORT_RESET: |
| 2433 | /* Enable RHSC interrupt if condition is cleared. */ |
| 2434 | if ((OREAD4(sc, port) >> 16) == 0) |
| 2435 | ohci_rhsc_enable(sc); |
| 2436 | break; |
| 2437 | default: |
| 2438 | break; |
| 2439 | } |
| 2440 | break; |
| 2441 | case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): |
| 2442 | if (len == 0) |
| 2443 | break; |
| 2444 | if ((value & 0xff) != 0) { |
| 2445 | return -1; |
| 2446 | } |
| 2447 | usb_hub_descriptor_t hubd; |
| 2448 | |
| 2449 | totlen = min(buflen, sizeof(hubd)); |
| 2450 | memcpy(&hubd, buf, totlen); |
| 2451 | |
| 2452 | v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); |
| 2453 | hubd.bNbrPorts = sc->sc_noport; |
| 2454 | USETW(hubd.wHubCharacteristics, |
| 2455 | (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : |
| 2456 | v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) |
| 2457 | /* XXX overcurrent */ |
| 2458 | ); |
| 2459 | hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); |
| 2460 | v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); |
| 2461 | for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) |
| 2462 | hubd.DeviceRemovable[i++] = (uint8_t)v; |
| 2463 | hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; |
| 2464 | totlen = min(totlen, hubd.bDescLength); |
| 2465 | memcpy(buf, &hubd, totlen); |
| 2466 | break; |
| 2467 | case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): |
| 2468 | if (len != 4) { |
| 2469 | return -1; |
| 2470 | } |
| 2471 | memset(buf, 0, len); /* ? XXX */ |
| 2472 | totlen = len; |
| 2473 | break; |
| 2474 | case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): |
| 2475 | DPRINTFN(8, "get port status i=%d" , index, 0, 0, 0); |
| 2476 | if (index < 1 || index > sc->sc_noport) { |
| 2477 | return -1; |
| 2478 | } |
| 2479 | if (len != 4) { |
| 2480 | return -1; |
| 2481 | } |
| 2482 | v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); |
| 2483 | DPRINTFN(8, "port status=0x%04x" , v, 0, 0, 0); |
| 2484 | USETW(ps.wPortStatus, v); |
| 2485 | USETW(ps.wPortChange, v >> 16); |
| 2486 | totlen = min(len, sizeof(ps)); |
| 2487 | memcpy(buf, &ps, totlen); |
| 2488 | break; |
| 2489 | case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): |
| 2490 | return -1; |
| 2491 | case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): |
| 2492 | break; |
| 2493 | case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): |
| 2494 | if (index < 1 || index > sc->sc_noport) { |
| 2495 | return -1; |
| 2496 | } |
| 2497 | port = OHCI_RH_PORT_STATUS(index); |
| 2498 | switch(value) { |
| 2499 | case UHF_PORT_ENABLE: |
| 2500 | OWRITE4(sc, port, UPS_PORT_ENABLED); |
| 2501 | break; |
| 2502 | case UHF_PORT_SUSPEND: |
| 2503 | OWRITE4(sc, port, UPS_SUSPEND); |
| 2504 | break; |
| 2505 | case UHF_PORT_RESET: |
| 2506 | DPRINTFN(5, "reset port %d" , index, 0, 0, 0); |
| 2507 | OWRITE4(sc, port, UPS_RESET); |
| 2508 | for (i = 0; i < 5; i++) { |
| 2509 | usb_delay_ms(&sc->sc_bus, |
| 2510 | USB_PORT_ROOT_RESET_DELAY); |
| 2511 | if (sc->sc_dying) { |
| 2512 | return -1; |
| 2513 | } |
| 2514 | if ((OREAD4(sc, port) & UPS_RESET) == 0) |
| 2515 | break; |
| 2516 | } |
| 2517 | DPRINTFN(8, "port %d reset, status = 0x%04x" , index, |
| 2518 | OREAD4(sc, port), 0, 0); |
| 2519 | break; |
| 2520 | case UHF_PORT_POWER: |
| 2521 | DPRINTFN(2, "set port power %d" , index, 0, 0, 0); |
| 2522 | OWRITE4(sc, port, UPS_PORT_POWER); |
| 2523 | break; |
| 2524 | default: |
| 2525 | return -1; |
| 2526 | } |
| 2527 | break; |
| 2528 | default: |
| 2529 | /* default from usbroothub */ |
| 2530 | return buflen; |
| 2531 | } |
| 2532 | |
| 2533 | return totlen; |
| 2534 | } |
| 2535 | |
| 2536 | Static usbd_status |
| 2537 | ohci_root_intr_transfer(struct usbd_xfer *xfer) |
| 2538 | { |
| 2539 | ohci_softc_t *sc = OHCI_XFER2SC(xfer); |
| 2540 | usbd_status err; |
| 2541 | |
| 2542 | /* Insert last in queue. */ |
| 2543 | mutex_enter(&sc->sc_lock); |
| 2544 | err = usb_insert_transfer(xfer); |
| 2545 | mutex_exit(&sc->sc_lock); |
| 2546 | if (err) |
| 2547 | return err; |
| 2548 | |
| 2549 | /* Pipe isn't running, start first */ |
| 2550 | return ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); |
| 2551 | } |
| 2552 | |
| 2553 | Static usbd_status |
| 2554 | ohci_root_intr_start(struct usbd_xfer *xfer) |
| 2555 | { |
| 2556 | ohci_softc_t *sc = OHCI_XFER2SC(xfer); |
| 2557 | |
| 2558 | if (sc->sc_dying) |
| 2559 | return USBD_IOERROR; |
| 2560 | |
| 2561 | mutex_enter(&sc->sc_lock); |
| 2562 | KASSERT(sc->sc_intrxfer == NULL); |
| 2563 | sc->sc_intrxfer = xfer; |
| 2564 | mutex_exit(&sc->sc_lock); |
| 2565 | |
| 2566 | return USBD_IN_PROGRESS; |
| 2567 | } |
| 2568 | |
| 2569 | /* Abort a root interrupt request. */ |
| 2570 | Static void |
| 2571 | ohci_root_intr_abort(struct usbd_xfer *xfer) |
| 2572 | { |
| 2573 | ohci_softc_t *sc = OHCI_XFER2SC(xfer); |
| 2574 | |
| 2575 | KASSERT(mutex_owned(&sc->sc_lock)); |
| 2576 | KASSERT(xfer->ux_pipe->up_intrxfer == xfer); |
| 2577 | |
| 2578 | sc->sc_intrxfer = NULL; |
| 2579 | |
| 2580 | xfer->ux_status = USBD_CANCELLED; |
| 2581 | usb_transfer_complete(xfer); |
| 2582 | } |
| 2583 | |
| 2584 | /* Close the root pipe. */ |
| 2585 | Static void |
| 2586 | ohci_root_intr_close(struct usbd_pipe *pipe) |
| 2587 | { |
| 2588 | ohci_softc_t *sc = OHCI_PIPE2SC(pipe); |
| 2589 | |
| 2590 | KASSERT(mutex_owned(&sc->sc_lock)); |
| 2591 | |
| 2592 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 2593 | |
| 2594 | sc->sc_intrxfer = NULL; |
| 2595 | } |
| 2596 | |
| 2597 | /************************/ |
| 2598 | |
| 2599 | int |
| 2600 | ohci_device_ctrl_init(struct usbd_xfer *xfer) |
| 2601 | { |
| 2602 | struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); |
| 2603 | usb_device_request_t *req = &xfer->ux_request; |
| 2604 | ohci_softc_t *sc = OHCI_XFER2SC(xfer); |
| 2605 | ohci_soft_td_t *stat, *setup; |
| 2606 | int isread = req->bmRequestType & UT_READ; |
| 2607 | int len = xfer->ux_bufsize; |
| 2608 | int err = ENOMEM; |
| 2609 | |
| 2610 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 2611 | |
| 2612 | setup = ohci_alloc_std(sc); |
| 2613 | if (setup == NULL) { |
| 2614 | goto bad1; |
| 2615 | } |
| 2616 | stat = ohci_alloc_std(sc); |
| 2617 | if (stat == NULL) { |
| 2618 | goto bad2; |
| 2619 | } |
| 2620 | |
| 2621 | ox->ox_setup = setup; |
| 2622 | ox->ox_stat = stat; |
| 2623 | ox->ox_nstd = 0; |
| 2624 | |
| 2625 | /* Set up data transaction */ |
| 2626 | if (len != 0) { |
| 2627 | err = ohci_alloc_std_chain(sc, xfer, len, isread); |
| 2628 | if (err) { |
| 2629 | goto bad3; |
| 2630 | } |
| 2631 | } |
| 2632 | return 0; |
| 2633 | |
| 2634 | bad3: |
| 2635 | ohci_free_std(sc, stat); |
| 2636 | bad2: |
| 2637 | ohci_free_std(sc, setup); |
| 2638 | bad1: |
| 2639 | return err; |
| 2640 | } |
| 2641 | |
| 2642 | void |
| 2643 | ohci_device_ctrl_fini(struct usbd_xfer *xfer) |
| 2644 | { |
| 2645 | struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); |
| 2646 | ohci_softc_t *sc = OHCI_XFER2SC(xfer); |
| 2647 | struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); |
| 2648 | |
| 2649 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 2650 | DPRINTFN(8, "xfer %p nstd %d" , xfer, ox->ox_nstd, 0, 0); |
| 2651 | |
| 2652 | mutex_enter(&sc->sc_lock); |
| 2653 | if (ox->ox_setup != opipe->tail.td) { |
| 2654 | ohci_free_std_locked(sc, ox->ox_setup); |
| 2655 | } |
| 2656 | for (size_t i = 0; i < ox->ox_nstd; i++) { |
| 2657 | ohci_soft_td_t *std = ox->ox_stds[i]; |
| 2658 | if (std == NULL) |
| 2659 | break; |
| 2660 | ohci_free_std_locked(sc, std); |
| 2661 | } |
| 2662 | ohci_free_std_locked(sc, ox->ox_stat); |
| 2663 | mutex_exit(&sc->sc_lock); |
| 2664 | |
| 2665 | if (ox->ox_nstd) { |
| 2666 | const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; |
| 2667 | kmem_free(ox->ox_stds, sz); |
| 2668 | } |
| 2669 | } |
| 2670 | |
| 2671 | Static usbd_status |
| 2672 | ohci_device_ctrl_transfer(struct usbd_xfer *xfer) |
| 2673 | { |
| 2674 | ohci_softc_t *sc = OHCI_XFER2SC(xfer); |
| 2675 | usbd_status err; |
| 2676 | |
| 2677 | /* Insert last in queue. */ |
| 2678 | mutex_enter(&sc->sc_lock); |
| 2679 | err = usb_insert_transfer(xfer); |
| 2680 | mutex_exit(&sc->sc_lock); |
| 2681 | if (err) |
| 2682 | return err; |
| 2683 | |
| 2684 | /* Pipe isn't running, start first */ |
| 2685 | return ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); |
| 2686 | } |
| 2687 | |
| 2688 | Static usbd_status |
| 2689 | ohci_device_ctrl_start(struct usbd_xfer *xfer) |
| 2690 | { |
| 2691 | ohci_softc_t *sc = OHCI_XFER2SC(xfer); |
| 2692 | struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); |
| 2693 | struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); |
| 2694 | usb_device_request_t *req = &xfer->ux_request; |
| 2695 | struct usbd_device *dev __diagused = opipe->pipe.up_dev; |
| 2696 | ohci_soft_td_t *setup, *stat, *next, *tail; |
| 2697 | ohci_soft_ed_t *sed; |
| 2698 | int isread; |
| 2699 | int len; |
| 2700 | |
| 2701 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 2702 | |
| 2703 | if (sc->sc_dying) |
| 2704 | return USBD_IOERROR; |
| 2705 | |
| 2706 | KASSERT(xfer->ux_rqflags & URQ_REQUEST); |
| 2707 | |
| 2708 | isread = req->bmRequestType & UT_READ; |
| 2709 | len = UGETW(req->wLength); |
| 2710 | |
| 2711 | DPRINTF("xfer=%p len=%d, addr=%d, endpt=%d" , xfer, len, dev->ud_addr, |
| 2712 | opipe->pipe.up_endpoint->ue_edesc->bEndpointAddress); |
| 2713 | DPRINTF("type=0x%02x, request=0x%02x, wValue=0x%04x, wIndex=0x%04x" , |
| 2714 | req->bmRequestType, req->bRequest, UGETW(req->wValue), |
| 2715 | UGETW(req->wIndex)); |
| 2716 | |
| 2717 | /* Need to take lock here for pipe->tail.td */ |
| 2718 | mutex_enter(&sc->sc_lock); |
| 2719 | |
| 2720 | /* |
| 2721 | * Use the pipe "tail" TD as our first and loan our first TD to the |
| 2722 | * next transfer |
| 2723 | */ |
| 2724 | setup = opipe->tail.td; |
| 2725 | opipe->tail.td = ox->ox_setup; |
| 2726 | ox->ox_setup = setup; |
| 2727 | |
| 2728 | stat = ox->ox_stat; |
| 2729 | |
| 2730 | /* point at sentinel */ |
| 2731 | tail = opipe->tail.td; |
| 2732 | sed = opipe->sed; |
| 2733 | |
| 2734 | KASSERTMSG(OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)) == dev->ud_addr, |
| 2735 | "address ED %d pipe %d\n" , |
| 2736 | OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), dev->ud_addr); |
| 2737 | KASSERTMSG(OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)) == |
| 2738 | UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize), |
| 2739 | "MPL ED %d pipe %d\n" , |
| 2740 | OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), |
| 2741 | UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize)); |
| 2742 | |
| 2743 | /* next will point to data if len != 0 */ |
| 2744 | next = stat; |
| 2745 | |
| 2746 | /* Set up data transaction */ |
| 2747 | if (len != 0) { |
| 2748 | ohci_soft_td_t *std; |
| 2749 | ohci_soft_td_t *end; |
| 2750 | |
| 2751 | next = ox->ox_stds[0]; |
| 2752 | ohci_reset_std_chain(sc, xfer, len, isread, next, &end); |
| 2753 | |
| 2754 | end->td.td_nexttd = HTOO32(stat->physaddr); |
| 2755 | end->nexttd = stat; |
| 2756 | |
| 2757 | usb_syncmem(&end->dma, |
| 2758 | end->offs + offsetof(ohci_td_t, td_nexttd), |
| 2759 | sizeof(end->td.td_nexttd), |
| 2760 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 2761 | |
| 2762 | usb_syncmem(&xfer->ux_dmabuf, 0, len, |
| 2763 | isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); |
| 2764 | std = ox->ox_stds[0]; |
| 2765 | /* Start toggle at 1 and then use the carried toggle. */ |
| 2766 | std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); |
| 2767 | std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); |
| 2768 | usb_syncmem(&std->dma, |
| 2769 | std->offs + offsetof(ohci_td_t, td_flags), |
| 2770 | sizeof(std->td.td_flags), |
| 2771 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 2772 | } |
| 2773 | |
| 2774 | DPRINTFN(8, "setup %p data %p stat %p tail %p" , setup, |
| 2775 | (len != 0 ? ox->ox_stds[0] : NULL), stat, tail); |
| 2776 | KASSERT(opipe->tail.td == tail); |
| 2777 | |
| 2778 | memcpy(KERNADDR(&opipe->ctrl.reqdma, 0), req, sizeof(*req)); |
| 2779 | usb_syncmem(&opipe->ctrl.reqdma, 0, sizeof(*req), BUS_DMASYNC_PREWRITE); |
| 2780 | |
| 2781 | setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | |
| 2782 | OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); |
| 2783 | setup->td.td_cbp = HTOO32(DMAADDR(&opipe->ctrl.reqdma, 0)); |
| 2784 | setup->td.td_nexttd = HTOO32(next->physaddr); |
| 2785 | setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof(*req) - 1); |
| 2786 | setup->nexttd = next; |
| 2787 | setup->len = 0; |
| 2788 | setup->xfer = xfer; |
| 2789 | setup->flags = 0; |
| 2790 | ohci_hash_add_td(sc, setup); |
| 2791 | |
| 2792 | xfer->ux_hcpriv = setup; |
| 2793 | usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), |
| 2794 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 2795 | |
| 2796 | stat->td.td_flags = HTOO32( |
| 2797 | (isread ? OHCI_TD_OUT : OHCI_TD_IN) | |
| 2798 | OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); |
| 2799 | stat->td.td_cbp = 0; |
| 2800 | stat->td.td_nexttd = HTOO32(tail->physaddr); |
| 2801 | stat->td.td_be = 0; |
| 2802 | stat->nexttd = tail; |
| 2803 | stat->flags = OHCI_CALL_DONE; |
| 2804 | stat->len = 0; |
| 2805 | stat->xfer = xfer; |
| 2806 | ohci_hash_add_td(sc, stat); |
| 2807 | |
| 2808 | usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), |
| 2809 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 2810 | |
| 2811 | memset(&tail->td, 0, sizeof(tail->td)); |
| 2812 | tail->nexttd = NULL; |
| 2813 | tail->xfer = NULL; |
| 2814 | |
| 2815 | usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), |
| 2816 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 2817 | |
| 2818 | #ifdef OHCI_DEBUG |
| 2819 | USBHIST_LOGN(ohcidebug, 5, "--- dump start ---" , 0, 0, 0, 0); |
| 2820 | if (ohcidebug >= 5) { |
| 2821 | ohci_dump_ed(sc, sed); |
| 2822 | ohci_dump_tds(sc, setup); |
| 2823 | } |
| 2824 | USBHIST_LOGN(ohcidebug, 5, "--- dump end ---" , 0, 0, 0, 0); |
| 2825 | #endif |
| 2826 | |
| 2827 | /* Insert ED in schedule */ |
| 2828 | sed->ed.ed_tailp = HTOO32(tail->physaddr); |
| 2829 | usb_syncmem(&sed->dma, |
| 2830 | sed->offs + offsetof(ohci_ed_t, ed_tailp), |
| 2831 | sizeof(sed->ed.ed_tailp), |
| 2832 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 2833 | OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); |
| 2834 | if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { |
| 2835 | callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), |
| 2836 | ohci_timeout, xfer); |
| 2837 | } |
| 2838 | |
| 2839 | DPRINTF("done" , 0, 0, 0, 0); |
| 2840 | |
| 2841 | mutex_exit(&sc->sc_lock); |
| 2842 | |
| 2843 | return USBD_IN_PROGRESS; |
| 2844 | } |
| 2845 | |
| 2846 | /* Abort a device control request. */ |
| 2847 | Static void |
| 2848 | ohci_device_ctrl_abort(struct usbd_xfer *xfer) |
| 2849 | { |
| 2850 | ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); |
| 2851 | |
| 2852 | KASSERT(mutex_owned(&sc->sc_lock)); |
| 2853 | |
| 2854 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 2855 | DPRINTF("xfer=%p" , xfer, 0, 0, 0); |
| 2856 | ohci_abort_xfer(xfer, USBD_CANCELLED); |
| 2857 | } |
| 2858 | |
| 2859 | /* Close a device control pipe. */ |
| 2860 | Static void |
| 2861 | ohci_device_ctrl_close(struct usbd_pipe *pipe) |
| 2862 | { |
| 2863 | struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); |
| 2864 | ohci_softc_t *sc = OHCI_PIPE2SC(pipe); |
| 2865 | |
| 2866 | KASSERT(mutex_owned(&sc->sc_lock)); |
| 2867 | |
| 2868 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 2869 | DPRINTF("pipe=%p" , pipe, 0, 0, 0); |
| 2870 | ohci_close_pipe(pipe, sc->sc_ctrl_head); |
| 2871 | ohci_free_std_locked(sc, opipe->tail.td); |
| 2872 | } |
| 2873 | |
| 2874 | /************************/ |
| 2875 | |
| 2876 | Static void |
| 2877 | ohci_device_clear_toggle(struct usbd_pipe *pipe) |
| 2878 | { |
| 2879 | struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); |
| 2880 | ohci_softc_t *sc = OHCI_PIPE2SC(pipe); |
| 2881 | |
| 2882 | opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); |
| 2883 | } |
| 2884 | |
| 2885 | Static void |
| 2886 | ohci_noop(struct usbd_pipe *pipe) |
| 2887 | { |
| 2888 | } |
| 2889 | |
| 2890 | Static int |
| 2891 | ohci_device_bulk_init(struct usbd_xfer *xfer) |
| 2892 | { |
| 2893 | ohci_softc_t *sc = OHCI_XFER2SC(xfer); |
| 2894 | int len = xfer->ux_bufsize; |
| 2895 | int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;; |
| 2896 | int isread = UE_GET_DIR(endpt) == UE_DIR_IN; |
| 2897 | int err; |
| 2898 | |
| 2899 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 2900 | |
| 2901 | KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); |
| 2902 | |
| 2903 | DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d" , xfer, len, isread, |
| 2904 | xfer->ux_flags); |
| 2905 | DPRINTFN(4, "endpt=%d" , endpt, 0, 0, 0); |
| 2906 | |
| 2907 | /* Allocate a chain of new TDs (including a new tail). */ |
| 2908 | err = ohci_alloc_std_chain(sc, xfer, len, isread); |
| 2909 | if (err) |
| 2910 | return err; |
| 2911 | |
| 2912 | return 0; |
| 2913 | } |
| 2914 | |
| 2915 | Static void |
| 2916 | ohci_device_bulk_fini(struct usbd_xfer *xfer) |
| 2917 | { |
| 2918 | ohci_softc_t *sc = OHCI_XFER2SC(xfer); |
| 2919 | struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); |
| 2920 | struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); |
| 2921 | |
| 2922 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 2923 | DPRINTFN(8, "xfer %p nstd %d" , xfer, ox->ox_nstd, 0, 0); |
| 2924 | |
| 2925 | mutex_enter(&sc->sc_lock); |
| 2926 | for (size_t i = 0; i < ox->ox_nstd; i++) { |
| 2927 | ohci_soft_td_t *std = ox->ox_stds[i]; |
| 2928 | if (std == NULL) |
| 2929 | break; |
| 2930 | if (std != opipe->tail.td) |
| 2931 | ohci_free_std_locked(sc, std); |
| 2932 | } |
| 2933 | mutex_exit(&sc->sc_lock); |
| 2934 | |
| 2935 | if (ox->ox_nstd) { |
| 2936 | const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; |
| 2937 | kmem_free(ox->ox_stds, sz); |
| 2938 | } |
| 2939 | } |
| 2940 | |
| 2941 | Static usbd_status |
| 2942 | ohci_device_bulk_transfer(struct usbd_xfer *xfer) |
| 2943 | { |
| 2944 | ohci_softc_t *sc = OHCI_XFER2SC(xfer); |
| 2945 | usbd_status err; |
| 2946 | |
| 2947 | /* Insert last in queue. */ |
| 2948 | mutex_enter(&sc->sc_lock); |
| 2949 | err = usb_insert_transfer(xfer); |
| 2950 | mutex_exit(&sc->sc_lock); |
| 2951 | if (err) |
| 2952 | return err; |
| 2953 | |
| 2954 | /* Pipe isn't running, start first */ |
| 2955 | return ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); |
| 2956 | } |
| 2957 | |
| 2958 | Static usbd_status |
| 2959 | ohci_device_bulk_start(struct usbd_xfer *xfer) |
| 2960 | { |
| 2961 | struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); |
| 2962 | struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); |
| 2963 | ohci_softc_t *sc = OHCI_XFER2SC(xfer); |
| 2964 | ohci_soft_td_t *last; |
| 2965 | ohci_soft_td_t *data, *tail, *tdp; |
| 2966 | ohci_soft_ed_t *sed; |
| 2967 | int len, isread, endpt; |
| 2968 | |
| 2969 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 2970 | |
| 2971 | if (sc->sc_dying) |
| 2972 | return USBD_IOERROR; |
| 2973 | |
| 2974 | KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); |
| 2975 | |
| 2976 | len = xfer->ux_length; |
| 2977 | endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; |
| 2978 | isread = UE_GET_DIR(endpt) == UE_DIR_IN; |
| 2979 | sed = opipe->sed; |
| 2980 | |
| 2981 | DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d" , xfer, len, isread, |
| 2982 | xfer->ux_flags); |
| 2983 | DPRINTFN(4, "endpt=%d" , endpt, 0, 0, 0); |
| 2984 | |
| 2985 | mutex_enter(&sc->sc_lock); |
| 2986 | |
| 2987 | /* |
| 2988 | * Use the pipe "tail" TD as our first and loan our first TD to the |
| 2989 | * next transfer |
| 2990 | */ |
| 2991 | data = opipe->tail.td; |
| 2992 | opipe->tail.td = ox->ox_stds[0]; |
| 2993 | ox->ox_stds[0] = data; |
| 2994 | ohci_reset_std_chain(sc, xfer, len, isread, data, &last); |
| 2995 | |
| 2996 | /* point at sentinel */ |
| 2997 | tail = opipe->tail.td; |
| 2998 | memset(&tail->td, 0, sizeof(tail->td)); |
| 2999 | tail->nexttd = NULL; |
| 3000 | tail->xfer = NULL; |
| 3001 | usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), |
| 3002 | BUS_DMASYNC_PREWRITE); |
| 3003 | xfer->ux_hcpriv = data; |
| 3004 | |
| 3005 | DPRINTFN(8, "xfer %p data %p tail %p" , xfer, ox->ox_stds[0], tail, 0); |
| 3006 | KASSERT(opipe->tail.td == tail); |
| 3007 | |
| 3008 | /* We want interrupt at the end of the transfer. */ |
| 3009 | last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); |
| 3010 | last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); |
| 3011 | last->td.td_nexttd = HTOO32(tail->physaddr); |
| 3012 | last->nexttd = tail; |
| 3013 | last->flags |= OHCI_CALL_DONE; |
| 3014 | usb_syncmem(&last->dma, last->offs, sizeof(last->td), |
| 3015 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 3016 | |
| 3017 | DPRINTFN(4, "ed_flags=0x%08x td_flags=0x%08x " |
| 3018 | "td_cbp=0x%08x td_be=0x%08x" , |
| 3019 | (int)O32TOH(sed->ed.ed_flags), |
| 3020 | (int)O32TOH(data->td.td_flags), |
| 3021 | (int)O32TOH(data->td.td_cbp), |
| 3022 | (int)O32TOH(data->td.td_be)); |
| 3023 | |
| 3024 | #ifdef OHCI_DEBUG |
| 3025 | DPRINTFN(5, "--- dump start ---" , 0, 0, 0, 0); |
| 3026 | if (ohcidebug >= 5) { |
| 3027 | ohci_dump_ed(sc, sed); |
| 3028 | ohci_dump_tds(sc, data); |
| 3029 | } |
| 3030 | DPRINTFN(5, "--- dump end ---" , 0, 0, 0, 0); |
| 3031 | #endif |
| 3032 | |
| 3033 | /* Insert ED in schedule */ |
| 3034 | for (tdp = data; tdp != tail; tdp = tdp->nexttd) { |
| 3035 | KASSERT(tdp->xfer == xfer); |
| 3036 | } |
| 3037 | usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), |
| 3038 | BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); |
| 3039 | sed->ed.ed_tailp = HTOO32(tail->physaddr); |
| 3040 | sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); |
| 3041 | usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), |
| 3042 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 3043 | OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); |
| 3044 | if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { |
| 3045 | callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), |
| 3046 | ohci_timeout, xfer); |
| 3047 | } |
| 3048 | mutex_exit(&sc->sc_lock); |
| 3049 | |
| 3050 | return USBD_IN_PROGRESS; |
| 3051 | } |
| 3052 | |
| 3053 | Static void |
| 3054 | ohci_device_bulk_abort(struct usbd_xfer *xfer) |
| 3055 | { |
| 3056 | ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); |
| 3057 | |
| 3058 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 3059 | |
| 3060 | KASSERT(mutex_owned(&sc->sc_lock)); |
| 3061 | |
| 3062 | DPRINTF("xfer=%p" , xfer, 0, 0, 0); |
| 3063 | ohci_abort_xfer(xfer, USBD_CANCELLED); |
| 3064 | } |
| 3065 | |
| 3066 | /* |
| 3067 | * Close a device bulk pipe. |
| 3068 | */ |
| 3069 | Static void |
| 3070 | ohci_device_bulk_close(struct usbd_pipe *pipe) |
| 3071 | { |
| 3072 | struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); |
| 3073 | ohci_softc_t *sc = OHCI_PIPE2SC(pipe); |
| 3074 | |
| 3075 | KASSERT(mutex_owned(&sc->sc_lock)); |
| 3076 | |
| 3077 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 3078 | |
| 3079 | DPRINTF("pipe=%p" , pipe, 0, 0, 0); |
| 3080 | ohci_close_pipe(pipe, sc->sc_bulk_head); |
| 3081 | ohci_free_std_locked(sc, opipe->tail.td); |
| 3082 | } |
| 3083 | |
| 3084 | /************************/ |
| 3085 | |
| 3086 | Static int |
| 3087 | ohci_device_intr_init(struct usbd_xfer *xfer) |
| 3088 | { |
| 3089 | struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); |
| 3090 | ohci_softc_t *sc = OHCI_XFER2SC(xfer); |
| 3091 | int len = xfer->ux_bufsize; |
| 3092 | int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;; |
| 3093 | int isread = UE_GET_DIR(endpt) == UE_DIR_IN; |
| 3094 | int err; |
| 3095 | |
| 3096 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 3097 | |
| 3098 | KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); |
| 3099 | KASSERT(len != 0); |
| 3100 | |
| 3101 | DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d" , xfer, len, isread, |
| 3102 | xfer->ux_flags); |
| 3103 | DPRINTFN(4, "endpt=%d" , endpt, 0, 0, 0); |
| 3104 | |
| 3105 | ox->ox_nstd = 0; |
| 3106 | |
| 3107 | err = ohci_alloc_std_chain(sc, xfer, len, isread); |
| 3108 | if (err) { |
| 3109 | return err; |
| 3110 | } |
| 3111 | |
| 3112 | return 0; |
| 3113 | } |
| 3114 | |
| 3115 | Static void |
| 3116 | ohci_device_intr_fini(struct usbd_xfer *xfer) |
| 3117 | { |
| 3118 | ohci_softc_t *sc = OHCI_XFER2SC(xfer); |
| 3119 | struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); |
| 3120 | struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); |
| 3121 | |
| 3122 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 3123 | DPRINTFN(8, "xfer %p nstd %d" , xfer, ox->ox_nstd, 0, 0); |
| 3124 | |
| 3125 | mutex_enter(&sc->sc_lock); |
| 3126 | for (size_t i = 0; i < ox->ox_nstd; i++) { |
| 3127 | ohci_soft_td_t *std = ox->ox_stds[i]; |
| 3128 | if (std != NULL) |
| 3129 | break; |
| 3130 | if (std != opipe->tail.td) |
| 3131 | ohci_free_std_locked(sc, std); |
| 3132 | } |
| 3133 | mutex_exit(&sc->sc_lock); |
| 3134 | |
| 3135 | if (ox->ox_nstd) { |
| 3136 | const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; |
| 3137 | kmem_free(ox->ox_stds, sz); |
| 3138 | } |
| 3139 | } |
| 3140 | |
| 3141 | Static usbd_status |
| 3142 | ohci_device_intr_transfer(struct usbd_xfer *xfer) |
| 3143 | { |
| 3144 | ohci_softc_t *sc = OHCI_XFER2SC(xfer); |
| 3145 | usbd_status err; |
| 3146 | |
| 3147 | /* Insert last in queue. */ |
| 3148 | mutex_enter(&sc->sc_lock); |
| 3149 | err = usb_insert_transfer(xfer); |
| 3150 | mutex_exit(&sc->sc_lock); |
| 3151 | if (err) |
| 3152 | return err; |
| 3153 | |
| 3154 | /* Pipe isn't running, start first */ |
| 3155 | return ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); |
| 3156 | } |
| 3157 | |
| 3158 | Static usbd_status |
| 3159 | ohci_device_intr_start(struct usbd_xfer *xfer) |
| 3160 | { |
| 3161 | struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); |
| 3162 | struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); |
| 3163 | ohci_softc_t *sc = OHCI_XFER2SC(xfer); |
| 3164 | ohci_soft_ed_t *sed = opipe->sed; |
| 3165 | ohci_soft_td_t *data, *last, *tail; |
| 3166 | int len, isread, endpt; |
| 3167 | |
| 3168 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 3169 | |
| 3170 | if (sc->sc_dying) |
| 3171 | return USBD_IOERROR; |
| 3172 | |
| 3173 | DPRINTFN(3, "xfer=%p len=%d flags=%d priv=%p" , xfer, xfer->ux_length, |
| 3174 | xfer->ux_flags, xfer->ux_priv); |
| 3175 | |
| 3176 | KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); |
| 3177 | |
| 3178 | len = xfer->ux_length; |
| 3179 | endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; |
| 3180 | isread = UE_GET_DIR(endpt) == UE_DIR_IN; |
| 3181 | |
| 3182 | mutex_enter(&sc->sc_lock); |
| 3183 | |
| 3184 | /* |
| 3185 | * Use the pipe "tail" TD as our first and loan our first TD to the |
| 3186 | * next transfer. |
| 3187 | */ |
| 3188 | data = opipe->tail.td; |
| 3189 | opipe->tail.td = ox->ox_stds[0]; |
| 3190 | ox->ox_stds[0] = data; |
| 3191 | ohci_reset_std_chain(sc, xfer, len, isread, data, &last); |
| 3192 | |
| 3193 | /* point at sentinel */ |
| 3194 | tail = opipe->tail.td; |
| 3195 | memset(&tail->td, 0, sizeof(tail->td)); |
| 3196 | tail->nexttd = NULL; |
| 3197 | tail->xfer = NULL; |
| 3198 | usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), |
| 3199 | BUS_DMASYNC_PREWRITE); |
| 3200 | xfer->ux_hcpriv = data; |
| 3201 | |
| 3202 | DPRINTFN(8, "data %p tail %p" , ox->ox_stds[0], tail, 0, 0); |
| 3203 | KASSERT(opipe->tail.td == tail); |
| 3204 | |
| 3205 | /* We want interrupt at the end of the transfer. */ |
| 3206 | last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); |
| 3207 | last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); |
| 3208 | |
| 3209 | last->td.td_nexttd = HTOO32(tail->physaddr); |
| 3210 | last->nexttd = tail; |
| 3211 | last->flags |= OHCI_CALL_DONE; |
| 3212 | usb_syncmem(&last->dma, last->offs, sizeof(last->td), |
| 3213 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 3214 | |
| 3215 | #ifdef OHCI_DEBUG |
| 3216 | DPRINTFN(5, "--- dump start ---" , 0, 0, 0, 0); |
| 3217 | if (ohcidebug >= 5) { |
| 3218 | ohci_dump_ed(sc, sed); |
| 3219 | ohci_dump_tds(sc, data); |
| 3220 | } |
| 3221 | DPRINTFN(5, "--- dump end ---" , 0, 0, 0, 0); |
| 3222 | #endif |
| 3223 | |
| 3224 | /* Insert ED in schedule */ |
| 3225 | usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), |
| 3226 | BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); |
| 3227 | sed->ed.ed_tailp = HTOO32(tail->physaddr); |
| 3228 | sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); |
| 3229 | usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), |
| 3230 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 3231 | |
| 3232 | mutex_exit(&sc->sc_lock); |
| 3233 | |
| 3234 | return USBD_IN_PROGRESS; |
| 3235 | } |
| 3236 | |
| 3237 | /* Abort a device interrupt request. */ |
| 3238 | Static void |
| 3239 | ohci_device_intr_abort(struct usbd_xfer *xfer) |
| 3240 | { |
| 3241 | ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); |
| 3242 | |
| 3243 | KASSERT(mutex_owned(&sc->sc_lock)); |
| 3244 | KASSERT(xfer->ux_pipe->up_intrxfer == xfer); |
| 3245 | |
| 3246 | ohci_abort_xfer(xfer, USBD_CANCELLED); |
| 3247 | } |
| 3248 | |
| 3249 | /* Close a device interrupt pipe. */ |
| 3250 | Static void |
| 3251 | ohci_device_intr_close(struct usbd_pipe *pipe) |
| 3252 | { |
| 3253 | struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); |
| 3254 | ohci_softc_t *sc = OHCI_PIPE2SC(pipe); |
| 3255 | int nslots = opipe->intr.nslots; |
| 3256 | int pos = opipe->intr.pos; |
| 3257 | int j; |
| 3258 | ohci_soft_ed_t *p, *sed = opipe->sed; |
| 3259 | |
| 3260 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 3261 | |
| 3262 | KASSERT(mutex_owned(&sc->sc_lock)); |
| 3263 | |
| 3264 | DPRINTFN(1, "pipe=%p nslots=%d pos=%d" , pipe, nslots, pos, 0); |
| 3265 | usb_syncmem(&sed->dma, sed->offs, |
| 3266 | sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); |
| 3267 | sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); |
| 3268 | usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), |
| 3269 | sizeof(sed->ed.ed_flags), |
| 3270 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 3271 | if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != |
| 3272 | (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) |
| 3273 | usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); |
| 3274 | |
| 3275 | for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) |
| 3276 | continue; |
| 3277 | KASSERT(p); |
| 3278 | p->next = sed->next; |
| 3279 | p->ed.ed_nexted = sed->ed.ed_nexted; |
| 3280 | usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), |
| 3281 | sizeof(p->ed.ed_nexted), |
| 3282 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 3283 | |
| 3284 | for (j = 0; j < nslots; j++) |
| 3285 | --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; |
| 3286 | |
| 3287 | ohci_free_std_locked(sc, opipe->tail.td); |
| 3288 | ohci_free_sed_locked(sc, opipe->sed); |
| 3289 | } |
| 3290 | |
| 3291 | Static usbd_status |
| 3292 | ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) |
| 3293 | { |
| 3294 | int i, j, best; |
| 3295 | u_int npoll, slow, shigh, nslots; |
| 3296 | u_int bestbw, bw; |
| 3297 | ohci_soft_ed_t *hsed, *sed = opipe->sed; |
| 3298 | |
| 3299 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 3300 | |
| 3301 | DPRINTFN(2, "pipe=%p" , opipe, 0, 0, 0); |
| 3302 | if (ival == 0) { |
| 3303 | printf("ohci_setintr: 0 interval\n" ); |
| 3304 | return USBD_INVAL; |
| 3305 | } |
| 3306 | |
| 3307 | npoll = OHCI_NO_INTRS; |
| 3308 | while (npoll > ival) |
| 3309 | npoll /= 2; |
| 3310 | DPRINTFN(2, "ival=%d npoll=%d" , ival, npoll, 0, 0); |
| 3311 | |
| 3312 | /* |
| 3313 | * We now know which level in the tree the ED must go into. |
| 3314 | * Figure out which slot has most bandwidth left over. |
| 3315 | * Slots to examine: |
| 3316 | * npoll |
| 3317 | * 1 0 |
| 3318 | * 2 1 2 |
| 3319 | * 4 3 4 5 6 |
| 3320 | * 8 7 8 9 10 11 12 13 14 |
| 3321 | * N (N-1) .. (N-1+N-1) |
| 3322 | */ |
| 3323 | slow = npoll-1; |
| 3324 | shigh = slow + npoll; |
| 3325 | nslots = OHCI_NO_INTRS / npoll; |
| 3326 | for (best = i = slow, bestbw = ~0; i < shigh; i++) { |
| 3327 | bw = 0; |
| 3328 | for (j = 0; j < nslots; j++) |
| 3329 | bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; |
| 3330 | if (bw < bestbw) { |
| 3331 | best = i; |
| 3332 | bestbw = bw; |
| 3333 | } |
| 3334 | } |
| 3335 | DPRINTFN(2, "best=%d(%d..%d) bestbw=%d" , best, slow, shigh, bestbw); |
| 3336 | |
| 3337 | mutex_enter(&sc->sc_lock); |
| 3338 | hsed = sc->sc_eds[best]; |
| 3339 | sed->next = hsed->next; |
| 3340 | usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), |
| 3341 | sizeof(hsed->ed.ed_flags), |
| 3342 | BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); |
| 3343 | sed->ed.ed_nexted = hsed->ed.ed_nexted; |
| 3344 | usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), |
| 3345 | sizeof(sed->ed.ed_flags), |
| 3346 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 3347 | hsed->next = sed; |
| 3348 | hsed->ed.ed_nexted = HTOO32(sed->physaddr); |
| 3349 | usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), |
| 3350 | sizeof(hsed->ed.ed_flags), |
| 3351 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 3352 | mutex_exit(&sc->sc_lock); |
| 3353 | |
| 3354 | for (j = 0; j < nslots; j++) |
| 3355 | ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; |
| 3356 | opipe->intr.nslots = nslots; |
| 3357 | opipe->intr.pos = best; |
| 3358 | |
| 3359 | DPRINTFN(5, "returns %p" , opipe, 0, 0, 0); |
| 3360 | return USBD_NORMAL_COMPLETION; |
| 3361 | } |
| 3362 | |
| 3363 | /***********************/ |
| 3364 | |
| 3365 | Static int |
| 3366 | ohci_device_isoc_init(struct usbd_xfer *xfer) |
| 3367 | { |
| 3368 | struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); |
| 3369 | ohci_softc_t *sc = OHCI_XFER2SC(xfer); |
| 3370 | ohci_soft_itd_t *sitd; |
| 3371 | size_t i; |
| 3372 | int err; |
| 3373 | |
| 3374 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 3375 | |
| 3376 | DPRINTFN(1, "xfer %p len %d flags %d" , xfer, xfer->ux_length, |
| 3377 | xfer->ux_flags, 0); |
| 3378 | |
| 3379 | const size_t nfsitd = |
| 3380 | (xfer->ux_nframes + OHCI_ITD_NOFFSET - 1) / OHCI_ITD_NOFFSET; |
| 3381 | const size_t nbsitd = xfer->ux_bufsize / OHCI_PAGE_SIZE; |
| 3382 | const size_t nsitd = MAX(nfsitd, nbsitd) + 1; |
| 3383 | |
| 3384 | ox->ox_sitds = kmem_zalloc(sizeof(ohci_soft_itd_t *) * nsitd, |
| 3385 | KM_SLEEP); |
| 3386 | ox->ox_nsitd = nsitd; |
| 3387 | |
| 3388 | for (i = 0; i < nsitd; i++) { |
| 3389 | /* Allocate next ITD */ |
| 3390 | sitd = ohci_alloc_sitd(sc); |
| 3391 | if (sitd == NULL) { |
| 3392 | err = ENOMEM; |
| 3393 | goto fail; |
| 3394 | } |
| 3395 | ox->ox_sitds[i] = sitd; |
| 3396 | sitd->xfer = xfer; |
| 3397 | sitd->flags = 0; |
| 3398 | } |
| 3399 | |
| 3400 | return 0; |
| 3401 | fail: |
| 3402 | for (; i > 0;) { |
| 3403 | ohci_free_sitd(sc, ox->ox_sitds[--i]); |
| 3404 | } |
| 3405 | return err; |
| 3406 | } |
| 3407 | |
| 3408 | Static void |
| 3409 | ohci_device_isoc_fini(struct usbd_xfer *xfer) |
| 3410 | { |
| 3411 | struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); |
| 3412 | ohci_softc_t *sc = OHCI_XFER2SC(xfer); |
| 3413 | struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); |
| 3414 | |
| 3415 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 3416 | |
| 3417 | mutex_enter(&sc->sc_lock); |
| 3418 | for (size_t i = 0; i < ox->ox_nsitd; i++) { |
| 3419 | if (ox->ox_sitds[i] != opipe->tail.itd) { |
| 3420 | ohci_free_sitd_locked(sc, ox->ox_sitds[i]); |
| 3421 | } |
| 3422 | } |
| 3423 | mutex_exit(&sc->sc_lock); |
| 3424 | |
| 3425 | if (ox->ox_nsitd) { |
| 3426 | const size_t sz = sizeof(ohci_soft_itd_t *) * ox->ox_nsitd; |
| 3427 | kmem_free(ox->ox_sitds, sz); |
| 3428 | } |
| 3429 | } |
| 3430 | |
| 3431 | |
| 3432 | usbd_status |
| 3433 | ohci_device_isoc_transfer(struct usbd_xfer *xfer) |
| 3434 | { |
| 3435 | ohci_softc_t *sc = OHCI_XFER2SC(xfer); |
| 3436 | usbd_status __diagused err; |
| 3437 | |
| 3438 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 3439 | |
| 3440 | DPRINTFN(5, "xfer=%p" , xfer, 0, 0, 0); |
| 3441 | |
| 3442 | /* Put it on our queue, */ |
| 3443 | mutex_enter(&sc->sc_lock); |
| 3444 | err = usb_insert_transfer(xfer); |
| 3445 | mutex_exit(&sc->sc_lock); |
| 3446 | |
| 3447 | KASSERT(err == USBD_NORMAL_COMPLETION); |
| 3448 | |
| 3449 | /* insert into schedule, */ |
| 3450 | ohci_device_isoc_enter(xfer); |
| 3451 | |
| 3452 | /* and start if the pipe wasn't running */ |
| 3453 | return USBD_IN_PROGRESS; |
| 3454 | } |
| 3455 | |
| 3456 | void |
| 3457 | ohci_device_isoc_enter(struct usbd_xfer *xfer) |
| 3458 | { |
| 3459 | struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); |
| 3460 | struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); |
| 3461 | ohci_softc_t *sc = OHCI_XFER2SC(xfer); |
| 3462 | ohci_soft_ed_t *sed = opipe->sed; |
| 3463 | ohci_soft_itd_t *sitd, *nsitd, *tail; |
| 3464 | ohci_physaddr_t buf, offs, noffs, bp0; |
| 3465 | int i, ncur, nframes; |
| 3466 | |
| 3467 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 3468 | DPRINTFN(5, "xfer=%p" , xfer, 0, 0, 0); |
| 3469 | |
| 3470 | mutex_enter(&sc->sc_lock); |
| 3471 | |
| 3472 | if (sc->sc_dying) { |
| 3473 | mutex_exit(&sc->sc_lock); |
| 3474 | return; |
| 3475 | } |
| 3476 | |
| 3477 | struct isoc *isoc = &opipe->isoc; |
| 3478 | |
| 3479 | DPRINTFN(1, "used=%d next=%d xfer=%p nframes=%d" , |
| 3480 | isoc->inuse, isoc->next, xfer, xfer->ux_nframes); |
| 3481 | |
| 3482 | if (isoc->next == -1) { |
| 3483 | /* Not in use yet, schedule it a few frames ahead. */ |
| 3484 | isoc->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; |
| 3485 | DPRINTFN(2,"start next=%d" , isoc->next, 0, 0, 0); |
| 3486 | } |
| 3487 | |
| 3488 | sitd = opipe->tail.itd; |
| 3489 | opipe->tail.itd = ox->ox_sitds[0]; |
| 3490 | ox->ox_sitds[0] = sitd; |
| 3491 | |
| 3492 | buf = DMAADDR(&xfer->ux_dmabuf, 0); |
| 3493 | bp0 = OHCI_PAGE(buf); |
| 3494 | offs = OHCI_PAGE_OFFSET(buf); |
| 3495 | nframes = xfer->ux_nframes; |
| 3496 | xfer->ux_hcpriv = sitd; |
| 3497 | size_t j = 1; |
| 3498 | for (i = ncur = 0; i < nframes; i++, ncur++) { |
| 3499 | noffs = offs + xfer->ux_frlengths[i]; |
| 3500 | if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ |
| 3501 | OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ |
| 3502 | |
| 3503 | /* Allocate next ITD */ |
| 3504 | nsitd = ox->ox_sitds[j++]; |
| 3505 | KASSERT(nsitd != NULL); |
| 3506 | KASSERT(j < ox->ox_nsitd); |
| 3507 | |
| 3508 | /* Fill current ITD */ |
| 3509 | sitd->itd.itd_flags = HTOO32( |
| 3510 | OHCI_ITD_NOCC | |
| 3511 | OHCI_ITD_SET_SF(isoc->next) | |
| 3512 | OHCI_ITD_SET_DI(6) | /* delay intr a little */ |
| 3513 | OHCI_ITD_SET_FC(ncur)); |
| 3514 | sitd->itd.itd_bp0 = HTOO32(bp0); |
| 3515 | sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); |
| 3516 | sitd->itd.itd_be = HTOO32(bp0 + offs - 1); |
| 3517 | sitd->nextitd = nsitd; |
| 3518 | sitd->xfer = xfer; |
| 3519 | sitd->flags = 0; |
| 3520 | #ifdef DIAGNOSTIC |
| 3521 | sitd->isdone = false; |
| 3522 | #endif |
| 3523 | ohci_hash_add_itd(sc, sitd); |
| 3524 | usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), |
| 3525 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 3526 | |
| 3527 | sitd = nsitd; |
| 3528 | isoc->next = isoc->next + ncur; |
| 3529 | bp0 = OHCI_PAGE(buf + offs); |
| 3530 | ncur = 0; |
| 3531 | } |
| 3532 | sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); |
| 3533 | offs = noffs; |
| 3534 | } |
| 3535 | KASSERT(j <= ox->ox_nsitd); |
| 3536 | |
| 3537 | /* point at sentinel */ |
| 3538 | tail = opipe->tail.itd; |
| 3539 | memset(&tail->itd, 0, sizeof(tail->itd)); |
| 3540 | tail->nextitd = NULL; |
| 3541 | tail->xfer = NULL; |
| 3542 | usb_syncmem(&tail->dma, tail->offs, sizeof(tail->itd), |
| 3543 | BUS_DMASYNC_PREWRITE); |
| 3544 | |
| 3545 | /* Fixup last used ITD */ |
| 3546 | sitd->itd.itd_flags = HTOO32( |
| 3547 | OHCI_ITD_NOCC | |
| 3548 | OHCI_ITD_SET_SF(isoc->next) | |
| 3549 | OHCI_ITD_SET_DI(0) | |
| 3550 | OHCI_ITD_SET_FC(ncur)); |
| 3551 | sitd->itd.itd_bp0 = HTOO32(bp0); |
| 3552 | sitd->itd.itd_nextitd = HTOO32(tail->physaddr); |
| 3553 | sitd->itd.itd_be = HTOO32(bp0 + offs - 1); |
| 3554 | sitd->nextitd = tail; |
| 3555 | sitd->xfer = xfer; |
| 3556 | sitd->flags = OHCI_CALL_DONE; |
| 3557 | #ifdef DIAGNOSTIC |
| 3558 | sitd->isdone = false; |
| 3559 | #endif |
| 3560 | ohci_hash_add_itd(sc, sitd); |
| 3561 | usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), |
| 3562 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 3563 | |
| 3564 | isoc->next = isoc->next + ncur; |
| 3565 | isoc->inuse += nframes; |
| 3566 | |
| 3567 | /* XXX pretend we did it all */ |
| 3568 | xfer->ux_actlen = offs; |
| 3569 | xfer->ux_status = USBD_IN_PROGRESS; |
| 3570 | |
| 3571 | #ifdef OHCI_DEBUG |
| 3572 | if (ohcidebug >= 5) { |
| 3573 | DPRINTF("frame=%d" , O32TOH(sc->sc_hcca->hcca_frame_number), |
| 3574 | 0, 0, 0); |
| 3575 | ohci_dump_itds(sc, xfer->ux_hcpriv); |
| 3576 | ohci_dump_ed(sc, sed); |
| 3577 | } |
| 3578 | #endif |
| 3579 | |
| 3580 | usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), |
| 3581 | BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); |
| 3582 | sed->ed.ed_tailp = HTOO32(tail->physaddr); |
| 3583 | sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); |
| 3584 | usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), |
| 3585 | sizeof(sed->ed.ed_flags), |
| 3586 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 3587 | mutex_exit(&sc->sc_lock); |
| 3588 | } |
| 3589 | |
| 3590 | void |
| 3591 | ohci_device_isoc_abort(struct usbd_xfer *xfer) |
| 3592 | { |
| 3593 | struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); |
| 3594 | ohci_softc_t *sc = OHCI_XFER2SC(xfer); |
| 3595 | ohci_soft_ed_t *sed; |
| 3596 | ohci_soft_itd_t *sitd; |
| 3597 | |
| 3598 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 3599 | DPRINTFN(1, "xfer=%p" , xfer, 0, 0, 0); |
| 3600 | |
| 3601 | KASSERT(mutex_owned(&sc->sc_lock)); |
| 3602 | |
| 3603 | /* Transfer is already done. */ |
| 3604 | if (xfer->ux_status != USBD_NOT_STARTED && |
| 3605 | xfer->ux_status != USBD_IN_PROGRESS) { |
| 3606 | printf("ohci_device_isoc_abort: early return\n" ); |
| 3607 | goto done; |
| 3608 | } |
| 3609 | |
| 3610 | /* Give xfer the requested abort code. */ |
| 3611 | xfer->ux_status = USBD_CANCELLED; |
| 3612 | |
| 3613 | sed = opipe->sed; |
| 3614 | usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), |
| 3615 | BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); |
| 3616 | sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ |
| 3617 | usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), |
| 3618 | sizeof(sed->ed.ed_flags), |
| 3619 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 3620 | |
| 3621 | sitd = xfer->ux_hcpriv; |
| 3622 | KASSERT(sitd); |
| 3623 | |
| 3624 | usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock); |
| 3625 | |
| 3626 | for (; sitd->xfer == xfer; sitd = sitd->nextitd) { |
| 3627 | ohci_hash_rem_itd(sc, sitd); |
| 3628 | #ifdef DIAGNOSTIC |
| 3629 | DPRINTFN(1, "abort sets done sitd=%p" , sitd, 0, 0, 0); |
| 3630 | sitd->isdone = true; |
| 3631 | #endif |
| 3632 | } |
| 3633 | |
| 3634 | /* Run callback. */ |
| 3635 | usb_transfer_complete(xfer); |
| 3636 | |
| 3637 | sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ |
| 3638 | sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ |
| 3639 | usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), |
| 3640 | BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); |
| 3641 | |
| 3642 | done: |
| 3643 | KASSERT(mutex_owned(&sc->sc_lock)); |
| 3644 | } |
| 3645 | |
| 3646 | void |
| 3647 | ohci_device_isoc_done(struct usbd_xfer *xfer) |
| 3648 | { |
| 3649 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 3650 | DPRINTFN(1, "xfer=%p" , xfer, 0, 0, 0); |
| 3651 | } |
| 3652 | |
| 3653 | usbd_status |
| 3654 | ohci_setup_isoc(struct usbd_pipe *pipe) |
| 3655 | { |
| 3656 | struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); |
| 3657 | ohci_softc_t *sc = OHCI_PIPE2SC(pipe); |
| 3658 | struct isoc *isoc = &opipe->isoc; |
| 3659 | |
| 3660 | isoc->next = -1; |
| 3661 | isoc->inuse = 0; |
| 3662 | |
| 3663 | mutex_enter(&sc->sc_lock); |
| 3664 | ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); |
| 3665 | mutex_exit(&sc->sc_lock); |
| 3666 | |
| 3667 | return USBD_NORMAL_COMPLETION; |
| 3668 | } |
| 3669 | |
| 3670 | void |
| 3671 | ohci_device_isoc_close(struct usbd_pipe *pipe) |
| 3672 | { |
| 3673 | struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); |
| 3674 | ohci_softc_t *sc = OHCI_PIPE2SC(pipe); |
| 3675 | |
| 3676 | KASSERT(mutex_owned(&sc->sc_lock)); |
| 3677 | |
| 3678 | OHCIHIST_FUNC(); OHCIHIST_CALLED(); |
| 3679 | DPRINTF("pipe=%p" , pipe, 0, 0, 0); |
| 3680 | ohci_close_pipe(pipe, sc->sc_isoc_head); |
| 3681 | #ifdef DIAGNOSTIC |
| 3682 | opipe->tail.itd->isdone = true; |
| 3683 | #endif |
| 3684 | ohci_free_sitd_locked(sc, opipe->tail.itd); |
| 3685 | } |
| 3686 | |