| 1 | /* $NetBSD: pciide_cy693_reg.h,v 1.11 2009/10/19 18:41:15 bouyer Exp $ */ |
| 2 | |
| 3 | /* |
| 4 | * Copyright (c) 1998 Manuel Bouyer. |
| 5 | * |
| 6 | * Redistribution and use in source and binary forms, with or without |
| 7 | * modification, are permitted provided that the following conditions |
| 8 | * are met: |
| 9 | * 1. Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * 2. Redistributions in binary form must reproduce the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer in the |
| 13 | * documentation and/or other materials provided with the distribution. |
| 14 | * |
| 15 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| 16 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| 17 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 18 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 19 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 20 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 21 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 22 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 23 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 24 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 25 | * |
| 26 | */ |
| 27 | |
| 28 | /* |
| 29 | * Registers definitions for Contaq/Cypress's CY82693U PCI IDE controller. |
| 30 | * Available from http://www.cypress.com/japan/prodgate/chip/cy82c693.html |
| 31 | * This chip has 2 PCI IDE functions, each of them has only one channel |
| 32 | * So there's no primary/secodary distinction in the registers defs. |
| 33 | */ |
| 34 | |
| 35 | /* IDE control register */ |
| 36 | #define CY_CTRL 0x40 |
| 37 | #define CY_CTRL_RETRY 0x00002000 |
| 38 | #define CY_CTRL_SLAVE_PREFETCH 0x00000400 |
| 39 | #define CY_CTRL_POSTWRITE 0x00000200 |
| 40 | #define CY_CTRL_PREFETCH(drive) (0x00000100 << (2 * (drive))) |
| 41 | #define CY_CTRL_POSTWRITE_LENGTH_MASK 0x00000030 |
| 42 | #define CY_CTRL_POSTWRITE_LENGTH_OFF 4 |
| 43 | #define CY_CTRL_PREFETCH_LENGTH_MASK 0x00000003 |
| 44 | #define CY_CTRL_PREFETCH_LENGTH_OFF 0 |
| 45 | |
| 46 | /* IDE addr setup control register */ |
| 47 | #define CY_ADDR_CTRL 0x48 |
| 48 | #define CY_ADDR_CTRL_SETUP_OFF(drive) (4 * (drive)) |
| 49 | #define CY_ADDR_CTRL_SETUP_MASK(drive) \ |
| 50 | (0x00000007 << CY_ADDR_CTRL_SETUP_OFF(drive)) |
| 51 | |
| 52 | /* command control register */ |
| 53 | #define CY_CMD_CTRL 0x4c |
| 54 | #define CY_CMD_CTRL_IOW_PULSE_OFF(drive) (12 + 16 * (drive)) |
| 55 | #define CY_CMD_CTRL_IOW_REC_OFF(drive) (8 + 16 * (drive)) |
| 56 | #define CY_CMD_CTRL_IOR_PULSE_OFF(drive) (4 + 16 * (drive)) |
| 57 | #define CY_CMD_CTRL_IOR_REC_OFF(drive) (0 + 16 * (drive)) |
| 58 | |
| 59 | static const int8_t cy_pio_pulse[] __unused = |
| 60 | {9, 4, 3, 2, 2}; |
| 61 | static const int8_t cy_pio_rec[] __unused = |
| 62 | {9, 7, 4, 2, 0}; |
| 63 | #ifdef unused |
| 64 | static const int8_t cy_dma_pulse[] __unused = |
| 65 | {7, 2, 2}; |
| 66 | static const int8_t cy_dma_rec[] __unused = |
| 67 | {7, 1, 0}; |
| 68 | #endif |
| 69 | |
| 70 | /* |
| 71 | * The cypress is quite weird: it uses 8-bit ISA registers to control |
| 72 | * DMA modes. |
| 73 | */ |
| 74 | |
| 75 | #define CY_DMA_ADDR 0x22 |
| 76 | #define CY_DMA_SIZE 0x2 |
| 77 | |
| 78 | #define CY_DMA_IDX 0x00 |
| 79 | #define CY_DMA_IDX_PRIMARY 0x30 |
| 80 | #define CY_DMA_IDX_SECONDARY 0x31 |
| 81 | #define CY_DMA_IDX_TIMEOUT 0x32 |
| 82 | |
| 83 | #define CY_DMA_DATA 0x01 |
| 84 | /* Multiword DMA transfer, for CY_DMA_IDX_PRIMARY or CY_DMA_IDX_SECONDARY */ |
| 85 | #define CY_DMA_DATA_MODE_MASK 0x03 |
| 86 | #define CY_DMA_DATA_SINGLE 0x04 |
| 87 | |