| 1 | /* $NetBSD: nsphyreg.h,v 1.2 2008/04/28 20:23:53 martin Exp $ */ |
| 2 | |
| 3 | /*- |
| 4 | * Copyright (c) 1998 The NetBSD Foundation, Inc. |
| 5 | * All rights reserved. |
| 6 | * |
| 7 | * This code is derived from software contributed to The NetBSD Foundation |
| 8 | * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, |
| 9 | * NASA Ames Research Center. |
| 10 | * |
| 11 | * Redistribution and use in source and binary forms, with or without |
| 12 | * modification, are permitted provided that the following conditions |
| 13 | * are met: |
| 14 | * 1. Redistributions of source code must retain the above copyright |
| 15 | * notice, this list of conditions and the following disclaimer. |
| 16 | * 2. Redistributions in binary form must reproduce the above copyright |
| 17 | * notice, this list of conditions and the following disclaimer in the |
| 18 | * documentation and/or other materials provided with the distribution. |
| 19 | * |
| 20 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS |
| 21 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
| 22 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 23 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS |
| 24 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 25 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 26 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 27 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 28 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 29 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 30 | * POSSIBILITY OF SUCH DAMAGE. |
| 31 | */ |
| 32 | |
| 33 | #ifndef _DEV_MII_NSPHYREG_H_ |
| 34 | #define _DEV_MII_NSPHYREG_H_ |
| 35 | |
| 36 | /* |
| 37 | * DP83840 registers. |
| 38 | */ |
| 39 | |
| 40 | #define MII_NSPHY_DCR 0x12 /* Disconnect counter */ |
| 41 | |
| 42 | #define MII_NSPHY_FCSCR 0x13 /* False carrier sense counter */ |
| 43 | |
| 44 | #define MII_NSPHY_RECR 0x15 /* Receive error counter */ |
| 45 | |
| 46 | #define MII_NSPHY_SRR 0x16 /* Silicon revision */ |
| 47 | |
| 48 | #define MII_NSPHY_PCR 0x17 /* PCS sub-layer configuration */ |
| 49 | #define PCR_NRZI 0x8000 /* NRZI encoding enabled for 100TX */ |
| 50 | #define PCR_DESCRTOSEL 0x4000 /* descrambler t/o select (2ms) */ |
| 51 | #define PCR_DESCRTODIS 0x2000 /* descrambler t/o disable */ |
| 52 | #define PCR_REPEATER 0x1000 /* repeater mode */ |
| 53 | #define PCR_ENCSEL 0x0800 /* encoder mode select */ |
| 54 | #define PCR_CLK25MDIS 0x0080 /* CLK25M disable */ |
| 55 | #define PCR_FLINK100 0x0040 /* force good link in 100mbps */ |
| 56 | #define PCR_CIMDIS 0x0020 /* carrier integrity monitor disable */ |
| 57 | #define PCR_TXOFF 0x0010 /* force transmit off */ |
| 58 | #define PCR_LED1MODE 0x0004 /* LED1 mode: see below */ |
| 59 | #define PCR_LED4MODE 0x0002 /* LED4 mode: see below */ |
| 60 | |
| 61 | /* |
| 62 | * LED1 Mode: |
| 63 | * |
| 64 | * 1 LED1 output configured to PAR's CON_STATUS, useful for |
| 65 | * network management in 100baseTX mode. |
| 66 | * |
| 67 | * 0 Normal LED1 operation - 10baseTX and 100baseTX transmission |
| 68 | * activity. |
| 69 | * |
| 70 | * LED4 Mode: |
| 71 | * |
| 72 | * 1 LED4 output configured to indicate full-duplex in both |
| 73 | * 10baseT and 100baseTX modes. |
| 74 | * |
| 75 | * 0 LED4 output configured to indicate polarity in 10baseT |
| 76 | * mode and full-duplex in 100baseTX mode. |
| 77 | */ |
| 78 | |
| 79 | #define MII_NSPHY_LBREMR 0x18 /* Loopback, bypass, error mask */ |
| 80 | #define LBREMR_BADSSDEN 0x8000 /* enable bad SSD detection */ |
| 81 | #define LBREMR_BP4B5B 0x4000 /* bypass 4b/5b encoding */ |
| 82 | #define LBREMR_BPSCR 0x2000 /* bypass scrambler */ |
| 83 | #define LBREMR_BPALIGN 0x1000 /* bypass alignment function */ |
| 84 | #define LBREMR_10LOOP 0x0800 /* 10baseT loopback */ |
| 85 | #define LBREMR_LB1 0x0200 /* loopback ctl 1 */ |
| 86 | #define LBREMR_LB0 0x0100 /* loopback ctl 0 */ |
| 87 | #define LBREMR_ALTCRS 0x0040 /* alt crs operation */ |
| 88 | #define LBREMR_LOOPXMTDIS 0x0020 /* disable transmit in 100TX loopbk */ |
| 89 | #define LBREMR_CODEERR 0x0010 /* code errors */ |
| 90 | #define LBREMR_PEERR 0x0008 /* premature end errors */ |
| 91 | #define LBREMR_LINKERR 0x0004 /* link errors */ |
| 92 | #define LBREMR_PKTERR 0x0002 /* packet errors */ |
| 93 | |
| 94 | #define MII_NSPHY_PAR 0x19 /* Physical address and status */ |
| 95 | #define PAR_DISCRSJAB 0x0800 /* disable car sense during jab */ |
| 96 | #define PAR_ANENSTAT 0x0400 /* autoneg mode status */ |
| 97 | #define PAR_FEFIEN 0x0100 /* far end fault enable */ |
| 98 | #define PAR_FDX 0x0080 /* full duplex status */ |
| 99 | #define PAR_10 0x0040 /* 10mbps mode */ |
| 100 | #define PAR_CON 0x0020 /* connect status */ |
| 101 | #define PAR_AMASK 0x001f /* PHY address bits */ |
| 102 | |
| 103 | #define MII_NSPHY_10BTSR 0x1b /* 10baseT status */ |
| 104 | #define MII_NSPHY_10BTCR 0x1c /* 10baseT configuration */ |
| 105 | |
| 106 | #endif /* _DEV_MII_NSPHYREG_H_ */ |
| 107 | |